lambda advanced analog inc. l l atw2800d series dual output, hybrid - high reliability dc/dc converter description features the atw2800d series of dc/dc converters feature high power density and an extended temperature range for use in military and industrial applications. designed to mil-std-704 input requirements, these devices have nominal 28vdc inputs with 12v and 15v dual outputs to satisfy a wide range of requirements. the circuit design incorporates a pulse width modulated push-pull topology operating in the feed-forward mode at a nominal switching frequency of 270khz. input to output isolation is achieved through the use of transformers in the forward and feedback circuits. the advanced feedback design provides fast loop response for superior line and load transient characteristics and offers greater reliability and radiation tolerance than devices incorporating optical feedback circuits. three standard temperature grades are offered. refer to part number section for more severe enviroments. manufactured in a facility fully qualified to mil-prf- 38534, these converters are available in four screening grades to satisfy a wide range of requirements. the ch grade is fully compliant to the requirements of mil-prf-38534 for class h. the hb grade is processed and screened to the class h requirement, but may not necessarily meet all of the other mil-prf-38534 requirements, e.g., element evaluation and periodic inspection (p.i.) not required. both grades are tested to meet the complete group "a" test specification over the full military temperature range without output power deration. two grades with more limited screening are also available for use in less demanding applications. variations in electrical, mechanical and screening can be accommodated. contact lambda advanced analog for special requirements. n n 18 to 40 volt input range (28vdc nominal) n n 12 an d 15 volt outputs available n n indefinite short circuit and overload protection n n 22.8 w/in 3 power density n n 30 watts output power n n fast loop response for superior transient characteristics n n operating temperature range from -55c to +125c available n n popular industry standard pin-out n n resistance seam welded case for superior long term hermeticity n n efficiencies up to 85% n n shutdown from external signal n n full military screening n n 200,000 hour mtbf at 85c n n mil-prf-38534 compliant versions available
2 specifications atw2812d absolute maximum ratings input voltage -0.5v to 180v soldering temperature 300c for 10 seconds case temperature operating -55c to +125c storage -65c to +135c table i. electrical performance characteristics test symbol conditions -55 c t c +125 c v in = 28 v dc 5%, c l = 0 unless otherwise specified group a subgroups device types limits unit min max output voltage v out i out = 0 1 all 11.88 12.12 v 2,3 11.76 12.24 output current 1 / 2 / i out v in = 18, 28, and 40 v dc, each output 1,2,3 all 250 2250 ma output ripple voltage 3 / v rip v in = 18, 28, and 40 v dc, b.w. = 20 hz to 2 mhz 1,2,3 all 85 mv p-p line regulation 4 / vr line v in = 18, 28, and 40 v dc, i out = 0, 1250, and 2500 ma 1 all 30 mv 2,3 60 load regulation 4 / vr load v in = 18, 28, and 40 v dc, i out = 0, 1250, and 2500 ma 1,2,3 all 120 mv cross regulation 5 / vr cros 10 percent to 90 percent load change 1,2,3 all 3.5 % input current i in i out = 0, inhibit (pin 8) tied to input return (pin 10) 1,2,3 all 18 ma i out = 0, inhibit (pin 8) = open 50 input ripple current 3 / 4 / i rip i out = 2500 ma, b.w. = 20 hz to 2 mhz 1,2,3 all 50 ma p-p efficiency 4 / e ff i out = 2500 ma, t c = +25 c 1 all 80 % isolation iso input to output or any pin to case (except pin 7) at 500 v dc, t c = +25 c 1 all 100 m w capacitive load 6 / 7 / c l no effect on dc performance, t c = +25 c, total for both outputs 4 all 200 f power dissipation load fault p d overload, t c = +25 c 8 / 1 all 12 w short circuit, t c = +25 c 9 see footnotes at end of table.
3 atw2812d table i. electrical performance characteristics - continued test symbol conditions -55 c t c +125 c v in = 28 v dc 5%, c l = 0 unless otherwise specified group a subgroups device types limits unit min max switching frequency 4 / f s i out = 2500 ma 4,5,6 01 250 300 k hz 02 250 270 03 275 300 output response to step transient load changes 4 / 9 / vo tloa d 1250 ma to/from 2500 ma 4,5,6 all -400 +400 mv pk 0 ma to/from 2500 ma 4,5,6 all -800 +800 recovery time, step transient load changes 4 / 9 / 10 / tt load 1250 ma to/from 2500 ma 4,5,6 all 70 s 0 ma to/from 1250 ma 4,5,6 all 500 1250 ma to/from 0 ma 4,5,6 all 5 ms output response transient step line changes 4 / 7 / 11 / vo tline input step from/to 18 to 40 v dc, i out = 2500 ma 4,5,6 all -800 +800 mv pk recovery time transient step line changes 4 / 7 / 10 / 11 / tt line input step from/to 18 to 40 v dc, i out = 2500 ma 4,5,6 all 4000 s turn on overshoot 4 / vton os i out = 0 and 2500 ma 4,5,6 all 750 mv pk turn on delay 4 / 12 / ton d i out = 0 and 2500 ma 4,5,6 all 14 ms load fault recovery 7 / tr lf 4,5,6 all 14 ms weight flange 75 grams notes: 1 / parameter guaranteed by line load, and cross regulation tests. 2 / up to 90 percent of full power is available from either output provided the total output does not exceed 30 w. 3 / bandwidt h guaranteed by design. tested for 20 khz to 2 mhz. 4 / load current split equally between +v out and -v out . 5 / three-watt load on output under test, 3 watt to 27 watt load change on other output. 6 / capacitive load may be any value from 0 to the maximum limit without compromising dc performance. a capacitive load in excess of the maximum limit will not disturb loop stability but may interfere with the operation of the load fault detection circuitry, appearing as a short circuit during turn-on. 7 / parameter shall be tested as part of design characterization and after design or process changes. thereafter, parameters shall be guaranteed to the limits specified in table i. 8 / an overload is that condition with a load in excess of the rated load but less than that necessary to trigger the short circuit protection and is the condition of maximum power dissipation. 9 / load step transition time between 2 and 10 microseconds. 10 / recovery time is measured from the initiation of the t ransient to where v out has returned to within 1 percent of v out at 50 percent load. 11 / input step transition time between 2 and 10 microseconds. 12 / turn-on delay time measurement is for either a step application of power at the input or the removal of a ground signal from the inhibit pin (pin 8) while power is applied to the input.
4 specifications atw2815d absolute maximum ratings input voltage -0.5v to 180v soldering temperature 300c for 10 seconds case temperature operating -55 c to +125c storag e -65c to +135c table ii - electrical performance characteristics test symbol conditions -55 c t c +125 c v in = 28vdc 5%, c l = 0 unless otherwise specified group a subgroups device type limits unit min max output voltage v out vin = 18, 28, 40 vdc i out = 0 1 all 14.85 15.15 vdc 2, 3 all 14.70 15.30 vdc output current 11 / 13 / i out v in = 18, 28, 40 vdc 1, 2, 3 all 0.200 2000 madc output ripple voltage 8 / v rip vin = 18, 28 40 vdc b.w. = dc to 1 mhz 1, 2, 3 all 85 mvp-p output power 4 / 11 / p out v in = 18, 28, 40 vdc 1, 2, 3 all 30 w line regulation 9 / 10 / vr line v in = 18, 28, 40 vdc i out = 0, 1000, 2000 ma 1 all 35 mv 2, 3 all 75 mv load regulation 9 / 10 / vr load v in = 18, 28, 40 vdc i out = 0, 1000, 2000 ma 1, 2, 3 all 150 mv input current i in i out =0, inhibit (pin 8) = 0 1, 2, 3 all 12 madc i out =0, inhibit (pin 8) open 1, 2, 3 all 30 madc input ripple current i rip i out = 2000ma 1, 2, 3 all 60 map-p efficiency eff i out = 2000ma t c = 25 c 1 all 80 % isolation iso input to output or any pin to case (except pin 8) at 500 vdc, t c = 25 c 1 all 100 mohms capacitive load 6 / 12 / c l no effect on dc performance t c = 25 c 4 all 500 ufd power dissipation load fault p d overload, t c = 25 c 3 / 1 all 9 w short circuit, t c = 25 c 1 all 9 w switching frequency f s i out = 2000 ma 1, 2, 3 01 237 263 khz 1, 2, 3 02 230 245 khz 1, 2, 3 03 250 265 khz see footnotes at end of table.
5 atw2815d table ii - electrical performance characteristics (continued) test symbol conditions -55 c t c +125 c v in = 28vdc 5%, c l = 0 unless otherwise specified group a subgroups device type limits unit min max output response to step transient load changes 7 / 9 / 10 / vo tload 50% load to/from 100% load 4, 5, 6 all -300 +300 mv pk no load to 100% load 4, 5, 6 all -800 -800 mv pk 100% load to no load 4, 5, 6 all +800 +800 recovery time, step transient load changes 1 / 7 / tt load 50% load to/from 100% load 4, 5, 6 all 25 us no load to 50% load 4, 5, 6 all 500 us 50% load to no load 4, 5, 6 all 7 ms output response to transient step line changes 5 / 12 / vo tline input step from 18 to 40vdc 4, 5, 6 all +180 mv pk input step from 40 to 18vdc 4, 5, 6 all -600 mv pk recovery time transient step line changes 1 / 5 / 12 / tt line input step from 18 to 40vdc 4, 5, 6 all 400 us input step from 40 to 18vdc 4, 5, 6 all 400 us turn-on overshoot vton os i out = 0, 2000ma 4, 5, 6 all 750 mv pk turn-on delay 2 / ton d i out = 0, 2000ma 4, 5, 6 all 12 ms load fault recovery 12 / tr lf v in = 18 to 40 vdc 4, 5, 6 all 12 weight flange 75 grams notes: 1 / recovery time is measured from the initiation of the transient to where v out has returned to within 1% of v out at 50% load. 2 / turn-on delay time measurement is for either a step application of power at the input or the removal of a ground signal from the inhibit pin (pin 8) while power is applied to the input. 3 / an overload is that condition with a load in excess of the rated load but less than that necessary to trigger the short circuit protection and is the condition of maximum power dissipation. 4 / above +125 c case, derate output power linearly to 0 at +135 c case. 5 / input step transition time between 2 and 10 microseconds. 6 / capacitive load may be any value from 0 to the maximum limit without compromising dc performance. a capacitive load in excess of the maximum limit will not disturb loop stability but will interfere with the operation of the load fault detection circuitry, appearing as a short circuit during turn on. 7 / load step transition time between 2 and 10 microseconds. 8 / bandwidth guaranteed by design. tested for 20 khz. 9 / load current split equally between +v out and -v out. 10 / when operating with unbalanced loads, at least 25% of the load must be on the positive output to maintain regulation. 11 / parameter guaranteed by line and load regulation tests. 12 / parameter shall be tested as part of design characterization and after design or process changes. thereafter parameters shall be guaranteed to the limits specified in table ii. 13 / up to 90% of full power is available from either output provided the total output does not exceed 30 watts.
6 block diagram pin designation pin 1 positive input pin 1 0 inpu t common pin 2 n/c standard or pin 9 n/c synchronization (optional) pin 3 positiv e output pin 8 inhibit pin 4 outpu t common pin 7 cas e ground pin 5 negative output pin 6 n/c 4 3 controller 10 input filter 8 1 2 error amp & ref 5 output filter mechanical outline 5 4 3 2 1 6 7 8 9 10 bottom view 1.00 (25.400) 1.345 (34.163) 0.162d 2 places (4.115) 2.360 (59.944) 2.700 (68.580) 1.950 (49.530) 0.500 max (12.700) 0.050 max (1.397) 4 x 0.400 = 1.600 (10.160 ) (40.640) 0.040d x 0.260l (1.016) (6.604) pin #1
7 part number atw 28 xx d / x - xxx model input voltage output voltage 12 = 12v dc 15 = 15v dc dual output temperature range omit for -55c to +85c es = -55c to +105c hb = -55c to 125c ch = -55c to 125c synchronization option omit for standard mstr = master s:v = slave available screening levels and process variations for atw 2800d series requirement mil-std-883 method no suffix es suffix hb suffix ch suffix temperature range -55c to +85c -55c to +125c -55c to +125c -55c to +125c element evaluation mil-prf-38534 internal visual 2017 ? temperature cycle 1010, cond c cond a constant acceleration 2001, cond a 500g 5,000g 5,000g burn-in 1015 96hrs @ 105c 160hrs @ 125c 160hrs @ 125c final electrical (group a) specification 25c 25c -55, +25, +125c -55, +25, +125c seal, fine & gross 1014 external visual 2009 ? ? per commercial standards standardized military drawing cross reference standardized military drawing pin vendor cage number vendor similar pin 5962-9210901hzx 52467 atw2812d/ch 5962-9210902hzx 52467 atw2812d/ch-slv 5962-9210903hzx 52467 atw2812/ch-mstr 5962-9161301hzx 52467 atw2815d/ch 5962-9161302hzx 52467 atw2815d/ch-slv 5962-9161303hzx 52467 atw2815d/ch-mstr
for the master converter part number and a slv suffix is added for slave part number. see part number section. inhibit function connecting the inhibit input (pin 8) to input com- mon (pin 10) will cause the converter to shut down. it is recommended that the inhibit pin be driven by an open collector device capable of sinking at least 400 a of current. the open cir- cuit voltage of the inhibit input is 11.5 1 v d c . emi filter an optional emi filter (afc461) will reduce the in- put ripple current to levels below the limits im- posed by mil-std-461b ceo3. 8 application information device synchronization whenever multiple dc/dc converters are utilized in a single system, significant low frequency noise may be generated due to slight differences in the switching frequencies of the converters (beat frequency noise). because of the low frequency nature of this noise (typically less than 10 k hz), it is difficult to filter out and may interfere with proper operation of sensitive systems (communi- cations, radar or telemetry). l am b da advanced an alog offers an option which provides synchroni- za tion of multiple ahe/atw type converters, thus eliminating this type of noise. to take advantage of this capability, the system designer must assign one of the converters as the master. then, by definition, the remaining con- verters become slaves and will operate at the masters switching frequency. the user should be aware that the synchronization system is fail- safe; that is, the slaves will continue operating should the master frequency be interrupted for any reason. the layout must be such that the synchronization output (pin 2) of the master de- vice is connected to the synchronization input (pin 2) of each slave device. it is advisable to keep this run short to minimize the possibility of radiat- ing the 250 k hz switching frequency. the appropriate parts must be ordered to utilize this feature. after selecting the converters re- quired for the system, a mstr suffix is added typical synchronization connection diagram filter atw2805s/es-mstr atw2815d/es-slv slave atw2812s/es-slv slave +5v comm +15v comm -15v +12v comm 5 4 5 4 3 4 5 1 10 1 10 1 10 8 2 8 system bus
lambda advanced analog the information in this data sheet has been carefully checked and is believed to be accurate; however no responsibility is assumed for possible errors. these specifications are subject to change without notice. 984 7 lambda advanced analog inc. l mil-prf-38534 certified iso9001 registered 2270 martin avenue santa clara ca 95050-2781 (408) 988- 4930 fax (408) 988-2702 notes
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