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  ultrafast 3.3 v/5 v single-supply sige comparators adcmp572/adcmp573 rev. 0 in fo rmation furn ished by an alog d e v i c e s is believed to be accurate and reliable. how e ver, n o resp on sibili ty is assume d b y a n alog de vices fo r its use, nor for an y i n fri n geme nt s of p a t e nt s or ot h e r ri ght s o f th ird parties th at may result fro m its use . specifications subjec t to chan g e witho u t n o tice. no licen s e is g r an te d by implicati o n or ot herwi s e u n der a n y p a t e nt or p a t e nt ri ghts of analog de v i ces. trademarks an d registered tra d ema r ks are the prop erty o f their respective ow ners. one technolog y way, p.o . box 9106, norwood, ma 02062-9106, u.s.a. t e l: 781. 329. 4 700 www.analog.com fax: 781. 461. 31 13 ? 2005 analog de vices, i n c. al l r i ght s r e ser v ed . features 3.3 v/5.2 v sin gle-supply ope r ation 150 ps propagation dela y 15 ps overdr ive and s l ew rate dispersion 8 ghz eq uiva le nt input rise t i me bandwidth 80 ps minimum pulse wi dth 35 ps typical output rise/fa ll 10 ps de t e rmin istic jitt er (dj ) 200 fs random jitter (rj) on-chip terminations at both input pins robust inputs with no output phase reversal resistor-progr ammable hyste r esis differential lat c h control extended in dustrial ? 40c to +125 c temper ature range applic ati o ns clock and d a ta signal restorati o n and level sh ifting automatic test equipment ( a t e) high speed ins t rumentation pulse spectroscopy medical imagin g and di agnostics high speed l i ne receivers thresho l d det e ctio n peak an d zero- c rossing detectors high speed trigger circuitry func tio n a l block di agram v p noninverting input v tp termination v tn termination v n inverting input le input hys q output q output le input 04409-025 adcmp572 adcmp573 cml/ rspecl v cco v cci fi g u r e 1 . general description t h e a d c m p 5 7 2 an d a d c m p 5 7 3 are u l t r af a s t c o m p ar a t ors f a br i c ate d on a n a l o g d e v i c e s propr i e t ar y x f c b 3 si l i c o n g e r m a n i u m (s ig e) b i p o la r p r o c es s. th e ad cmp572 f e a t ur es cml o u t p u t dr iv ers a nd l a t c h in p u ts, and t h e ad cmp573 fe a t ur es r e d u ce d s w in g pecl ( r s p ecl) o u t p ut dr i v ers a nd la t c h in p u ts. b o th devices o f f e r 150 ps p r o p a g a t io n de l a y and 80 ps minim u m p u ls e wid t h f o r 10 gb ps o p era t io n wi th 200 fs r m s ra n d om ji t t er ( r j). o v er dr i v e a nd s l e w ra te disp ersio n a r e typ i cal l y les s tha n 15 ps. a f l exi b le p o w e r s u p p l y s c h e me al lo ws b o t h de v i ces t o o p era t e wi t h a sin g le 3.3 v p o si t i v e s u p p l y a n d a ?0.2 v t o +1.2 v in p u t s i g n a l r a nge or wi t h spl i t i n p u t / ou t p ut su p p l i e s to su p p or t a wider ?0.2 v to +3.2 v in p u t sig n a l r a n g e and an i n de p e n d e n t r a nge of output l e vel s . 5 0 ? on - c h i p te r m i n a t i o n re s i stor s are prov i d e d a t b o t h i n put s w i t h t h e opt i on a l c a p a bi l i t y to b e l e f t o p en (o n a n i n d i vi d u a l p i n b a si s) fo r a p plica t ion s r e q u ir in g hig h i m p e d a n c e in p u t s . the cml o u t p u t s t a g e is desig n ed t o dir e c t l y dr i v e 400 mv in t o 50 ? tra n smis sio n lin e s t e r m ina t e d t o betw een 3.3 v t o 5.2 v . the rsp e cl o u t p u t s t a g e is des i g n e d t o dr i v e 4 00 mv i n t o 5 0 ? te r m i n a t e d to v cco ? 2 v a nd is com p a t i b le wi t h s e v e ral co mm o n l y us ed p e cl log i c fa milies. th e com p a r a t o r in p u t st age of f e r s ro bu st prote c t i on a g ai nst l a r g e i n put ove r d r ive, an d t h e o u t p uts do n o t phas e r e vers e w h e n t h e vali d in p u t sig n al ra n g e i s e x ceed e d . h i g h s p eed l a t c h a n d p r ogra m m a b l e h y s t er esis fe a t ur es a r e als o p r o v ide d . the a d cmp57 2 a nd a d cmp5 73 a r e a v a i la b l e in a 16 -le a d l f c s p p a ck age an d h a ve b e e n c h ar a c te r i z e d ove r an e x te nd e d ind u s t r i al t e m p era t ur e ra n g e o f ?40c t o +125c.
adcmp572/adcmp573 rev. 0 | page 2 of 16 table of contents electrical characteristics ................................................................. 3 absolute maximum ratings............................................................ 5 thermal considerations.............................................................. 5 esd caution.................................................................................. 5 pin configuration and function descriptions............................. 6 typical performance characteristics ............................................. 7 application in formation.................................................................. 9 power/ground layout and bypassing ....................................... 9 cml/rspecl output stage ....................................................... 9 using/disabling the latch feature..............................................9 optimizing high speed performance ..................................... 10 comparator propagation delay dispersion ........................... 10 comparator hysteresis .............................................................. 11 minimum input slew rate requirements .............................. 11 typical application circuits.......................................................... 12 timing information ....................................................................... 13 outline dimensions ....................................................................... 14 ordering guide .......................................................................... 14 revision history 4/05revision 0: initial version
adcmp572/adcmp573 rev. 0 | page 3 of 16 electrical characteristics v cci = v cco = 3.3 v, t a = ?40c to +125c, typical at t a = +25c, unless otherwise noted. table 1. parameter symbol conditions min typ max unit dc input characteristics input voltage range v p , v n v cci = 3.3 v, v cco = 3.3 v ?0.2 +1.2 v v cci = 5.2 v, v cco = 3.3 v ?0.2 +3.1 v input differential voltage ?1.2 +1.2 v input offset voltage v os ?5.0 2.0 +5.0 mv offset voltage tempco ?v os /dt 10.0 v/c input bias current i p , i n open termination ?50.0 ?25.0 0.0 a input bias current tempco 50.0 na/c input offset current 2.0 a input impedance 50 ? input resistance, differential open termination 50 k? input resistance, common-mode open termination 500 k? active gain a v 54 db v cci = 3.3 v, v cco = 3.3 v, v cm = 0.0 v to 1.0 v 65 db common-mode rejection cmrr v cci = 5.2 v, v cco = 3.3 v, v cm = 0.0 v to 3.0 v 65 db power supply rejectionv cci psr vcci v cci = 3.3 v 5%, v cco = 3.3 v 74 db hysteresis r hys = 1 mv latch enable characteristics adcmp572 latch enable input range 2.8 v cco + 0.2 v latch enable input differential 0.2 0.4 0.5 v latch setup time t s v od = 100 mv 15 ps latch hold time t h v od = 100 mv 5 ps adcmp573 latch enable input range 1.8 v cco ? 0.6 v latch enable input differential 0.2 0.4 0.5 v latch setup time t s v od = 100 mv 90 ps latch hold time t h v od = 100 mv 100 ps latch enable input impedance 50.0 ? latch to output delay t ploh, t plol v od = 100 mv 150 ps latch minimum pulse width t pl v od = 100 mv 100 ps dc output characteristics adcmp572 (cml) output impedance z out ?8 ma < i out < 8 ma 50.0 ? output voltage high level v oh 50 ? terminate to v cco v cco ? 0.10 v cco ? 0.05 v cco v output voltage low level v ol 50 ? terminate to v cco v cco ? 0.60 v cco ? 0.45 v cco ? 0.30 v output voltage differential 50 ? terminate to v cco 300 375 450 mv adcmp573 (rspecl) output voltage high ?40c v oh 50 ? terminate to v cco ? 2.0 v cco ? 1.14 v cco ? 1.02 v cco ? 0.90 v output voltage high +25c v oh 50 ? terminate to v cco ? 2.0 v cco ? 1.10 v cco ? 0.98 v cco ? 0.86 v output voltage high +125c v oh 50 ? terminate to v cco ? 2.0 v cco ? 1.04 v cco ? 0.92 v cco ? 0.80 v output voltage low ?40c v ol 50 ? terminate to v cco ? 2.0 v cco ? 1.54 v cco ? 1.39 v cco ? 1.24 v output voltage low +25c v ol 50 ? terminate to v cco ? 2.0 v cco ? 1.50 v cco ? 1.35 v cco ? 1.20 v output voltage low +125c v ol 50 ? terminate to v cco ? 2.0 v cco ? 1.44 v cco ? 1.29 v cco ? 1.14 v output voltage differential 50 ? terminate to v cco ? 2.0 300 375 450 mv
adcmp572/adcmp573 rev. 0 | page 4 of 16 parameter symbol conditions min typ max unit ac performance propagation delay t pd v cci = 3.3 v, v od = 200 mv 150 ps v cci = 3.3 v, v od = 20 mv 165 ps v cci = 5.2 v, v od = 200 mv 145 ps propagation delay tempco ?t pd /dt 0.5 ps/c prop delay skewrising transition to falling transition v od = 200 mv, 5 v/ns 10 ps 50 mv < v od < 0.2 v, 5 v/ns 15 ps overdrive dispersion 10 mv < v od < 0.2 v, 5 v/ns 15 ps slew rate dispersion 2 v/ns to 10 v/ns, 250 mv od 15 ps pulse width dispersion 100 ps to 5 ns, 250 mv od 5 ps v cci = 3.3 v, 1 v/ns, 250 mv od 5 10% C 90% duty cycle dispersion v cci = 5.2 v, 1 v/ns, 250 mv od 10 ps common-mode dispersion v od = 0.2v, 0.0 v < v cm < 2.9 v 5 ps/v equivalent input bandwidth 1 bw eq 0.0 v to 250 mv input t r = t f = 17 ps, 20/80 8.0 ghz toggle rate >50% output swing 12.5 gbps deterministic jitter dj v od = 200 mv, 5 v/ns, prbs 31 ? 1 nrz, 4 gbps 10 ps v od = 200 mv, 5 v/ns, prbs 31 ? 1 nrz, 10 gbps 20 ps rms random jitter rj v od = 200 mv, 5 v/ns, 1.25 ghz 0.2 ps minimum pulse width pw min ?t pd /?pw < 5 ps, 200 mv od 100 ps pw min ?t pd /?pw < 10 ps, 200 mv od 80 ps rise time t r 20/80 35 ps fall time t f 20/80 35 ps power supply input supply voltage range v cci 3.1 5.4 v output supply voltage range v cco 3.1 5.4 v positive supply differential v cci ?v cco ?0.2 +2.3 v adcmp572 (cml) v cci = 3.3 v, v cco = 3.3 v, terminate 50 ? to v cco 44 52 positive supply current i vcci + i vcco v cci = 5.2 v, v cco = 5.2 v, terminate 50 ? to v cco 44 52 ma v cci = 3.3 v, v cco = 3.3 v, terminate 50 ? to v cco 140 165 device power dissipation p d v cci = 5.2 v, v cco = 5.2 v, terminate 50 ? to v cco 230 265 mw adcmp573 (rspecl) v cci = 3.3 v, v cco = 3.3 v, 50 ? to v cco ? 2 v 62 80 positive supply current i vcci + i vcco v cci = 5.2 v, v cco = 5.2 v, 50 ? to v cco ? 2v 64 80 ma v cci = 3.3 v, v cco = 3.3 v, 50 ? to v cco ? 2 v 110 160 device power dissipation p d v cci = 5.2 v, v cco = 5.2 v, 50 ? to v cco ? 2 v 146 230 mw 1 equivalent input bandwidth assumes a simple first-order response and is calculated with the following formula: bw eq = 0.22/ (tr comp 2 ?tr in 2 ), where tr in is the 20/80 transition time of a quasi-gaussian signal applied to the comparator input, and tr comp is the effective transition time digitized by the comparator.
adcmp572/adcmp573 rev. 0 | page 5 of 1 6 absolute maximum ratings table 2. p a r a m e t e r r a t i n g supply volta g e in p u t suppl y vo lta g e (v cci t o gn d) ?0.5 v to +6.0 v output supply voltage (v cco to gnd ) ?0.5 v to +6.0 v positive supply differential (v cci ? v cco ) ?0.5 v to +3.5 v input voltage input voltage ?0.5 v to v cci + 0.5 v differential input voltage ( v cci + 0.5 v) input voltage, latch enable ?0.5 v to v cco + 0.5 v hysteresi s control pi n applied voltage ( h ys to gnd) ?0.5 v to +1.5 v max imum input/ output current 1 ma o u tput curr e n t adcmp572 (cml) 20 ma adcmp573 (rsp ecl) ?35 ma tempe r atu r e operating tem p erature, ambie n t ?40c to +125c operating tem p erature, junction +150c storage temperature range ?65c to +150c s t r e s s a b o v e t h o s e lis t e d u n der a b s o l u t e m a xi m u m r a t i n g s ma y ca us e p e r m a n e n t da ma g e t o t h e de vic e . this is a s t r e s s ra t i n g on ly an d f u nc t i on a l op e r a t i o n of t h e d e v i c e a t t h e s e or a n y ot h e r co ndi t i on s ab o v e t h o s e i ndic a te d in t h e op er a t i o na l s e c t io n o f t h is sp e c if ic a t ion is n o t i m plie d . e x p o sur e t o a b s o l u t e maxi m u m r a t i n g condi t i on s fo r ex ten d e d p e r i o d s ma y a f fe c t de vic e rel i a b i l it y . thermal considerations the ad cmp57 2 /ad c mp573 lfcs p 16-lead p a c k a g e has a ja (j u n c t io n - t o -am b ie n t t h er ma l r e sist a n c e ) o f 70c/ w i n st i l l a i r . esd caution esd ( e lectrostatic d i scharge) sen s itive d evice. e l e c trostatic cha r ges as high as 40 00 v read ily acc u mulate on the human body and test eq uip m ent and can discharge wi thout detection. although this product features proprietary esd protection circ uitry, permanent dama ge may occur on device s subjected to high energy electrostatic discharges. theref ore, prop er esd precautions are recomme n d ed to avoid performan c e degradation or l o ss of functiona l ity.
adcmp572/adcmp573 rev. 0 | page 6 of 1 6 pin conf iguration and fu nction descriptions 04409-026 5 v cci 6 le 7 le 8 v cco /v tt adcmp572 adcmp573 top view (not to scale) 1 v tp pin1 2 v p 3 v n 4 v tn 16 v cci 15 gnd 14 hy s 13 gnd v cco 12 q 11 q 10 v cco 9 f i g u re 2. a d c m p 5 7 2 /a dc m p 57 3 pin conf ig ur at i o n ta ble 3. pi n f u nct i on d e s c ri pt i o ns pin no. mnemonic description 1 v tp termination res i stor return pin for v p input. 2 v p noninverting analog input. 3 v n inverting analog input. 4 v tn termination res i stor return pin for v n input. 5, 16 v cci positive supply voltage for input stage. 6 le latch enable input pin, inverting side. in compare mode ( le = low), the output tracks changes at the input of the comparator. in latch mode ( le = high), the output reflects the input st ate just prior to the comp arators bei n g placed into latch mode. le must be driven in complement with le . 7 l e latch enable in put pin, noninverting side. in compare mode (le = high), t h e output tracks changes at the i n put of the comparator. in latch mod e ( le = low) , the outp ut reflects the input state j u st prior to the comparators bei n g placed into latch mode. le must be driven in compliment with le . 8 v cco /v tt termination return pin for the le/ le input pins. for the adcmp 572 (cml output stage), this pin is internally connected to and also should be externally conn ected to the positive v cco supply . for the adcmp 573 (rsp ecl output stage), this pi n shou ld nor m ally be connected to the v cco C 2 v termination pot ential. 9, 12 v cco positive supply voltage for the cml/rspecl ou tput stage. 13, 15 gnd ground. 10 q inverting output. q is at logic low if the analog vo ltage at the noninverting input, v p , is greater than the analog v o lta g e at the inverting input, v n , pro v ided the comparator is in co m p are mode. see the le/ le descriptions (pins 6 and 7) fo r more informati o n. 1 1 q noninverting output. q is at logic high if th e analog vo ltage at the noninvertin g input v p is gre a ter than the analog voltage at the in verting input, v n , provided the comparator i s in compare m o de. see the le/ le descriptions (pins 6 and 7) for more information. 1 4 h y s hysteresis control pin. leave this pin disconnect ed for zero hysteresis. co nnect to gnd with a suitably sized re sistor to ad d the d e sired amount of hysteresis. refer to figure 7 for proper sizing of r hys hysteresis control resistor. isolated heat sink n/c the metallic ba c k surface of the package i s not e l ectric al ly conne cted to any part of the circuit, and it can be left floating for best elec t r ical isolation be tween the packag e handle and the substrate of the die. however, it can be soldered to the applicat i o n board if impr o ved thermal an d/or mechan ical stability is desir e d.
adcmp572/adcmp573 rev. 0 | page 7 of 1 6 typical perf orm ance cha r acte ristics v cc i = v cco = 3. 3 v , t a = 25c, unles s o t h e r w is e n o t e d. p r op agation de lay e rror (ps ) 0 5 10 15 20 0 5 0 100 150 200 250 input overdrive voltage (mv) 04409-039 f i g u re 3. pr op ag at i o n d e lay v s . input o v er dr ive 155.5 156.0 156.5 157.0 157.5 158.0 158.5 p r op agation de lay (ps ) 0.4 0.6 0 0.2 0.8 1.0 1.2 input common-mode voltage (v) 04409-040 f i g u re 4. pr op ag at i o n d e lay v s . input com m o n-m o d e 146 148 150 152 154 156 158 160 p r op agation de lay (ps ) 20 0 ?40 ? 2 0 ? 6 0 4 06 08 0 1 0 0 temperature (c) 04409-041 f i g u re 5. pr op ag at i o n d e lay v s . t e mpe r at ure 36.0 36.5 37.0 37.5 38.0 38.5 39.0 rise/fall time (ps) 20 0 ?40 ? 2 0 ? 6 0 4 06 08 0 1 0 0 temperature (c) 04409-042 f i g u re 6. r i s e /f a ll tim e v s . t e mpe r at u r e 0 10 20 30 40 50 60 h yster esis ( m v) 23 01 4 5 6 r hys (k ? ) 04409-043 fi g u r e 7 . h y s t e r e s i s v s . r hy s con t rol r e s i s t or r hys sink current ( a) h yster esis ( m v) 80 70 40 30 50 60 20 10 0 ? 600 ? 500 ?400 ?300 ? 200 ?100 0 04409-047 fi g u r e 8 . h y s t e r e s i s v s . r hy s sink cu rren t
adcmp572/adcmp573 rev. 0 | page 8 of 1 6 ? 18.5 ? 18.0 ? 17.5 ? 17.0 ? 16.5 ? 16.0 ? 15.5 ? 15.0 inp u t bias curre nt ( a) ? 0.5 ?0.3 ?0.1 0.1 0.3 0.5 0.7 0.9 1.1 1.3 1.5 v p input voltage (v n = ? 0.2v) 04409-044 f i gure 9. input bias c u rrent vs. input d i ffer e ntial ? 16.9 ? 16.8 ? 16.7 ? 16.6 ? 16.5 ? 16.4 ? 16.3 ? 16.2 inp u t bias curre nt ( a) 20 0 ?40 ? 2 0 ? 6 0 4 06 08 0 1 0 0 temperature (c) 04409-045 f i gure 10. input b i a s current v s . t e mpe r ature temperature ( c) offset ( m v) 0.5 0.4 0.3 0.2 0.1 0 ?0.1 ?0.2 ?0.3 ?0.4 ?0.5 ?50 0 50 100 75 25 ?25 125 04409-024 f i gure 11. input o f f s et v o ltag e v s . t e m p er atu r e 373 374 375 376 377 378 379 380 ou tpu t levels ( m v) 20 0 ?40 ? 2 0 ? 6 0 4 06 08 0 1 0 0 temperature (c) 04409-046 f i g u re 12. o u t p ut l e vels v s . t e mpe r at u r e 04409-049 496.0mv 504.0mv 60.00ps/div m1 f i g u re 13. a d c m p5 72 eye d i ag r a m at 2.5 gbps 04409-050 500.0mv 500.0mv 25.00ps/div f i g u re 14. a d c m p5 72 eye d i ag r a m at 6.5 gbps
adcmp572/adcmp573 rev. 0 | page 9 of 1 6 application information power/ground layout and bypassing the ad cmp57 2 /ad c mp573 co m p a r a t o r s a r e v e r y hig h s p ee d sig e de vices. c o n s e q ue n t l y , i t i s es s e n t ial t o us e p r o p er hig h sp e e d desig n te chniq u es to ach i e v e t h e sp e c if ie d p e r f o r ma n c e. of cr i t ica l im p o r t a n ce is t h e us e o f lo w im p e d a n c e su p p ly pl ane s , p a r t ic u l arly t h e out p u t s u p p ly pl ane ( v cc o ) a n d the g r o u n d p l an e ( g nd). i n di vid u al s u p p l y p l an es a r e r e co m- m e n d ed as p a r t o f a m u l t il a y er bo a r d . p r o v iding th e lo w e s t ind u c t an ce r e t u r n p a th fo r swi t c h in g c u r r en ts e n s u r e s th e best p o s s i b le p e r f o r ma nce i n t h e t a rg et a p plic a t ion. i t is im p o r t an t to ade q u a te ly b y p a ss t h e in p u t and o u t p u t su p p l i e s . a 1 f el e c t r oly t ic b y p a ss c a p a c i tor shou l d b e p l ac e d wi t h in s e veral in ch es o f eac h p o w e r s u p p l y p i n t o g r o u n d . i n addi tio n , m u l t i p le hig h q u ali t y 0.01 f b y p a s s ca p a ci t o rs sh o u ld be p l ace d as c l os e as p o s s i b le t o eac h o f th e v cc i a nd v cco su p p ly p i ns and shou l d b e c o n n e c te d to t h e g n d pl ane w i t h r e d u n d a n t vi a s . h i gh f r eq uen c y b y pa s s ca pa ci t o r s s h o u l d be ca r e f u l l y s e le c t e d fo r mini m u m ind u c t an ce an d es r . p a rasi t i c la yo u t ind u c t ance sh o u ld be a v o i de d t o maximize the ef fe c t i v en es s o f t h e b y p a s s a t hi g h f r e q uen c ies. i f t h e i n p u t and ou t p ut su p p l i e s are c o n n e c te d s e p a r a tely su c h th a t v cc i v cco , c a re shou l d b e t a k e n to b y p a ss e a ch of t h e s e su p p l i e s s e p a r a tely to t h e g n d pl ane. a b y p a ss c a p a c i tor s h ou l d n o t b e con n e c te d b e twe e n t h e m . i t is r e co mm e nde d t h a t t h e gnd plan e s e p a ra t e t h e v cc i and v cco pla n es w h en t h e cir c ui t b o a r d l a yo u t is desig n e d to m i n i mi ze co u p l i n g b e tw e e n t h e t w o s u p p lies and t o t a k e ad v a n t a g e o f t h e addi t i o n a l b y p a s s ca p a c i - ta nce f r o m each r e s p ec ti v e su p p l y t o th e g r o u nd p l an e . this enhan c es t h e p e r f o r ma n c e w h e n s p li t in p u t/out p u t s u p p lies a r e us e d . i f t h e in p u t a nd o u t p ut s u p p lies a r e co nn e c t e d t o g e t h er fo r s i n g l e - s u p p l y o p e r at i o n s u c h t h at v cc i = v cco , c o u p l i n g b e t w e e n t h e tw o s u p p lies is una v o i da b l e; h o w e v e r , e v er y ef fo r t s h o u ld b e made t o k e ep t h e s u p p l y plan e ad jace n t t o t h e g n d pl an e t o max i mi ze t h e a ddi t i ona l b y p a ss ca p a c i t a n c e t h is a r ra n g em e n t prov i d e s . cml/rspecl outpu t s t age s p e c if ie d p r o p aga t io n d e l a y disp ersio n p e r f o r ma nce can b e achie v e d o n ly b y usin g p r o p er t r a n smissio n li ne t e r m ina t io n s . the o u t p u t s o f t h e ad cmp572 a r e desig n ed t o dir e c t l y dr i v e 400 mv in t o 50 ? ca b l e , micr os t r i p , o r s t r i p lin e tra n smis sio n l i ne s prop e r ly te r m i n a t e d to t h e v cco su p p ly pl ane. t h e c m l output st age i s s h ow n i n t h e s i m p l i f i e d s c he m a t i c d i ag r a m of f i gur e 15. th e ou t p u t s a r e each bac k t e r m ina t e d wi th 50 ? f o r bes t tran smis sion lin e ma t c hing. the rs p e cl ou t p u t s o f th e ad cmp573 a r e il l u s t ra t e d in f i g u r e 1 6 and sh ou ld be te r m i n a t e d to v cco ? 2 v . a s a n a l t e rn a t i v e , t h ev e n i n eq u i v a l e n t t e r m ina t ion n e t w o r ks can b e us e d i n ei t h er c a s e if t h e d i r e c t t e r m ina t ion v o lt a g e is n o t r e a d i l y a v a i lab l e . i f hi g h sp e e d o u t p ut sig n als m u s t b e r o u t e d m o r e than a ce n t im e t er , micr os tr i p o r s t r i p line t e chniq u es a r e es s e n t ial t o en s u r e p r op er t r a n si t i on t i m e s an d to p r e v en t o u t p u t r i ng in g an d p u ls e wi d t h d e p e n d e n t p r o p a g a t io n del a y disp ersion. f o r t h e m o st t i m i n g cr i t ica l a p plic a t ion s w h er e t r a n smission li n e r e f l e c t i o n s p o s e t h e g r ea t e s t r i s k t o p e r f o r ma n c e , the ad cmp572 p r o v ides th e best ma tc h to 5 0 ? out p ut t r ans m i s s i on p a t h s . q 16ma 50 ? q 04409-037 v cco gnd f i gur e 1 5 . sim p li fied sc he ma tic d i a g r a m o f t h e a d cm p 5 7 2 cm l ou t p u t s t a g e 04409-038 v cco gnd q q f i gur e 1 6 . sim p li fied sc he ma tic d i a g r a m o f t h e a d c m p5 73 r s pe cl o u t p ut st ag e using/dis a bling the l a tch feature the l a tch in p u ts ( l e/ le ) a r e ac ti v e lo w f o r la t c h mo de an d a r e i n te r n a l ly te r m i n a t e d w i t h 5 0 ? re s i stors to pi n 8 . th i s pi n co r r esp o n d s to a nd is i n ter n a l ly co nne c t e d to t h e v cco su p p ly f o r th e cml - com p a t i b le ad cmp572. w i t h the a i d o f t h es e r e sis t o r s th e ad cmp572 la t c h f u n c tion can be dis a b l e d b y co nne c t in g t h e le pi n to g n d w i t h an e x te r n a l pu l l - d ow n r e sisto r a nd le a v in g t h e le p i n un co n n e c te d . t o a v o i d excessi v e p o w e r dis s i p a t io n, th e r e sis t o r s h o u ld b e 750 ? wh en v cco = 3.3 v , a nd 1.2 k? wh en v cco = 5.2 v . i n t h e p e cl -com p a t i b l e ad cmp573, t h e v tt p i n sh o u l d b e co n n e c te d ex ter n a l ly to t h e pe c l te r m in a t i o n su p p ly a t v cco C 2 v . th e l a tc h can t h en be dis a b l e d b y co n n e c t i n g t h e le p i n to v cco wi t h a n ext e r n a l
adcmp572/adcmp573 rev. 0 | page 10 of 16 500 ? r e sis t o r a nd lea v in g t h e le p i n di s c o n n e c t e d . i n t h is cas e , t h e r e sisto r va l u e do es n o t de p e nd o n t h e v cco su p p ly vol t age. v cco is th e sig n al r e t u r n f o r th e o u t p u t s t a g e and v cco pi ns shou l d of c o u r s e b e c o n n e c te d to a su p p ly pl ane for max i m u m pe rf o r m a n c e . optimizing high spee d perform a nce a s wi t h an y hig h sp e e d com p a r a t o r , p r o p er desi g n an d la yo u t t e chniq u es a r e es s e n t ial t o ob t a i n in g t h e sp e c if i e d p e r f o r ma n c e. s t r a y ca p a ci t a n c e, ind u c t an ce, i n d u c t i v e p o w e r and g r o u nd i m p e d a nc e s , or ot he r l a y o ut i s s u e s c a n s e ve rely l i m i t p e r f o r ma n c e and o f te n c a us e o s ci l l a t ion. dis c on t i n u i t ies a l o n g in p u t an d o u t p u t tra n smis sion lin e s c a n s e v e r e l y limi t t h e sp e c if ie d p u ls e wi d t h disp ersion p e r f o r ma n c e . f o r a p plica t ion s w o rk in g i n a 50 ? en vir o n m e n t , in p u t and o u t p ut ma t c hi ng has a sig n if i c an t i m p a c t o n d a t a dep e n d e n t (or deter m inist i c) ji t t er (d j) and o n p u ls e wi d t h disp ersio n p e r f o r m a n c e . th e ad cmp572 /ad c mp573 c o m p a r a t o r s prov i d e i n te r n a l 5 0 ? te r m i n a t i o n re s i stors for b o t h t h e v p an d v n in p u ts, an d t h e ad cmp572 p r o v ides 50 ? bac k t e r m ina t e d o u t p uts. t h e r e tur n side fo r e a ch in p u t ter m i n a t io n is p i nne d o u t s e p a ra te ly w i t h t h e v tp a nd v tn pi ns , re sp e c t i vely . i f a 5 0 ? t e r m ina t ion is d e sir e d a t one o r b o t h o f t h e v p /v n in pu ts, t h en th e v tp an d v tn p i n s c a n b e con n e c te d (o r dis c onn e c t e d ) to (f r o m) t h e desir e d t e r m in a t ion p o t e n t ia l as r e quir e d . t h e t e r m ina t ion p o ten t ia l sh o u ld b e ca r e f u l l y b y p a ss e d usin g h i g h q u al i t y b y pa s s ca pa c i t o r s as d i sc u s sed ea r l i e r t o p r ev e n t un desir e d aber ra tio n s on t h e in p u t sig n al d u e to p a rasi tic ind u c t an ce in t h e cir c ui t b o a r d la yo u t . i f a 50 ? in p u t t e r m ina t ion is no t desir e d , ei t h e r o n e o r b o t h o f t h e v tp /v tn ter m ina t ion p i ns ca n b e lef t dis c o nne c t e d . i n t h is cas e , t h e pin s shou l d b e l e f t f l o a t i ng w i t h no e x te r n a l pu l l - d ow ns or b y p a ss i n g ca p a c i t o rs. w h en le a v in g an in p u t t e r m i n a t io n dis c on n e c t e d , t h e in t e r n a l r e sis t o r ac ts as a smal l s t ub o n t h e in p u t tra n smis sio n p a t h an d ca n ca us e p r ob lem s f o r v e r y high s p e e d in p u ts. ref l ec tio n s shou l d t h e n b e e x p e c t e d f r om t h e c o m p ar ator i n put s b e c a u s e t h e y no l o nge r prov i d e m a tc he d i m p e d a nc e to t h e i n put p a t h leadin g t o t h e device . i n this cas e , i t is im p o r t a n t t o bac k ma t c h t h e dr i v e s o ur ce im p e dan c e t o t h e i n p u t t r a n smis sio n p a t h t o mini mi ze m u l t i p le r e f l e c t i o n s. f o r a p plica t ion s in w h ich t h e co m p a r a t o r is v e r y c l os e t o th e dr i v in g sig n al s o ur ce , th e s o ur c e i m p e d a nc e s h o u l d b e m i n i m i z e d. h i g h s o u r c e i m p e d a nc e i n co m b i n a t i o n w i th pa ra si ti c in p u t ca pa ci ta n c e o f th e co m p a r a t o r mig h t c a us e a n un desir a b l e deg r ada t io n in b a nd w i d t h a t t h e in p u t, t h er efo r e deg r adi n g t h e o v eral l r e s p o n s e . a l t h o u g h t h e ad cmp572 / ad cmp573 com p a r a t o r s ha v e b e en desig n e d t o m i n i m i z e in p u t ca pa ci ta n c e , so m e pa ra si ti c ca p a ci ta n c e i s ine v i t a b le . i t is t h er efo r e r e co mm e n de d t h a t t h e dr i v e s o ur ce i m p e da n c e be n o m o r e th a n 50 ? f o r be s t h i g h s p ee d pe rf o r m a n c e . compara t or propag ation delay disp ersion the ad cmp57 2 /ad c mp573 co m p a r a t o r s a r e desig n e d t o re d u c e prop ag a t i o n d e l a y d i sp e r s i on ove r a w i d e i n put ove r d r ive ra n g e o f 5 mv to 500 mv . p r o p a g a t ion de l a y dis p ersio n is va r i a t ion i n t h e p r o p a g a t io n del a y t h a t r e su l t s f r o m a chan ge i n t h e d e g r e e of ove r d r ive or sl e w r a te ( h ow f a r or how f a s t t h e in p u t sig n al exce e d s the s w i t c h in g thr e s h ol d). pr o p a g a t io n d e l a y disp ersion is a sp e c if ica t io n t h a t b e com e s i m po r t a n t in h i gh s p e e d , tim e -cri ti cal a p p l i c a t io n s s u c h a s da t a c o m m u n i c at i o n , au t o m a t i c t e s t a n d m e a s u r e m e n t , i n s t r u m e nt a - ti o n , a n d ev en t d r i v e n a p p l i c a t io n s s u c h a s p u l s e s p ectr osco p y , n u cle a r in st r u men t a t io n, and me dica l ima g in g. disp ersio n is def i n e d as t h e v a r i a t ion i n p r o p a g a t ion d e l a y as t h e i n p u t o v er - dr i v e co ndi t i o n s va r y (f igur e 17 a nd f i gur e 18 ). f o r t h e ad cmp572 /ad c mp573, disp ersio n is typ i c a l l y <15 ps bec a u s e th e o v er dr i v e var i es f r o m 10 mv t o 500 mv , and the in p u t s l ew ra t e va r i es f r o m 2 v/n s t o 10 v/ n s . this sp e c if ic a t io n a p plies fo r bo th p o si ti v e and n e ga t i v e sig n a l s sin c e t h e ad cmp572/ ad cmp573 has s u bs t a n t ial l y e q ual de l a ys f o r ei th er p o si ti v e g o in g o r nega t i ve g o in g in p u ts. q/q output input voltage 500mv overdrive 10mv overdrive dispersion v n v os 04409-0-027 f i gure 17. p r opag a t ion d e l a y o v er d r ive d i spers i on q/q output input voltage 10v/ns 1v/ns dispersion v n v os 04409-0-028 f i g u re 18. p r opag a t ion d e l a ysl ew r a te d i s p e r s i o n
adcmp572/adcmp573 rev. 0 | page 11 of 16 comparator hystere s is t h e a d d i t i o n of h y ste r e s i s to a c o m p ar a t or i s of t e n d e s i r a bl e i n a n o i s y en v i r o nm e n t o r w h en t h e d i f f e r e n ti al i n p u t a m p l i t ud es a r e r e la t i v e l y smal l o r s l o w m o ving, b u t exces s i v e h y s t er esis has a cos t in deg r ade d acc u rac y a nd s l ew-ind uced t i min g shif ts. the tra n sf er f u n c tion f o r a co m p a r a t o r wi t h h y s t er esis is s h o w n in f i gur e 19. i f t h e in p u t v o l t a g e a p p r o a ch es t h e t h r e s h old (0.0 v i n th i s e x a m p l e ) f r o m th e n e ga ti v e d i r e cti o n , th e co m p a r a t o r sw i t ch es f r o m l o w t o hig h w h e n t h e in p u t cr oss e s +vh/2. th e ne w s w i t ch in g t h r e sh old b e comes ?v h /2. t h e c o m p a r a t o r r e ma in s i n t h e hig h st a t e un t i l t h e t h r e sh old ? v h /2 is cr oss e d f r o m t h e p o si t i ve dir e c t ion. i n t h is ma nn er , n o i s e cen t er e d on 0.0 v in p u t do es n o t ca us e t h e co m p a r a t o r t o swi t c h s t a t es un less i t exce e d s t h e r e g i on b o u n de d b y v h /2 . output input 0 v ol v oh +v h 2 ?v h 2 04409-005 f i gur e 1 9 . c o m p a r a t or hyst er e s i s t r ansfe r f u ncti on the c u st o m a r y t e chni q u e fo r in t r o d ucin g h y st e r esis in t o a c o m p ar ator u s e s p o s i t i ve f e e d b a ck f r om t h e output b a ck to t h e i n p u t . a lim i t a tio n o f th i s a p p r o a c h i s th a t th e a m o u n t o f h y s t er esis va r i es wi t h t h e o u t p u t log i c le v e l s, r e s u l t in g i n h y ster esis t h a t c a n b e lo ad de p e n d e n t and is n o t sy m m et r i ca l a b o u t t h e t h r e sh old . th e exter n a l fe e d b a ck n e tw o r k ca n a l s o in t r o d uc e sig n if ica n t p a rasi t i cs, w h ich r e d u ce h i g h sp e e d p e r f o r ma n c e and can e v en i n d u ce o s ci l l a t ion i n s o m e cas e s. the ad cmp57 2 /ad c mp573 co m p a r a t o r s o f f e r a p r og ra m- ma b l e h y s t er esis fe a t ur e t h a t can sig n if ican t l y i m p r o v e t h e acc u r a c y a n d st a b i l i t y o f t h e desir e d h y ster esis. by co nn e c t i n g a n ext e r n al p u l l - do wn r e sis t o r f r o m th e hy s p i n t o gnd , a va r i a b le am o u n t o f h y st er esis c a n b e a p plie d . l e a v in g t h e hy s p i n di s c o n n e c t e d dis a b l es t h e fe a t ur e, and h y ste r esis is t h en less t h a n 1 mv as sp e c if ie d . th e maxim u m h y s t er es is t h a t c a n b e a p plie d usin g t h is m e t h o d is a p p r o x ima t e l y 25 mv wi t h t h e pi n g r ou n d e d. f i g u re 2 0 i l lu st r a te s t h e a m ou n t of h y ste r e s i s a p pl i e d a s a f u n c t i on of e x te r n a l re s i stor v a lu e. t h e a d v a n t age s o f a p pl yin g h y s t er esis in t h is mann er a r e im p r o v e d acc u rac y , st a b i l i t y , a nd r e d u ce d com p o n e n t co un t. an exter n a l b y p a ss c a p a c i tor i s not re c o m m e nd e d on t h e h y s pi n b e c a u s e i t wou l d li k e l y deg r ade t h e ji t t er p e r f o r ma nce o f t h e de vice . the h y s t er esis p i n c o u l d als o be dr iv en b y a cm os d a c. i t is b i as e d t o a p p r o x ima t e l y 250 mv an d has a n in ter n al s e r i es r e sis t a n ce o f 600 ?. 0 10 20 30 40 50 60 h yster esis ( m v) 23 01 4 5 6 r hys (k ? ) 04409-043 f i g u re 20. h y s t e r es i s v s . r hy s c o ntr o l r e si st o r minimum input slew rate requirements a s wi t h a l l hig h sp e e d co m p a r a t o r s, a mini m u m sle w r a te r e q u ir em e n t m u s t b e m e t t o ens u r e t h a t t h e de vice do es n o t os cil l a t e as t h e in p u t sig n al cr oss e s t h e t h r e sh ol d . this os ci l l a t ion is d u e in p a r t t o t h e hig h i n p u t b a n d wi d t h o f t h e c o m p ar a t or an d t h e fe e d b a c k p a r a s i t i c s i n he re n t i n t h e p a ck age. a min i m u m sl e w r a te of 5 0 v / s shou l d e n su re cl e a n ou tp u t tra n si tio n s f r o m th e ad cm p57 2 / ad cmp573 co m p a r a t o r s. t h e s l e w ra t e ma y be t o o s l o w f o r o t h e r r e aso n s. t h e extr em e l y h i gh ba n d w id th o f th e s e de v i ces m e a n s th a t b r oa d b a n d n o ise ca n b e a sig n if ic a n t fac t o r w h en in p u t sle w ra t e s a r e lo w . th er e wil l b e a t le ast 1 20 v o f t h er mal n o is e g e nera te d o v er t h e f u l l co m p a r a t o r b a nd w i d t h b y tw o 5 0 ? t e r m ina t ions a t r o o m t e m p era t ur e . w i th a s l ew ra t e o f o n l y 50 v/s the in p u t wil l be in side t h is n o is e b a nd fo r o v er 2 ps, r e n d er in g t h e com p a r a t o r s ji t t er p e r f o r ma nce o f 200 fs m o o t . r a isin g t h e slew ra t e o f th e in p u t sig n a l an d / o r r e d u cin g t h e b a ndwi d t h o v e r w h ich t h is r e s i s t a n ce i s seen a t t h e i n p u t ca n gr ea tl y r e d u ce j i t t e r .
adcmp572/adcmp573 rev. 0 | page 12 of 16 typical application circuits q 3.3v 50 ? 50 ? adcmp572 q v in v p v tp v tn v n latch inputs 04409-029 v cci v cco f i g u re 21. zero - c r o s s i ng d e tec t or wit h 3. 3 v c m l o u t p ut s q 50 ? 50 ? q v p v n v p v tp v tn v n latch inputs 04409-030 v cci = 5.2v adcmp572 v cco f i gure 22. l v ds to 50 ? ba ck t e rm in a t ed r s pe cl r eceive r 50 ? 50 ? + ? q q v in v th latch inputs gnd = ? 1v 04409-031 v cci = 3.3v v cco = 2.5v/3.3v 2.5v/3.3v adcmp572 f i g u re 23. co mp ar ato r w i t h 1 v inpu t rang e and 2.5 v o r 3.3 v c m l o u t p ut s 50 ? 50 ? q q v in v th latch inputs 04409-032 v cci = 5.2v v cco = 3.3v/5.2v 3.3v/5.2v adcmp572 f i g u re 24. co mp ar ato r w i t h 0 v t o 3 v input rang e a n d 3.3 v o r 5.2 v p o s i t i ve c m l o u t p ut s latch inputs 04409-034 v cci v cco = 3.3v 5v 75 ? 50 ? 50 ? 100 ? 100 ? adcmp572 f i g u re 25. inte r f a c i n g 3. 3 v c m l t o a 5 0 ? gr ou nd t e r m in at e d ins t rum e nt v cco v p v n v cco = 3.3v v cco 750 ? 04409-035 v cci adcmp572 50 ? 50 ? f i gure 2 6 . di sa b l i n g the adc m p 572 l a t c h f e a t ure v p v n 500 ? 04409-048 v cci = 5.2v = v cco v tt = 3.2v v cco adcmp573 50 ? 50 ? f i gure 2 7 . di sa b l i n g the adc m p 573 l a t c h f e a t ure hys v cco v cco 04409-036 v cci adcmp572 50 ? 50 ? 0 ? to 5k ? f i gure 28. adding h y ster es is using th e hys cont r o l pin
adcmp572/adcmp573 rev. 0 | page 13 of 16 timing informati on f i gur e 29 il l u s t ra t e s t h e ad cm p572/ad cmp5 73 co m p a r e an d la t c h timin g r e l a tio n s h i p s. t a b l e 4 p r o v ides def i ni tion s o f th e ter m s shown i n t h e f i g u re. 50% 50% v n v os 50% differential input voltage latch enable q output q output latch enable t h t pdl t pdh t ploh t plol t r t f v in v od t s t pl 04409-003 f i g u re 29. sy s t em tim i ng d i ag r a m table 4. timin g descriptions m b o l t i m i n g d e s c r i p t i o n t pdh input to output high delay propagation delay measured from the time th e i n put signal cro s ses the referenc e ( the input offset voltage) to the 50% point of an output low-to-high transition. t pdl input to output low delay propagation delay measured from the time th e i n put signal cro s ses the referenc e ( the input offset voltage) to the 50% point of an output high-to-low transition. t pl oh latch enable to output high del a y propagation del a y measured from the 50% point of the latch enable sig n al l o w- to-high transition to the 50% point of an output low-to-high transition. t pl ol latch enable to output low delay propagation del a y measured from the 50% point of the latch enable sig n al l o w- to-high transition to the 50% point of an output high-to- low transition. t h minimum hold time minimum time after the negative transition of t h e latch enable signal that the input signal must remain unchanged to be a c qu ired and held at the outpu t s. t pl minimum latch enable pulse wi dth minimum time that the latch en able sig n al must be high to acqu ire an input sign al change. t s minimum setup time minimum time before the negative transition of the latch enable signal that an input signal c h ange m u st be present to be acq u ired and held at the outputs. t r output rise time amount of time required to transition from a low to a high output as measured at the 20% and 80% p o ints. t f output fall time amount of time required to transition from a hig h to a low output as measured at the 20% and 80% p o ints. v od voltage overdri ve difference between the input voltages v a and v b .
adcmp572/adcmp573 rev. 0 | page 14 of 16 outline dimensions * compliant t o jedec standards mo-220-veed-2 except for exposed pad dimension 1 0.50 bsc 0.60 max pin 1 indicator 1.50 ref 0.50 0.40 0.30 0.25 min 0.45 2.75 bsc sq to p view 12 max 0.80 max 0.65 typ seating plane pin 1 indicato r 1.00 0.85 0.80 0.30 0.23 0.18 0.05 max 0.02 nom 0.20 ref 3.00 bsc sq 1.65 1.50 sq * 1.35 16 5 13 8 9 12 4 exposed pa d (bottom view) f i gure 30. 1 6 -l ead l e ad f r a m e ch ip s c a l e p a ck ag e [lfcs p ] 3 x 3 m m body (c p - 1 6 - 3 ) di me nsio ns sho w n i n mi ll im e t e r s ordering guide model temperature r a nge package descri ption package option adcmp572bcp- w p ?40c to 85c lfcsp-16 cp-16-3 adcmp572bcp- r 2 ?40c to 85c lfcsp-16 cp-16-3 adcmp572bcp- r l7 ?40c to 85c lfcsp-16 cp-16-3 eval-adc m p57 2 b c p e v a l u a t i o n b o a r d adcmp573bcp- w p ?40c to 85c lfcsp-16 cp-16-3 adcmp573bcp- r 2 ?40c to 85c lfcsp-16 cp-16-3 adcmp573bcp- r l7 ?40c to 85c lfcsp-16 cp-16-3 eval-adc m p57 3 b c p e v a l u a t i o n b o a r d
adcmp572/adcmp573 rev. 0 | page 15 of 16 notes
adcmp572/adcmp573 rev. 0 | page 16 of 16 notes ? 2005 analo g de vices, inc. all rights reserve d . tra d em arks and registered tra d ema r ks are the prop erty of their respective owners . d04409C0C 4/05(0)


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