View B150PG01_1572558.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

(c) copyright au optronics, inc. august, 2001 all rights reserved. B150PG01 ver. 04 1/1 no reproduction and redistribution allowed. product functional specification 15 inch sxga+ color tft lcd module model name : B150PG01 ( ) preliminary specification ( u ) final specification note: this specification is subject to change without notice.
(c) copyright au optronics, inc. august, 2001 all rights reserved. B150PG01 ver. 04 2/2 no reproduction and redistribution allowed. i. contents 1.0 handling precautions 2.0 general description 2.1 characteristics 2.2 functional block diagram 3.0 absolute maximum ratings 4.0 optical characteristics 5.0 signal interface 5.1 connectors 5.2 signal pin 5.3 signal description 5.4 signal electrical characteristics 5.5 signal for lamp connector 6.0 pixel format image 7.0 parameter guide line for cfl inverter 8.0 interface timings 8.1 timing characteristics 8.2 timing definition 9.0 power consumption 10.0 power on/off sequence 11.0 mechanical characteristics ii record of revision version and date page old description new description remark 0.1. 2001/8/13 all first edition for customer all 0.2 2001/12/12 5 (tr, tf)= (35,15) (tr, tf)= (15,35) 0.3 2002/3/5 8 update cie 0.3 2002/3/5 9 update pin assignment 0.4 2002/4/23 5,8 add luminance uniformity
(c) copyright au optronics, inc. august, 2001 all rights reserved. B150PG01 ver. 04 3/3 no reproduction and redistribution allowed. 1.0 handing precautions 1) since front polarizer is easily damaged, pay attention not to scratch it. 2) be sure to turn off power supply when inserting or disconnecting from input connector. 3) wipe off water drop immediately. long contact with water may cause discoloration or spots. 4) when the panel surface is soiled, wipe it with absorbent cotton or other soft cloth. 5) since the panel is made of glass, it may break or crack if dropped or bumped on hard surface. 6) since cmos lsi is used in this module, take care of static electricity and insure human earth when handling. 7) do not open nor modify the module assembly. 8) do not press the reflector sheet at the back of the module to any directions. 9) in case if a module has to be put back into the packing container slot after once it was taken out from the container, do not press the center of the ccfl reflector edge. instead, press at the far ends of the cfl reflector edge softly. otherwise the tft module may be damaged. 10) at the insertion or removal of the signal interface connector, be sure not to rotate nor tilt the interface connector of the tft module. 11) after installation of the tft module into an enclosure (notebook pc bezel, for example), do not twist nor bend the tft module even momentary. at designing the enclosure, it should be taken into consideration that no bending/twisting forces are applied to the tft module from outside. otherwise the tft module may be damaged. 12) cold cathode fluorescent lamp in lcd contains a small amount of mercury. please follow local ordinances or regulations for disposal. 13) small amount of materials having no flammability grade is used in the lcd module. the lcd module should be supplied by power complied with requirements of limited power source(2.11, iec60950 or ul1950), or be applied exemption. 14) the lcd module is designed so that the cfl in it is supplied by limited current circuit(2.4, iec60950 or ul1950). do not connect the cfl in hazardous voltage circuit.
(c) copyright au optronics, inc. august, 2001 all rights reserved. B150PG01 ver. 04 4/4 no reproduction and redistribution allowed. 2.0 general description this specification applies to the 15.0 inch color tft/lcd module B150PG01. this module is designed for a display unit of notebook style personal computer. the screen format is intended to support the sxga+ (1400(h) x 1050(v)) screen and 262k colors (rgb 6-bits data driver). all input signals are lvds interface compatible. this module does not contain an inverter card for backlight.
(c) copyright au optronics, inc. august, 2001 all rights reserved. B150PG01 ver. 04 5/5 no reproduction and redistribution allowed. 2.1 display characteristics the following items are characteristics summary on the table under 25 condition: items unit specifications screen diagonal [mm] 381 active area [mm] 304.5 x 228.375 pixels h x v 1400(x3) x 1050 pixel pitch [mm] 0.2175x0.2175 pixel arrangement r.g.b. vertical stripe display mode normally white typical white luminance (icfl=6.0ma) [cd/m 2 ] 150 (5 point average) luminance uniformity 1.25 max. (5 pts) 1.65 max. (13pts) contrast ratio 250 optical rise time/fall time [msec] 15/35 nominal input voltage vdd [volt] +3.3 typ. typical power consumption (vdd line + vcfl line) [watt] 5.7w weight [grams] 550g typ. physical size [mm] 317.3 x 242.0 x 6.0 max. electrical interface 2 channel lvds support color native 262k colors ( rgb 6-bit data driver ) temperature range operating storage (shipping) [ o c] [ o c] 0 to +50 -20 to +60
(c) copyright au optronics, inc. august, 2001 all rights reserved. B150PG01 ver. 04 6/6 no reproduction and redistribution allowed. 2.2 functional block diagram the following diagram shows the functional block of the 15.0 inches color tft/lcd module: tft array/cell vdd lcd controller lcd drive card backlight unit 1400(r/g/b) x 3 1050 gnd dc-dc converter ref circuit y-driver x-driver ro/ein0+/- ro/ein1+/- ro/ein2+/- ro/eclkin+/- ( 8 pairs lvds) jae fi-xb30sr-hf11 or compatible mating jae fi-s30m or fi-x30h jst bhsr-02vs- 1 mating type sm02b-bhss-1- tb lamp connector(2pin)
(c) copyright au optronics, inc. august, 2001 all rights reserved. B150PG01 ver. 04 7/7 no reproduction and redistribution allowed. 3.0 absolute maximum ratings absolute maximum ratings of the module is as following: item symbol min max unit conditions logic/lcd drive voltage vdd -0.3 +4.0 [volt] input voltage of signal vin -0.3 vdd+0.3 [volt] ccfl current icfl - 7 [ma] rms ccfl ignition voltage vs - 1150 vrms operating temperature top 0 +50 [ o c] note 1 operating humidity hop 8 95 [%rh] note 1 storage temperature tst -20 +60 [ o c] note 1 storage humidity hst 5 95 [%rh] note 1 vibration 1.5 10-500 (random) g hz 2hr/axis, x,y,z shock 220 , 2 g ms half sine wave note 1 : maximum wet-bulb should be 39 and no condensation.
(c) copyright au optronics, inc. august, 2001 all rights reserved. B150PG01 ver. 04 8/8 no reproduction and redistribution allowed. 4.0 optical characteristics the optical characteristics are measured under stable conditions as follows under 25 condition: item conditions typ. note viewing angle [degree] [degree] horizontal (right) k = 10 (left) 40 40 k: contrast ratio [degree] [degree] vertical (upper) k = 10 (lower) 10 30 contrast ratio 250 luminance uniformity 1.25 max. (5 pts) 1.65 max. (13pts) response time [msec] rising 15 45(max.) (room temp.) [msec] falling 35 45(max.) color red x 0.568 chromaticity red y 0.331 coordinates (cie) green x 0.305 green y 0.548 blue x 0.151 blue y 0.132 white x 0.313 white y 0.329 white luminance (ccfl 6.0 ma) [cd/m 2 ] 150 ( 5 points average)
(c) copyright au optronics, inc. august, 2001 all rights reserved. B150PG01 ver. 04 9/9 no reproduction and redistribution allowed. 5.0 signal interface 5.1 connectors physical interface is described as for the connector on module. these connectors are capable of accommodating the following signals and will be following components. connector name / designation for signal connector manufacturer jae or compatible type / part number fi-xb30sr-hf11 or compatible mating housing/part number fi-x30m, fi-x30c or fi-x30h mating contact/part number fi-c3-a1 connector name / designation for lamp connector manufacturer jst type / part number bhsr-02vs-1 mating type / part number sm02b-bhss-1-tb 5.2 signal pin pin# signal name pin# signal name 1 gnd 2 vdd 3 vdd 4 vedid 5 agmode 6 clkedid 7 dataedid 8 roin0- 9 roin0+ 10 gnd 11 roln1- 12 roln1+ 13 gnd 14 roin2- 15 roin2+ 16 gnd 17 roclkin- 18 roclkin+ 19 gnd 20 reln0- 21 reln0+ 22 gnd 23 reln1- 24 reln1+ 25 gnd 26 reln2- 27 reln2+ 28 gnd 29 reclkin- 30 reclkin+
(c) copyright au optronics, inc. august, 2001 all rights reserved. B150PG01 ver. 04 10/10 no reproduction and redistribution allowed. 5.3 signal description the module using a lvds receiver. lvds is a differential signal technology for lcd interface and high speed data transfer device. transmitter shall be sn75lvds84 (negative edge sampling) or compatible. signal name description roin0-, roin0+ lvds differential odd data input(red0-red5, green0) roin1-, roin1+ lvds differential odd data input(green1-green5, blue0-blue1) roin2-, roin2+ lvds differential odd data input(blue2-blue5, hsync, vsync, dsptmg) roclkin-, roclkin0+ lvds odd differential clock input rein0-, rein0+ lvds differential even data input(red0-red5, green0) rein1-, rein1+ lvds differential even data input(green1-green5, blue0-blue1) rein2-, rein2+ lvds differential even data input(only blue2-blue5) reclkin-, reclkin0+ lvds even differential clock input vdd +3.3v power supply gnd ground note: input signals shall be low or hi-z state when vdd is off. internal circuit of lvds inputs are as following.
(c) copyright au optronics, inc. august, 2001 all rights reserved. B150PG01 ver. 04 11/11 no reproduction and redistribution allowed. s n 7 5 l v d s 8 6 o r c o m p a t i b l e 5. roin0- 6. roin0+ 7. roin1- 8. roin1+ 9. roin2- 10. roin2+ 11. roclkin- 12. roclkin+ 13. rein0- 14. rein0+ 15. rein1- 16. rein1+ 17. rein2- 18. rein2+ 19. reclkin- 20. reclkin+ signal input the module uses a 100ohm resistor between positive and negative data lines of each receiver input
(c) copyright au optronics, inc. august, 2001 all rights reserved. B150PG01 ver. 04 12/12 no reproduction and redistribution allowed. signal name description red5 red4 red3 red2 red1 red0 red data 5 (msb) red data 4 red data 3 red data 2 red data 1 red data 0 (lsb) red-pixel data red-pixel data each red pixel's brightness data consists of these 6 bits pixel data. green 5 green 4 green 3 green 2 green 1 green 0 green data 5 (msb) green data 4 green data 3 green data 2 green data 1 green data 0 (lsb) green-pixel data green-pixel data each green pixel's brightness data consists of these 6 bits pixel data. blue 5 blue 4 blue 3 blue 2 blue 1 blue 0 blue data 5 (msb) blue data 4 blue data 3 blue data 2 blue data 1 blue data 0 (lsb) blue-pixel data blue-pixel data each blue pixel's brightness data consists of these 6 bits pixel data. dtclk data clock the typical frequency is 54.0 mhz.. the signal is used to strobe the pixel data and dsptmg signals. all pixel data shall be valid at the falling edge when the dsptmg signal is high. dsptmg display timing this signal is strobed at the falling edge of dtclk. when the signal is high, the pixel data shall be valid to be displayed. vsync vertical sync the signal is synchronized to dtclk . hsync horizontal sync the signal is synchronized to dtclk . note: output signals from any system shall be low or hi-z state when vdd is off. 5.4 signal electrical characteristics input signals shall be low or hi-z state when vdd is off. it is recommended to refer the specifications of sn75lvds86dgg(texas instruments) in detail. signal electrical characteristics are as follows;
(c) copyright au optronics, inc. august, 2001 all rights reserved. B150PG01 ver. 04 13/13 no reproduction and redistribution allowed. parameter condition min max unit vth differential input high voltage(vcm=+1.2v) 100 [mv] vtl differential input low voltage(vcm=+1.2v) -100 [mv] lvds macro ac characteristics are as follows: min. max. clock frequency (t) 51mhz 57mhz data setup time (tsu) 500ps data hold time (thd) 500ps 5.5 signal for lamp connector pin # signal name 1 lamp high voltage 2 lamp low voltage 6.0 pixel format image following figure shows the relationship of the input signals and lcd pixel format. thdtsu input clock input data t
(c) copyright au optronics, inc. august, 2001 all rights reserved. B150PG01 ver. 04 14/14 no reproduction and redistribution allowed. r g b r g b r g b r g b r g b r g b r g b r g b 1(odd) 2(even) 1399 1400 1st line 1050th line 7.0 parameter guide line for cfl inverter parameter min dp-1 max units condition white luminance 5 points average - 150 ? [cd/m 2 ] (ta=25 ) ccfl current(icfl) 3.0 5.5 7.0 [ma] rms (ta=25 ) note 2 ccfl frequency(fcfl) 50 60 70 [khz] (ta=25 ) note 3 ccfl ignition voltage(vs) ? 1,150 [volt] rms (ta= 0 ) note 4 ccfl voltage (reference) (vcfl) ? 700 ? [volt] rms (ta=25 ) note 5 ccfl power consumption (pcfl) ? 3.9 ? [watt] (ta=25 ) note 5 note 1: dp-1 are adt recommended design points. *1 all of characteristics listed are measured under the condition using the adt test inverter. *2 in case of using an inverter other than listed, it is recommended to check the inverter carefully. sometimes, interfering noise stripes appear on the screen, and substandard luminance or flicker at low power may happen.
(c) copyright au optronics, inc. august, 2001 all rights reserved. B150PG01 ver. 04 15/15 no reproduction and redistribution allowed. *3 in designing an inverter, it is suggested to check safety circuit ver carefully. impedance of cfl, for instance, becomes more than 1 [m ohm] when cfl is damaged. *4 generally, cfl has some amount of delay time after applying kick-off voltage. it is recommended to keep on applying kick-off voltage for 1 [sec] until discharge. *5 cfl discharge frequency must be carefully chosen so as not to produce interfering noise stripes on the screen. *6 reducing cfl current increases cfl discharge voltage and generally increases cfl discharge frequency. so all the parameters of an inverter should be carefully designed so as not to produce too much leakage current from high-voltage output of the inverter. note 2: it should be emplyed the inverter which has duty dimming , if icfl is less than 4ma. note 3: cfl discharge frequency should be carefully determined to avoid interference between inverter and tft lcd. note 4: cfl inverter should be able to give out a power that has a generating capacity of over 1,400 voltage. lamp units need 1,400 voltage minimum for ignition. note 5: calculator value for reference (icfl vcfl=pcfl) 8.0 interface timings basically, interface timings should match the manufacturing guide line timing. 8.1 timing characteristics symbol description min typ max unit fdck dtclk frequency 51 54.00 57 [mhz] tck dtclk cycle time 18.5 [nsec] tx x total time 780 844 1024 [tck] tacx x active time 700 700 700 [tck] tbkx x blank time 80 144 324 [tck] hsync h frequency 63.98 [khz] hsw h-sync width 4 56 [tck] hbp h back porch 4 64 [tck] hfp h front porch 4 24 [tck] ty y total time 1060 1066 2048 [tx] tacy y active time 1050 1050 1050 [tx] vsync frame rate (55) 60 61 [hz] vw v-sync width 1 3 [tx] vfp v-sync front porch 1 1 34 [tx] vbp v-sync back porch 7 12 63 [tx] note: hsw(h-sync width) + hbp(h-sync back porch) should be less than 515 tck.
(c) copyright au optronics, inc. august, 2001 all rights reserved. B150PG01 ver. 04 16/16 no reproduction and redistribution allowed. 8.2 timing definition 1688 dot 112 dot 128 dot 48 dot 1400 dot h-sync dsptm g 16 h 1 h 12 h 3 h 1050 h v-sync dsptmg 9.0 power consumption input power specifications are as follows; symble parameter min typ max units condition vdd logic/lcd drive voltage 3.0 3.3 3.6 [volt] load capacitance 20uf pdd vdd power 1.8 [watt] all black pattern pdd max vdd power max 2.47 [watt] max pattern note idd idd current 530 ma all black pattern idd max idd current max 750 ma max pattern note vddrp allowable logic/lcd drive ripple voltage 100 [mv] p-p vddns allowable logic/lcd drive ripple noise 100 [mv] p-p note : vdd=3.3v
(c) copyright au optronics, inc. august, 2001 all rights reserved. B150PG01 ver. 04 17/17 no reproduction and redistribution allowed. 10. power on/off sequence vdd power and lamp on/off sequence is as follows. interface signals are also shown in the chart. signals from any system shall be hi-z state or low level when vdd is off. 5. package instruction 90% 10% 10% 10% 90% 10ms max. 0 min. 0 min. 0 v 0 v vdd signals 10% 10% 180ms min. 0 min. 0 v lamp on 10% 10% 150ms min.
(c) copyright au optronics, inc. august, 2001 all rights reserved. B150PG01 ver. 04 18/18 no reproduction and redistribution allowed. 11. mechanical characteristics u l
(c) copyright au optronics, inc. august, 2001 all rights reserved. B150PG01 ver. 04 19/19 no reproduction and redistribution allowed.

▲Up To Search▲

Price & Availability of B150PG01

	To Download B150PG01 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .