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top232-234 topswitch -fx family design flexible, ecosmar t , integrated off-line switcher figure 1. typical flyback application. part order number 3 adapter 1 open frame 2 open frame 2 output power table table 1. notes: 1. typical continuous power in a non-ventilated enclosed adapter measured at 50 ? c ambient. 2. maximum practical continuous power in an open frame design with adequate heat sinking, measured at 50 ? c ambient. see key applications section for detailed conditions. 3. packages: p: dip-8b, g: smd-8b, y: to-220-7b. pi-2503-073099 ac in dc out d s c topswitch-fx control m + - f july 2001 product highlights lower system cost, high design flexibility features eliminate or reduce cost of external components fully integrated soft-start for minimum stress/overshoot externally settable accurate current limit wider duty cycle for more power, smaller input capacitor line under-voltage (uv) detection: no turn off glitches line overvoltage (ov) shutdown extends line surge limit line feed forward with maximum duty cycle (dc max ) reduction rejects ripple and limits dc max at high line single resistor sets ov/uv thresholds, dc max reduction frequency jittering reduces emi and emi filtering costs regulates to zero load without dummy loading 132 khz frequency reduces transformer/power supply size half frequency option for video applications hysteretic thermal shutdown for automatic recovery large thermal hysteresis prevents pc board overheating standard packages with omitted pins for large creepage active-on and active-off remote on/off capability synchronizable to a lower frequency ecosmart - energy efficient cycle skipping reduces no-load consumption reduced consumption in remote off mode half frequency option for high efficiency standby allows shutdown/wake-up via lan/input port description topswitch-fx uses the proven topswitch topology and cost effectively integrates many new functions that reduce system cost and, at the same time, improve design flexibility, performance and energy efficiency. like topswitch , the high voltage power mosfet, pwm control, fault protection and other control circuitry are all integrated onto a single cmos chip, but with two added terminals. the first one is a multi- function (m) pin, which implements programmable line ov/uv shutdown and line feed forward/dc max reduction with line voltage. the same pin can be used instead to externally set an accurate current limit. in either case, this pin can also be used for remote on/off or to synchronize the oscillator to an external, lower frequency signal. the second added terminal is the frequency (f) pin and is available only in the y package. this pin provides the half frequency option when connected to control (c) instead of source (s). the features on the new pins can be disabled by shorting them to the source, which allows the device to operate in a three terminal topswitch mode, but with the following new transparent features: soft-start, cycle skipping, 132 khz switching frequency, frequency jittering, wider dc max , hysteretic thermal shutdown and larger creepage. in addition, all critical parameters such as frequency, current limit, pwm gain, etc. have tighter temperature and absolute tolerances compared to the topswitch-ii family. higher current limit accuracy and larger dc max , when combined with other features allow for a 10% to 15% higher power capability on the topswitch-fx devices compared to equivalent topswitch-ii devices for the same input/output conditions. top232p top232g top232y top233p top233g top233y top234p top234g top234y 230 vac 15% adapter 1 85-265 vac 9 w 15 w 6.5 w 10 w 10 w 25 w 7 w 15 w 13 w 25 w 9 w 15 w 20 w 50 w 15 w 30 w 16 w 30 w 11 w 20 w 30 w 75 w 20 w 45 w
top232-234 2 b 7/01 section list pin functional description ............................................................................................................................... .......... 3 topswitch-fx family functional description ......................................................................................................... 4 control (c) pin operation ...................................................................................................... ........................... 4 oscillator and switching frequency ............................................................................................. .......................... 5 pulse width modulator and maximum duty cycle ................................................................................... .............. 5 minimum duty cycle and cycle skipping .......................................................................................... ..................... 6 error amplifier ................................................................................................................ ......................................... 6 on-chip current limit with external programability ............................................................................. ................... 6 line under-voltage detection (uv) .............................................................................................. .......................... 6 line overvoltage shutdown (ov) ................................................................................................. .......................... 7 line feed forward with dc max reduction .............................................................................................................. 7 remote on/off and synchronization .............................................................................................. ..................... 7 soft-start ..................................................................................................................... ........................................... 8 shutdown/auto-restart .......................................................................................................... ................................ 8 hysteretic over-temperature protection ......................................................................................... ....................... 8 bandgap reference .............................................................................................................. .................................. 8 high-voltage bias current source ............................................................................................... ........................... 8 using frequency and multi-function pins ..................................................................................................... 9 frequency (f) pin operation.................................................................................................... ......................... 9 multi-function (m) pin operation ............................................................................................... ..................... 9 typical uses of frequency (f) pin ...................................................................................................................... 11 typical uses of multi-function (m) pin ............................................................................................................. 12 application examples ............................................................................................................................... ................ 14 a high efficiency, 30 w, universal input power supply .......................................................................... .............. 14 35 w multiple output power supply .............................................................................................. ....................... 15 17 w pc standby power supply ................................................................................................... ....................... 16 processor controlled supply turn on/off ........................................................................................ .................... 17 key application considerations .............................................................................................................................. 1 9 topswitch-fx vs. topswitch-ll ................................................................................................................... ........ 19 topswitch-fx design considerations ......................................................................................................... ........ 20 topswitch-fx selection ..................................................................................................................... ........... 20 input capacitor ................................................................................................................ ............................... 20 primary clamp and output reflected voltage v or ......................................................................................... 20 output diode ................................................................................................................... ............................... 21 soft-start ..................................................................................................................... ................................... 21 emi ............................................................................................................................ ..................................... 21 transformer design ............................................................................................................. ........................... 21 standby consumption ............................................................................................................ ........................ 23 topswitch-fx layout considerations ......................................................................................................... ........ 23 primary side connections ....................................................................................................... ....................... 23 y-capacitor.................................................................................................................... ................................. 23 heat sinking ................................................................................................................... ................................ 23 quick design checklist ......................................................................................................... ................................ 23 design tools ................................................................................................................... ...................................... 23 product specifications and test conditions .......................................................................................................... 24 typical performance characteristics ...................................................................................................................... 30 package outlines ............................................................................................................................... ....................... 34 top232-234 b 7/01 3 figure 2. functional block diagram. pin functional description drain (d) pin: high voltage power mosfet drain output. the internal start- up bias current is drawn from this pin through a switched high- voltage current source. internal current limit sense point for drain current. control (c) pin: error amplifier and feedback current input pin for duty cycle control. internal shunt regulator connection to provide internal bias current during normal operation. it is also used as the connection point for the supply bypass and auto-restart/ compensation capacitor. multi-function (m) pin: input pin for ov, uv, line feed forward with dc max reduction, external set current limit, remote on/off and synchronization. a connection to source pin disables all functions on this pin and makes topswitch-fx operate in simple three terminal mode (like topswitch-ii ). frequency (f) pin: (y package only) input pin for selecting switching frequency: 132 khz if connected to source pin and 66 khz if connected to control pin. figure 3. pin configuration. pi-2535-083099 the switching frequency is internally set for 132 khz only operation in p and g packages. source (s) pin: output mosfet source connection for high voltage power return. primary side control circuit common and reference point. shutdown/ auto-restart pwm comparator clock saw half frequency oscillator with jitter controlled turn-on gate driver current limit comparator internal uv comparator internal supply 5.8 v 4.8 v source (s) s r q q d max stop soft- start - + control (c) multi- function (m) frequency (f) (y package only) - + 5.8 v i fb r e z c v c + - leading edge blanking 8 1 hysteretic thermal shutdown shunt regulator/ error amplifier + - drain (d) on/off dc max v bg dc max v bg + v t 0 ov/uv v i (limit) current limit adjust line sense soft start pi-2501-031901 tab internally connected to source pin y package (to-220-7b) p package (dip-8b) g package (smd-8b) c d s s s s 1 c 3 m 5 f 4 s 7 d m 8 5 7 1 4 2 3 top232-234 4 b 7/01 topswitch-fx family functional description figure 4. relationship of duty cycle to control pin current. pi-2504-072799 duty cycle (%) i c (ma) i m = 140 a i m = 190 a i m < i m(dc) 1.9 1.5 5.5 5.9 slope = pwm gain i cd1 i b auto-restart 78 1.5 47 like topswitch , topswitch-fx is an integrated switched mode power supply chip that converts a current at the control input to a duty cycle at the open drain output of a high voltage power mosfet. during normal operation the duty cycle of the power mosfet decreases linearly with increasing control pin current as shown in figure 4. in addition to the three terminal topswitch features, such as the high voltage start-up, the cycle-by-cycle current limiting, loop compensation circuitry, auto-restart, thermal shutdown, etc., the topswitch-fx incorporates many additional functions that reduce system cost, increase power supply performance and design flexibility. a patented high voltage cmos technology allows both the high voltage power mosfet and all the low voltage control circuitry to be cost effectively integrated onto a single monolithic chip. two terminals, frequency (available only in y package) and multi-function, have been added to implement some of the new functions. these terminals can be connected to the source pin to operate the topswitch-fx in a topswitch - like three terminal mode. however, even in this three terminal mode, the topswitch-fx offers many new transparent features that do not require any external components: 1. a fully integrated 10 ms soft-start reduces peak currents and voltages during start-up and practically eliminates output overshoot in most applications. 2. dc max of 78% allows smaller input storage capacitor, lower input voltage requirement and/or higher power capability. 3. cycle skipping at minimum pulse width achieves regulation and very low power consumption at no load. 4. higher switching frequency of 132 khz reduces the transformer size with no noticeable impact on emi or on high line efficiency. 5. frequency jittering reduces emi. 6. hysteretic over-temperature shutdown ensures automatic recovery from thermal fault. large hysteresis prevents circuit board overheating. 7. packages with omitted pins and lead forming provide large drain creepage distance. 8. tighter absolute tolerances and smaller temperature vari- ations on switching frequency, current limit and pwm gain. the multi-function pin is usually used for line sensing by connecting a resistor from this pin to the rectified dc high voltage bus to implement line over-voltage (ov)/under-voltage (uv) and line feed forward with dc max reduction. in this mode, the value of the resistor determines the ov/uv thresholds and the dc max is reduced linearly starting from a line voltage above the under-voltage threshold. in high efficiency applications, this pin can be used in the external current limit mode instead, to reduce the current limit externally (to a value close to the operating peak current), by connecting the pin to source through a resistor. the same pin can also be used as a remote on/off and a synchronization input in both modes. the frequency pin in the to-220 package sets the switching frequency to the default value of 132 khz when connected to source pin. a half frequency option can be chosen by connecting this pin to control pin instead. leaving this pin open is not recommended. control (c) pin operation the control pin is a low impedance node that is capable of receiving a combined supply and feedback current. during normal operation, a shunt regulator is used to separate the feedback signal from the supply current. control pin voltage v c is the supply voltage for the control circuitry including the mosfet gate driver. an external bypass capacitor closely connected between the control and source pins is required to supply the instantaneous gate drive current. the total amount of capacitance connected to this pin also sets the auto-restart timing as well as control loop compensation. when rectified dc high voltage is applied to the drain pin during start-up, the mosfet is initially off, and the control pin capacitor is charged through a switched high voltage current source connected internally between the drain and control pins. when the control pin voltage v c reaches approximately 5.8 v, the control circuitry is activated and the soft-start begins. the soft-start circuit gradually increases the duty cycle of the mosfet from zero to the maximum value over approximately 10 ms. if no external feedback/supply current is fed into the control pin by the end of the soft-start, the high voltage current source is turned off and the control pin will start discharging in response to the supply current drawn by the control circuitry. if the power supply is designed properly, and no fault condition such as open loop or shorted output exists, the feedback loop will close, providing external top232-234 b 7/01 5 pi-2545-082299 s1 s2 s6 s7 s1 s2 s6 s7 s0 s1 s7 s0 s0 5.8 v 4.8 v s7 0 v 0 v 0 v v line v c v drain v out note: s0 through s7 are the output states of the auto-restart counter 2 1 2 3 4 0 v ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ s6 s7 ~ ~ ~ ~ ~ ~ ~ ~ v uv ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ s2 ~ ~ control pin current, before the control pin voltage has had a chance to discharge to the lower threshold voltage of approximately 4.8 v (internal supply under-voltage lockout threshold). when the externally fed current charges the control pin to the shunt regulator voltage of 5.8 v, current in excess of the consumption of the chip is shunted to source through resistor r e as shown in figure 2. this current flowing through r e controls the duty cycle of the power mosfet to provide closed loop regulation. the shunt regulator has a finite low output impedance z c that sets the gain of the error amplifier when used in a primary feedback configuration. the dynamic impedance z c of the control pin together with the external control pin capacitance sets the dominant pole for the control loop. when a fault condition such as an open loop or shorted output prevents the flow of an external current into the control pin, the capacitor on the control pin discharges towards 4.8 v. at 4.8 v auto-restart is activated which turns the output mosfet off and puts the control circuitry in a low current standby mode. the high-voltage current source turns on and charges the external capacitance again. a hysteretic internal supply under- voltage comparator keeps v c within a window of typically 4.8 to 5.8 v by turning the high-voltage current source on and off as shown in figure 5. the auto-restart circuit has a divide-by- 8 counter which prevents the output mosfet from turning on again until eight discharge/charge cycles have elapsed. this is accomplished by enabling the output mosfet only when the divide-by-8 counter reaches full count (s7). the counter effectively limits topswitch-fx power dissipation by reducing the auto-restart duty cycle to typically 4%. auto-restart mode continues until output voltage regulation is again achieved through closure of the feedback loop. oscillator and switching frequency the internal oscillator linearly charges and discharges an internal capacitance between two voltage levels to create a sawtooth waveform for the pulse width modulator. the oscillator sets the pulse width modulator/current limit latch at the beginning of each cycle. the nominal switching frequency of 132 khz was chosen to minimize transformer size while keeping the fundamental emi frequency below 150 khz. the frequency pin (available only in to-220 package), when shorted to the control pin, lowers the switching frequency to 66 khz (half frequency) which may be preferable in some cases such as noise sensitive video applications or a high efficiency standby mode. otherwise, the frequency pin should be connected to the source pin for the default 132 khz. trimming of the current reference improves oscillator frequency accuracy. to further reduce the emi level, the switching frequency is jittered (frequency modulated) by approximately 4 khz at 250 hz (typical) rate as shown in figure 6. figure 28 shows the typical improvement of emi measurements with frequency jitter. pulse width modulator and maximum duty cycle the pulse width modulator implements voltage mode control by driving the output mosfet with a duty cycle inversely proportional to the current into the control pin that is in excess of the internal supply current of the chip (see figure 4). the excess current is the feedback error signal that appears across r e (see figure 2). this signal is filtered by an rc network with a typical corner frequency of 7 khz to reduce the effect of switching noise in the chip supply current generated by figure 5. typical waveforms for (1) power up (2) normal operation (3) auto-restart (4) power down . top232-234 6 b 7/01 figure 6. switching frequency jitter. the mosfet gate driver. the filtered error signal is compared with the internal oscillator sawtooth waveform to generate the duty cycle waveform. as the control current increases, the duty cycle decreases. a clock signal from the oscillator sets a latch which turns on the output mosfet. the pulse width modulator resets the latch, turning off the output mosfet. note that a minimum current must be driven into the control pin before the duty cycle begins to change. the maximum duty cycle, dc max , is set at a default maximum value of 78% (typical). however, by connecting the multi- function pin to the rectified dc high voltage bus through a resistor with appropriate value, the maximum duty cycle can be made to decrease from 78% to 38% (typical) as shown in figure 8 when input line voltage increases (see line feed forward with dc max reduction). minimum duty cycle and cycle skipping to maintain power supply output regulation, the pulse width modulator reduces duty cycle as the load at the power supply output decreases. this reduction in duty cycle is proportional to the current flowing into the control pin. as the control pin current increases, the duty cycle reduces linearly towards a minimum value specified as minimum duty cycle, dc min . after reaching dc min , if control pin current is increased further by approximately 0.4 ma, the pulse width modulator will force the duty cycle from dc min to zero in a discrete step (refer to figure 4). this feature allows a power supply to operate in a cycle skipping mode when the load at its output consumes less power than the power that topswitch-fx delivers at minimum duty cycle, dc min . no additional control is needed for the transition between normal operation and cycle skipping. as the load increases or decreases, the power supply automatically switches between normal operation and cycle skipping mode as necessary. cycle skipping may be avoided, if so desired, by connecting a minimum load at the power supply output such that the duty cycle remains at a level higher than dc min at all times. error amplifier the shunt regulator can also perform the function of an error amplifier in primary feedback applications. the shunt regulator voltage is accurately derived from a temperature-compensated bandgap reference. the gain of the error amplifier is set by the control pin dynamic impedance. the control pin clamps external circuit signals to the v c voltage level. the control pin current in excess of the supply current is separated by the shunt regulator and flows through r e as a voltage error signal. on-chip current limit with external programmability the cycle-by-cycle peak drain current limit circuit uses the output mosfet on-resistance as a sense resistor. a current limit comparator compares the output mosfet on-state drain to source voltage, v ds(on) with a threshold voltage. high drain current causes v ds(on) to exceed the threshold voltage and turns the output mosfet off until the start of the next clock cycle. the default current limit of topswitch-fx is preset internally. however, with a resistor connected between multi- function pin and source pin, current limit can be programmed externally to a lower level between 40% and 100% of the default current limit. please refer to the graphs in the typical performance characteristics section for the selection of the resistor value. by setting current limit low, a topswitch-fx that is bigger than necessary for the power required can be used to take advantage of the lower r ds(on) for higher efficiency. with a second resistor connected between the multi-function pin and the rectified dc high voltage bus providing a small amount of feed forward current, a true power limiting operation against line variation can be implemented. when using an rcd clamp, this feed forward technique reduces maximum clamp voltage at high line allowing for higher reflected voltage designs. the current limit comparator threshold voltage is temperature compensated to minimize the variation of the current limit due to temperature related changes in r ds(on) of the output mosfet. the leading edge blanking circuit inhibits the current limit comparator for a short time after the output mosfet is turned on. the leading edge blanking time has been set so that, if a power supply is designed properly, current spikes caused by primary-side capacitances and secondary-side rectifier reverse recovery time will not cause premature termination of the switching pulse. the current limit can be lower for a short period after the leading edge blanking time as shown in figure 33. this is due to dynamic characteristics of the mosfet. to avoid triggering the current limit in normal operation, the drain current waveform should stay within the envelope shown. line under-voltage detection (uv) at power up, uv keeps topswitch-fx off until the input line pi-2550-092499 128 khz 4 ms time switching frequency v drain 136 khz top232-234 b 7/01 7 figure 7. synchronization timing diagram. voltage reaches the under-voltage threshold. at power down, uv prevents auto-restart attempts after the output goes out of regulation. this eliminates power down glitches caused by the slow discharge of input storage capacitor present in applications such as standby supplies. a single resistor connected from the multi-function pin to the rectified dc high voltage bus sets uv threshold during power up. once the power supply is successfully turned on, uv is disabled to allow extended input voltage operating range. input voltage is not checked again until the power supply loses regulation and attempts another turn-on. this is accomplished by enabling the uv comparator only when the divide-by-8 counter used in auto-restart reaches full count (s7) which is also the state that the counter is reset to at power up (see figure 5). the uv feature can be disabled independent of ov feature as shown in figure 16. line overvoltage shutdown (ov) the same resistor used for uv also sets an overvoltage threshold which, once exceeded, will force topswitch-fx output into off-state. the ratio of ov and uv thresholds is preset at 4.5 as can be seen in figure 8. this feature turns off the topswitch-fx power mosfet when the rectified dc high voltage exceeds the ov threshold. when the mosfet is off, the rectified dc high voltage surge capability is increased to the voltage rating of the mosfet (700 v), due to the absence of the reflected voltage and leakage spikes on the drain. small amount of hysteresis is provided on the ov threshold to prevent noise triggering. the ov feature can be disabled independent of uv feature as shown in figure 15. line feed forward with dc max reduction the same resistor used for uv and ov also implements line voltage feed forward which minimizes output line ripple and reduces power supply output sensitivity to line transients. this feed forward operation is illustrated in figure 4 by the different values of i m . note that for the same control pin current, higher line voltage results in smaller operating duty cycle. as an added safety measure, the maximum duty cycle dc max is also reduced from 78% (typical) at a voltage slightly higher than the uv threshold to 38% (typical) at the ov threshold (see figures 4, 8). dc max of 38% at the ov threshold was chosen to ensure that the power capability of the topswitch-fx is not restricted by this feature under normal operation. remote on/off and synchronization topswitch-fx can be turned on or off by controlling the current into or out from the multi-function pin (see figure 8). this allows easy implementation of remote on/off control of topswitch-fx in several different ways. a transistor or an optocoupler output connected between the multi- function pin and the source pin implements this function with active-on (figure 19) while a transistor or an optocoupler output connected between the multi-function pin and the control pin implements the function with active-off (figure 20). when a signal is received at the multi-function pin to disable the output through any of the multi-function pin functions such as ov, uv and remote on/off, topswitch-fx always completes its current switching cycle as illustrated in figure 7 before the output is forced off. the internal oscillator is stopped slightly before the end of the current cycle and stays there as long as the disable signal exists. when the signal at the multi-function pin changes state from disable to enable, the internal oscillator starts the next switching cycle. this approach allows the use of this pin to synchronize topswitch-fx to any external signal with a frequency lower than its internal switching frequency. pi-2558-092999 oscillator (saw) d max enable from m pin (stop) time top232-234 8 b 7/01 as seen above, the remote on/off feature allows the topswitch-fx to be turned on and off instantly, on a cycle-by- cycle basis, with very little delay. however, remote on/off can also be used as a standby or power switch to turn off the topswitch-fx and keep it in a very low power consumption state for indefinitely long periods. if the topswitch-fx is held in remote off state for long enough time to allow the control pin to dishcharge to the internal supply under-voltage threshold of 4.8 v (approximately 32 ms for a 47 f control pin capacitance), the control pin goes into the hysteretic mode of regulation. in this mode, the control pin goes through alternate charge and discharge cycles between 4.8 v and 5.8 v (see control pin operation section above) and runs entirely off the high voltage dc input, but with very low power consumption (160 mw typical at 230 vac with m pin open). when the topswitch-fx is remotely turned on after entering this mode, it will initiate a normal start-up sequence with soft- start the next time the control pin reaches 5.8 v. in the worst case, the delay from remote on to start-up can be equal to the full discharge/charge cycle time of the control pin, which is approximately 125 ms for a 47 f control pin capacitor. this reduced consumption remote off mode can eliminate expensive and unreliable in-line mechanical switches. it also allows for microprocessor controlled turn-on and turn- off sequences that may be required in certain applications such as inkjet and laser printers. see figure 27 under application examples for more information. soft-start an on-chip soft-start function is activated at start-up with a duration of 10 ms (typical). maximum duty cycle starts from zero and linearly increases to the default maximum of 78% at the end of the 10 ms duration. in addition to start-up, soft-start is also activated at each restart attempt during auto-restart and when restarting after being in hysteretic regulation of control pin voltage (v c ), due to remote off or thermal shutdown conditions. this effectively minimizes current and voltage stresses on the output mosfet, the clamp circuit and the output rectifier, during start-up. this feature also helps minimize output overshoot and prevents saturation of the transformer during start-up. shutdown/auto-restart to minimize topswitch-fx power dissipation under fault conditions, the shutdown/auto-restart circuit turns the power supply on and off at an auto-restart duty cycle of typically 4% if an out of regulation condition persists. loss of regulation interrupts the external current into the control pin. v c regulation changes from shunt mode to the hysteretic auto- restart mode described above. when the fault condition is removed, the power supply output becomes regulated, v c regulation returns to shunt mode, and normal operation of the power supply resumes. hysteretic over-temperature protection temperature protection is provided by a precision analog circuit that turns the output mosfet off when the junction temperature exceeds the thermal shutdown temperature (135 ? c typical). when the junction temperature cools to below the hysteretic temperature, normal operation resumes. a large hysteresis of 70 ? c (typical) is provided to prevent overheating of the pc board due to a repeating fault condition. v c is regulated in hysteretic mode and a 4.8 v to 5.8 v (typical) sawtooth waveform is present on the control pin when the power supply is turned off. bandgap reference all critical topswitch-fx internal voltages are derived from a temperature-compensated bandgap reference. this reference is also used to generate a temperature-compensated current reference which is trimmed to accurately set the switching frequency, mosfet gate drive current, current limit, and the line ov/uv thresholds. topswitch-fx has improved circuitry to maintain all of the above critical parameters within very tight absolute and temperature tolerances. high-voltage bias current source this current source biases topswitch-fx from the drain pin and charges the control pin external capacitance during start-up or hysteretic operation. hysteretic operation occurs during auto-restart, remote off and over-temperature shutdown. in this mode of operation, the current source is switched on and off with an effective duty cycle of approximately 35%. this duty cycle is determined by the ratio of control pin charge (i c ) and discharge currents (i cd1 and i cd2 ). this current source is turned off during normal operation when the output mosfet is switching. top232-234 b 7/01 9 for line sensing by connecting a resistor from this pin to the rectified dc high voltage bus to implement ov, uv and dc max reduction with line voltage functions. in this mode, the value of the resistor determines the line ov/uv thresholds, and the dc max is reduced linearly with rectified dc high voltage starting from just above the uv threshold. in high efficiency applications this pin can be used in the external current limit mode instead, to reduce the current limit externally to a value close to the operating peak current, by connecting the pin to the source pin through a resistor. the same pin can also be used as a remote on/off and a synchronization input in both modes. please refer to table 2 for possible combinations of the functions with example circuits shown in figure 13 through figure 23. a description of specific functions in terms of the multi- function pin i/v characteristic is shown in figure 8. the horizontal axis represents multi-function pin current with positive polarity indicating currents flowing into the pin. the meaning of the vertical axes varies with functions. for those that control the on/off states of the output such as uv, ov and remote on/off, the vertical axis represents the enable/ disable states of the output. uv triggers at i uv (+50 a typical) and ov triggers at i ov (+225 a typical). between +50 a and +225 a, the output is enabled. for external current limit and line feed forward with dc max reduction, the vertical axis represents the magnitude of the i limit and dc max . line feed forward with dc max reduction lowers maximum duty cycle from 78% at i m(dc) (+90 a typical) to 38% at i ov (+225 a). external current limit is available only with negative multi-function pin current. please see graphs in the typical performance characteristics section for the current limit programming range and the selection of appropriate resistor value. frequency (f) pin operation the frequency pin is a digital input pin available in to-220 package only. shorting the frequency pin to source pin selects the nominal switching frequency of 132 khz (figure 10) which is suited for most applications. for other cases that may benefit from lower switching frequency such as noise sensitive video applications, a 66 khz switching frequency (half frequency) can be selected by shorting the frequency pin to the control pin (figure 11). in addition, an example circuit shown in figure 12 may be used to lower the switching frequency from 132 khz in normal operation to 66 khz in standby mode for very low standby power consumption. multi-function (m) pin operation when current is fed into the multi-function pin, it works as a voltage source of approximately 2.6 v up to a maximum current of +400 a (typical). at +400 a, this pin turns into a constant current sink. when current is drawn out of the multi-function pin, it works as a voltage source of approximately 1.32 v up to a maximum current of 240 a (typical). at 240 a, it turns into a constant current source. refer to figure 9. there are a total of five functions available through the use of the multi-function pin: ov, uv, line feed forward with dc max reduction, external current limit and remote on/off. a short circuit between the multi-function pin and source pin disables all five functions and forces topswitch-fx to operate in a simple three terminal mode like topswitch-ii . the multi-function pin is typically used ? ?? ? ?? ? ?? ? ?? ?? ????? table 2. typical multi-function pin configurations. multi-function pin table* 13 14 15 16 17 18 19 20 21 22 23 *this table is only a partial list of many multi-function pin configurations that are possible. using frequency and multi- function pins figure number three terminal operation under-voltage overvoltage line feed forward (dc max ) line feed forward (i limit ) external current limit remote on/off top232-234 10 b 7/01 -250 -200 -150 -100 -50 0 50 100 150 200 250 300 350 400 pi-2524-081999 output mosfet switching (enabled) (disabled) i limit (default) dc max (78.5%) current limit maximum duty cycle v bg v bg + v tp i m i m i m i m i uv i rem(n) i ov multi- function pin voltage note: this figure provides idealized functional characteristics of the multi-function pin with typical performance values. please refer to the parametric table and typical performance characteristics sections of the data sheet for measured data. multi-function pin current ( a) disabled when supply output goes out of regulation figure 8. multi-function pin characteristics. figure 9. multi-function pin input simplified schematic. v bg + v t v bg 240 a 400 a control pin multi-function pin (positive current sense - under-voltage, over-voltage, maximum duty cycle reduction) (negative current sense - on/off, current limit adjustment) pi-2548-092399 topswitch-fx top232-234 b 7/01 11 figure 12. half frequency standby mode (for high standby efficiency). figure 10. full frequency operation (132 khz). figure 11. half frequency operation (66 khz). typical uses of frequency (f) pin pi-2505-081199 dc input voltage + - d s c control f pi-2506-081199 dc input voltage + - d s c control f pi-2507-040401 dc input voltage + - d s c standby q s can be an optocoupler output. control f 20 k ? r hf 1 nf q s 47 k ? top232-234 12 b 7/01 figure 15. line sensing for under-voltage only (overvoltage disabled). pi-2510-040401 dc input voltage + - dm s c v uv = r ls x i uv for value shown v uv = 100 vdc r ls 6.2 v 2 m ? 22 k ? control figure 16. line sensing for overvoltage only (under-voltage disabled). figure 17. externally set current limit. pi-2517-040401 dc input voltage + - dm s c for r il = 12 k ? i limit = 67% control r il see graph for other resistor values (r il ) for r il = 25 k ? i limit = 40% pi-2516-040401 dc input voltage + - dm s c v ov = i ov x r ls for values shown v ov = 450 vdc control r ls in4148 2 m ? 30 k ? figure 13. three terminal operation (multi-function features disabled. frequency pin tied to source or control pin). figure 14. line sensing for under-voltage, overvoltage and maximum duty cycle reduction. pi-2508-081199 dc input voltage + - d s c control m pi-2509-040401 dc input voltage + - dm s c v uv = i uv x r ls v ov = i ov x r ls for r ls = 2 m ? v uv = 100 vdc v ov = 450 vdc dc max @100 vdc = 78% dc max @375 vdc = 47% control r ls 2 m ? typical uses of multi-function (m) pin figure 18. current limit reduction with line voltage. pi-2518-040401 dc input voltage + - dm s c control r il r ls 2.5 m ? 6 k ? 90% @ 100 vdc 55% @ 300 vdc i limit = i limit = top232-234 b 7/01 13 pi-2522-040401 dc input voltage + - d s c r mc 45 k ? m control q r q r can be an optocoupler output or can be replaced by a manual switch. on/off 47 k ? figure 20. active-off remote on/off. figure 19. active-on (fail safe) remote on/off. pi-2519-040401 dc input voltage + - d s c q r on/off m control q r can be an optocoupler output or can be replaced by a manual switch. 47 k ? pi-2523-040401 dc input voltage + - d s c r ls m for r ls = 2 m ? v uv = 100 vdc v ov = 450 vdc control q r 2 m ? q r can be an optocoupler output or can be replaced by a manual switch. on/off 47 k ? figure 23. active-off remote on/off with line sense. figure 22. active-off remote on/off with externally set current limit. pi-2521-040401 dc input voltage + - d s c r il r mc 24 k ? 12 k ? m control q r 2r il r mc = q r can be an optocoupler output or can be replaced by a manual switch. on/off 47 k ? figure 21. active-on remote on/off with externally set current limit. pi-2520-040401 dc input voltage + - d s c q r r il m control 12 k ? for r il = i limit = 67 % q r can be an optocoupler output or can be replaced by a manual switch. on/off 47 k ? 25 k ? for r il = i limit = 40 % typical uses of multi-function (m) pin (cont.) top232-234 14 b 7/01 figure 24. 30 w power supply using external current limit. application examples a high efficiency, 30 w, universal input power supply the circuit shown in figure 24 takes advantage of several of the topswitch-fx features to reduce system cost and power supply size and to improve efficiency. this design delivers 30 w at 12 v, from an 85 to 265 vac input, at an ambient of 50 ? c, in an open frame configuration. a nominal efficiency of 80% at full load is achieved using top234. the current limit is externally set by resistors r1 and r2 to a value just above the low line operating peak current of approximately 70% of the default current limit. this allows use of a smaller transformer core size and/or higher transformer primary inductance for a given output power, reducing topswitch-fx power dissipation, while at the same time avoiding transformer core saturation during startup and output transient conditions. the resistor r1 provides a feed forward signal that reduces the current limit with increasing line voltage, which, in turn, limits the maximum overload power at high input line voltage. the feed forward function in combination with the built-in soft-start feature of topswitch-fx , allows the use of a low cost rcd clamp (r3, c3 and d1) with a higher reflected voltage, by safely limiting the topswitch-fx drain voltage, with adequate margin, under worst case conditions. the extended maximum duty cycle feature of topswitch-fx (guaranteed minimum value of 75% vs. 64% for topswitch-ii ) allows the use of a smaller input capacitor (c1). the extended maximum duty cycle and the higher reflected voltage possible with the rcd clamp also permit the use of a higher primary to secondary turns ratio for t1 which reduces the peak reverse voltage experienced by the secondary rectifier d8. as a result, a 60 v schottky rectifier can be used for up to 15 v outputs, which greatly improves power supply efficiency. the cycle skipping feature of the topswitch-fx eliminates the need for any dummy loading for regulation at no load and reduces the no load/standby consumption of the power supply. frequency jitter provides improved margin for conducted emi meeting the cispr 22 (fcc b) specification. a simple zener sense circuit is used for low cost. the output voltage is determined by the zener diode (vr2) voltage and the voltage drops across the optocoupler (u2) led and resistor r6. resistor r8 provides bias current to zener vr2 for typical regulation of 5% at the 12 v output level, over line and load and component variations. 12 v @ 2.5 a d2 1n4148 t1 c5 47 f 10 v u2 ltv817a vr2 1n5240c 10 v, 2% r6 150 ? r15 150 ? c14 1 nf d1 uf4005 r3 68 k ? 2w c3 4.7 nf 1kv cy1 2.2 nf u1 top234y dm sf c topswitch-fx r8 150 ? c1 68 f 400 v c6 100 nf d8 mbr1060 c10 560 f 35 v c12 220 f 35 v c11 560 f 35 v control control rtn r5 6.8 ? r1 4.7 m ? 1/2 w r2 9.09 k ? pi-2525-040401 l3 3.3 h br1 600 v 2a f1 3.15 a j1 l1 20 mh l n cx1 100 nf 250 vac top232-234 b 7/01 15 figure 25. 35 w set-top box power supply. 35 w multiple output power supply figure 25 shows a five output, 35 w, secondary regulated power supply utilizing a top233 for multiple output applications such as set-top box, vcr, dvd, etc. the circuit shown is designed for a 230 vac input but can be used over the universal range at a derated output power of 25 w. alternatively, a doubler input stage can be used at 100 or 115 vac for the full power rating of 35 w. topswitch-fx provides several advantages in the above mentioned applications. a single line sense resistor r1 (2 m ? ) implements an under- voltage detect (at 100 v), over-voltage shutdown (at 450 v) and line feed forward with dc max reduction features. under- voltage detect ensures that the outputs are glitch free on power down. the over-voltage shutdown turns off the topswitch-fx mosfet above 450 v on the dc input rail, eliminating reflected voltage and leakage inductance spikes, and hence, extending the surge withstand to the 700 vdc rating of the mosfet. this feature prevents field failures in countries where prolonged line voltage surges are common. this design also takes advantage of soft-start and higher operating frequency to reduce transformer size. a snubber circuit (r4, c4) is used to slowdown dv/dt of the switching waveform minimizing radiated video noise that could interfere with tv reception. the half frequency option of the topswitch-fx can be used by connecting the frequency pin to the control pin instead of the source pin in video noise sensitive applications to allow for heavier snubbing without significant impact on efficiency. this design achieves 5% load regulation on 3.3 v and 5 v outputs using dual sensed optocoupler feedback through resistors r9, r10 and r11. other output voltages are set by the transformer turns ratio. output voltage on the low power -5 v output is shunt regulated by resistor r12 and zener diode vr2. dummy load resistor r13 is required to maintain regulation of the 30 v output under light load conditions. compensation of the tl431 (u3) is achieved with resistor r8 and capacitor c7. primary side compensation and auto-restart frequency are determined by resistor r5 and capacitor c5. second stage lc post-filtering is used on the 3.3 v, 5 v and 18 v high power outputs (l2, l3, l4 and c13, c15, c17) for low ripple. full load operating efficiency exceeds 75% across the ac input range. primary clamp components vr1 and d1 limit peak drain voltage to a safe value. the frequency jittering in topswitch-fx helps reduce emi, maintaining emissions below cispr 22 (fcc b) levels through proper choice of y1 capacitor (cy1) and input filtering elements (cx1, l1). to minimize coupling of common mode transients to the top233, y1 capacitor is tied to the positive input dc rail. lightning strike immunity to 3 kv is attained with the addition of a 275 v mov (rv1). 5 v @ 2.5 a 3.3 v @ 3 a rtn d2 1n4148 t1 u2 ltv817 u3 tl431clp c8 22 f r6 51 ? r11 10.0 k ? c7 0.1 f r9 9.53 k ? r10 15.0 k ? r8 10 ? r7 510 ? d8 mur120 d9 uf5402 c12 220 f 25 v cy1 2.2 nf 30 v @ 100 ma 18 v @ 550 ma d1 uf4007 vr1 p6ke200 br1 400 v f1 3.15 a rv1 275 v j1 l1 20 mh l n r5 6.8 ? c5 47 f c4 47 pf top233y u1 dm sf c topswitch-fx r1 2 m ? 1/2 w r13 24 k ? r4 2 k ? c1 33 f 400 v c6 100 nf c10 100 f 50 v d10 mbr1045 c14 1000 f 25 v l3 3.3 h l4 3.3 h c15 100 f 10 v c13 100 f 25 v c11 1 f 50 v l2 3.3 h d11 byw29- 100 c16 1000 f 25 v c18 330 f 10 v r12 5 ? d12 1n5819 -5 v @ 100 ma cx1 0.1 f 250 vac c17 100 f 10 v c19 100 f 10 v vr2 1n5231 pi-2536-040401 control control top232-234 16 b 7/01 17 w pc standby power supply figure 26 shows a 17 w pc standby application with 3.3 v and 5 v secondary outputs and a 15 v primary output. the supply uses the top232 operating from 230 vac or 100/115 vac with doubler input. this design takes advantage of the soft- start, line under-voltage detect, tighter current limit variation and higher switching frequency features of topswitch-fx . for example, the higher switching frequency with tighter current limit variation allows use of an ee19 transformer core. furthermore, the spacing between high voltage drain pin and low voltage pins of the topswitch-fx packages provides large creepage distance which is a significant advantage in high pollution environments such as fan cooled pc power supplies. capacitor c1 provides high frequency decoupling of the high voltage dc supply, and is necessary only if there is a long trace length from the source of the dc supply to the inputs of this standby circuit. the line sense resistor r1 senses the dc input voltage for line under-voltage. when ac is turned off, the under-voltage detect feature of the topswitch-fx prevents auto-restart glitches at the output caused by the slow discharge of large storage capacitance in the main converter. this is achieved by turning the power supply off when the input voltage goes below a level needed to maintain output regulation and keeping it off until the input voltage goes above the under-voltage threshold (v uv ), when the ac is turned on again. the under voltage threshold is set at 200vdc, slightly below the required lowest operating dc input voltage, for start-up at 170vac. this feature saves several components needed to implement the glitch free turn off with discrete or topswitch-ii based designs. the bias winding is rectified and filtered by d2 and c6 to create a bias voltage for the top232 and to provide a 15v primary bias output voltage for the main power supply primary control circuitry. both 3.3v and 5v output voltages are sensed by r9, r10 and r11 using a tl431 (u3) circuit shown. resistor r6 limits current through optocoupler u2 and sets overall ac control loop gain. resistor r7 assures that there is sufficient bias current for the tl431 when the optocoupler is at a minimum current. capacitor c8 provides a soft-finish function to eliminate turn-on overshoot. the no load regulation (cycle-skipping) of topswitch-fx permits the circuit to meet the low standby power requirement of the blue angel specification for pcs. figure 26. 17 w pc standby supply. 3.3 v @ 2 a 200-375 vdc d2 bav21 t1 c8 10 f 35 v c11 100 f 10 v c5 47 f u2 sfh615-2 u3 tl431clp c7 0.1 f r6 301 ? r9 16.2 k ? d1 uf4005 vr1 bzy97c-200 u1 top232y dm sf c topswitch-fx r7 510 ? c1 0.01 f 1 kv (optional) (primary referenced) c6 35 v d4 sb540 d3 sb540 5 v @ 2 a c12 1000 f 10 v c10 1000 f 10 v cy1 1 nf + - pi-2537-040401 rtn 15 v @ 30 ma r5 6.8 ? r1 3.9 m ? l2 3.3 h l1 3.3 h r10 12.1 k ? r11 10 k ? c13 100 f 10 v control control top232-234 b 7/01 17 processor controlled supply turn on/off a low cost momentary contact switch can be used to turn the topswitch-fx power on and off under microprocessor control that may be required in some applications such as printers. the low power remote off feature allows an elegant implementation of this function with very few external components as shown in figure 27. whenever the push button momentary contact switch p1 is closed by the user, the optocoupler u3 is activated to inform the microprocessor of this action. initially, when the power supply is off (m pin is floating), closing of p1 turns the power supply on by shorting the m pin of the topswitch-fx to source through a diode (remote on). when the secondary output voltage vcc is established, the microprocessor comes alive and recognizes that the switch p1 is closed through the switch status input that is driven by the optocoupler u3 output. the microprocessor then sends a power supply control signal to hold the power supply in the on-state through the optocoupler u4. if the user presses the switch p1 again to command a turn off, the microprocessor detects this through the optocoupler u3 and initiates a shutdown procedure that is product specific. for example, in the case of the inkjet printer, the shutdown procedure may include safely parking the print heads in the storage position. in the case of products with a disk drive, the shutdown procedure may include saving data or settings to the disk. after the shutdown procedure is complete, when it is safe to turn off the power supply, the microprocessor releases the m pin by turning the optocoupler u4 off. if the manual switch and the optocouplers u3 and u4 are not located close to the m pin, a capacitor c m may be needed to prevent noise coupling to the pin when it is open. the power supply could also be turned on remotely through a local area network or a parallel or serial port by driving the optocoupler u4 input led with a logic signal. sometimes it is easier to send a train of logic pulses through a cable (due to ac coupling of cable, for example) instead of a dc logic level as a wake-up signal. in this case, a simple rc filter can be used to generate a dc level to drive u4 (not shown in figure 27). this remote on feature can be used to wake-up peripherals such as printers, scanners, external modems, disk drives, etc., as needed from a computer. peripherals are usually designed to turn off automatically if they are not being used for a period of time, to save power. figure 27. remote on/off using microcontroller. u1 u2 u4 u3 c m p1 pi-2561-040401 v cc (+5 v) return control high voltage dc input + - topswitch-fx dm sf c 1n4148 u4 ltv817a 6.8 k ? 1 nf 100 k ? 6.8 k ? u3 ltv817a 27 k ? 1n4148 47 f p1 switch status power supply on/off control external wake-up signal logic input logic output micro processor/ controller top232-234 18 b 7/01 in addition to using a minimum number of components, topswitch-fx provides many technical advantages in this type of application: 1. extremely low power consumption in the off mode: 80 mw typical at 110 vac and 160 mw typical at 230 vac. this is because in the remote/off mode the topswitch-fx consumes very little power, and the external circuitry does not consume any current (m pin is open) from the high voltage dc input. 2. a very low cost, low voltage/current, momentary contact switch can be used. 3. no debouncing circuitry for the momentary switch is required. during turn-on, the start-up time of the power supply (typically 10 to 20 ms) plus the microprocessor initiation time act as a debouncing filter, allowing a turn-on only if the switch is depressed firmly for at least the above delay time. during turn-off, the microprocessor initiates the shutdown sequence when it detects the first closure of the switch, and subsequent bouncing of the switch has no effect. if necessary, the microprocessor could implement the switch debouncing in software during turn-off, or a filter capacitor can be used at the switch status input. 4. no external current limiting circuitry is needed for the operation of the u4 optocoupler output due to internal limiting of m pin current. 5. no high voltage resistors to the input dc voltage rail are required to power the external circuitry in the primary. even the led current for u3 can be derived from the control pin. this not only saves components and simplifies layout, but also eliminates the power loss associated with the high voltage resistors in both on and off states. 6. robust design: there is no on/off latch that can be accidentally triggered by transients. instead, the power supply is held in the on-state through the secondary side microprocessor. top232-234 b 7/01 19 key application considerations topswitch-fx vs. topswitch-ll table 3 compares the features and performance differences between topswitch - fx and topswitch-ii . many of the new features eliminate the need for costly discrete component. other features increase the robustness of design allowing cost savings in the transformer and other power components. *not available table 3. comparison between topswitch-ii and topswitch-fx. (continued on next page) function topswitch-ii topswitch-fx figures advantages soft-start n/a* 10 ms limits peak current and voltage component stresses during start-up eliminates external components used for soft-start in most applications minimizes output overshoot external current limit n/a* programmable 8, 17, smaller transformer 100% to 40% of 18, 21, higher efficiency default current 22 allows tighter power limit limit during output overload conditions dc max 67% 78% 4 smaller input cap (wider dynamic range) higher power capability (when used with rcd clamp for large v or ) allows use of schottky secondary rectifier diode for up to 15 v output for high efficiency line feed forward with n/a* 78% to 38% 4, 8, 14, rejects line ripple dc max reduction 23 increases transient and surge voltage withstand capability line ov shutdown n/a* single resistor 8, 14, increases voltage withstand cap- programmable 16, 23 ability against line surge line uv detection n/a* single resistor 5, 8, 14, prevents auto-restart glitches programmable 15, 23 during power down switching frequency 100 khz 10% 132 khz 7% 10 smaller transformer fundamental below 150 khz for conducted emi switching frequency n/a* 66 khz 7% 11, 12 lower losses when using rc and option (to-220 only) rcd snubber for noise reduction in video applications allows for higher efficiency in standby mode lower emi (second harmonic below 150 khz) frequency jitter n/a* 4 khz@132 khz 6, 28 reduces conducted emi 2 khz@66 khz cycle skipping n/a* at dc min (1.5%) 4 zero load regulation without dummy load low power consumption at no load top232-234 20 b 7/01 topswitch-fx design considerations topswitch-fx selection selecting the optimum topswitch - fx depends upon required maximum output power, efficiency, heat sinking constraints and cost goals. with the option to externally reduce current limit, a larger topswitch - fx may be used for lower power applications where higher efficiency is needed or minimal heat sinking is available. input capacitor the input capacitor must be chosen to provide the minimum dc voltage required for the topswitch - fx converter to maintain regulation at the lowest specified input voltage and maximum output power. since topswitch - fx has a higher dc max than topswitch-ii , it is possible to use a smaller input capacitor. for topswitch - fx, a capacitance of 2 f per watt is usually sufficient for universal input with an appropriately designed transformer. primary clamp and output reflected voltage v or a primary clamp is necessary to limit the peak topswitch - fx drain to source voltage. a zener clamp (see figure 26, vr1) requires few parts and takes up little board space. for good efficiency, the clamp zener should be selected to be at least 1.5 times the output reflected voltage v or as this keeps the leakage spike conduction time short. when using a zener clamp in a universal input application, a v or of less than 135 v is recommended to allow for the absolute tolerances and temperature variations of the zener. this will ensure efficient operation of the clamp circuit and will also keep the maximum drain voltage below the rated breakdown voltage of the topswitch - fx mosfet. a high v or is required to take full advantage of the wider dc max of topswitch - fx. an rcd clamp provides tighter clamp voltage tolerance than a zener clamp and allows a v or as high as 165 v. the v or can be further increased in continuous mode designs up to 185 v by reducing the external current limit as a function of input line voltage (see figure 18). the rcd clamp *not available table 3 (cont). comparison between topswitch-ii and topswitch-fx. function topswitch-ii topswitch-fx figures advantages remote on/off n/a* single transistor 8, 19, fast on/off (cycle by cycle) or optocoupler 20, 21, active-on or active-off control interface or manual 22, 23, low consumption in remote off state switch 27 active-on control for fail-safe eliminates expensive in-line on/off switch allows processor controlled turn on/ off permits shutdown/wake-up of peripherals via lan or parallel port synchronization n/a* single transistor synchronization to external lower or optocoupler frequency signal interface starts new switching cycle on demand thermal shutdown latched hysteretic (with automatic recovery from thermal 70 c hysteresis) fault large hysteresis prevents circuit board overheating current limit tolerance 10% (@25 c) 7% (@25 c) 10% higher power capability due to -8% (0 c to100 c) -4% (0 c to 100 c) tighter tolerance drain dip 0.037" / 0.94 mm 0.137" / 3.48 mm greater immunity to arcing as a creepage at smd 0.037" / 0.94 mm 0.137" / 3.48 mm result of build-up of dust, debris and package to-220 0.046" / 1.17 mm 0.068" / 1.73 mm other contaminants drain creepage at 0.045" / 1.14 mm 0.113" / 2.87 mm preformed leads accommodate pcb for to-220 (preformed leads) large creepage for pcb layout easier to meet safety (ul/vde) top232-234 b 7/01 21 is more cost effective than the zener clamp but requires more careful design (see quick design checklist). output diode the output diode is selected for peak inverse voltage, output current, and thermal conditions in the application (including heat sinking, air circulation, etc.). the higher dc max of topswitch - fx along with an appropriate transformer turns ratio can allow the use of a 60 v schoktty diode for higher efficiency on output voltages as high as 15 v (see figure 24. a 12 v, 30 w design using a 60 v schottky for the output diode). soft-start generally a power supply experiences maximum stress at start- up before the feedback loop achieves regulation. for a period of 10 ms the on-chip soft-start linearly increases the duty cycle from zero to the default dc max at turn on, which causes the primary current and output voltage to rise in an orderly manner allowing time for the feedback loop to take control of the duty cycle. this reduces the stress on the top switch-fx mosfet, clamp circuit and output diode(s), and helps prevent transformer saturation during start-up. also, soft-start limits the amount of output voltage overshoot, and in many applications eliminates the need for a soft-finish capacitor. emi the frequency jitter feature modulates the switching frequency over a narrow band as a means to reduce conducted emi peaks associated with the harmonics of the fundamental switching frequency. this is particularly beneficial for average detection mode. as can be seen in figure 28, the benefits of jitter increase with the order of the switching harmonic due to an increase in frequency deviation. the frequency pin of topswitch - fx offers a switching frequency option of 132 khz or 66 khz. in applications that require heavy snubbers on the drain node for reducing high frequency radiated noise (for example, video noise sensitive applications such as vcr, dvd, monitor, tv, etc.), operating at 66 khz will reduce snubber loss resulting in better efficiency. also, in applications where transformer size is not a concern, use of the 66 khz option will provide lower emi and higher efficiency. note that the second harmonic of 66 khz is still below 150 khz, above which the conducted emi specifications get much tighter. for 10 w or below, it is possible to use a simple inductor in place of a more costly ac input common mode choke to meet worldwide conducted emi limits. transformer design it is recommended that the transformer be designed for maximum operating flux density of 3000 gauss and a peak flux density of 4200 gauss at maximum current limit. the turns ratio should be chosen for a reflected voltage (v or ) no greater than 135 v when 12 10 8 6 4 2 0 2nd 3rd 4th 5th switching harmonic pi-2559-093099 noise reduction (db) quasi-peak average -20 -10 0 -10 20 30 40 50 60 70 80 0.15 1 10 30 frequency (mhz) amplitude (db v) pi-2576-010600 vfg243b (qp) vf646b (av) topswitch-ii (no jitter) vfg243b (qp) vf646b (av) -20 -10 0 -10 20 30 40 50 60 70 80 0.15 1 10 30 frequency (mhz) amplitude (db v) pi-2577-010600 topswitch-fx (with jitter) (a) (b) (c) figure 28. (a) conducted noise improvement for low frequency harmonics due to jitter, (b) topswitch-ii full range emi scan (100khz, no jitter), (c) topswitch-fx full range emi scan (132 khz, with jitter) with identical circuitry and conditions. top232-234 22 b 7/01 figure 29. layout considerations for topswitch-fx using dip or smd (using line sensing for under-voltage and overvoltage). top view pi-2543-092199 y1- capacitor opto- coupler d + - hv j1 r1 + - dc out input filter capacitor output filter capacitor safety spacing t r a n s f o r m e r maximize hatched copper areas ( ) for optimum heat sinking s pri sec s s s c bias m topswitch-fx figure 30. layout considerations for topswitch-fx using to-220 package (using current limit reduction with line voltage). top view pi-2544-092199 y1- capacitor opto- coupler d + - hv + - dc out input filter capacitor heat sink output filter capacitor safety spacing t r a n s f o r m e r maximize hatched copper areas ( ) for optimum heat sinking pri sec c j1 r1 r2 topswitch-fx bias t r a n s f o r m e r m s f top232-234 b 7/01 23 using a zener clamp, 165 v when using an rcd clamp and 185 v when using rcd clamp with current limit feed forward. for designs where operating current is significantly lower than the default current limit, it is recommended to use an externally set current limit close to the operating peak current to reduce peak flux density and peak power (see figure 17). in most applications, the tighter current limit tolerance, higher switching frequency and soft-start features of topswitch-fx contribute to a smaller transformer when compared to topswitch-ii. standby consumption cycle skipping can significantly reduce power loss at zero load, especially when a zener clamp is used. for very low secondary power consumption use a tl431 regulator for feedback control. alternately, switching losses can be significantly reduced by switching from 132 khz in normal operation to 66 khz under light load conditions. topswitch-fx layout considerations primary side connections use a single point (kelvin) connection at the negative terminal of the input filter capacitor for topswitch-fx source pin and bias winding return. this improves surge capabilities by returning surge currents from the bias winding directly to the input filter capacitor. the control pin bypass capacitor should be located as close as possible to the source and control pins and its source connection trace should not be shared by the main mosfet switching currents. all source pin referenced components connected to the multi-function pin should also be located close to source and multi-function pins with dedicated source pin connection. the multi-function pin's trace should be kept as short as possible and away from the drain trace to prevent noise coupling. line sense resistor (r1 in figures 29 and 30) should be located close to the multi-function pin to minimize the trace length on the multi-function pin side. in addition to the 47 f control pin capacitor, a high frequency bypass capacitor in parallel may be used for better noise immunity. the feedback optocoupler output should also be located close to the control and source pins of topswitch-fx. y-capacitor the y-capacitor should be connected close to the secondary output return pin(s) and the primary dc input pin of the transformer (see figures 29 and 30). heat sinking the tab of the y package (to-220) is internally electrically tied to the source pin. to avoid circulating currents, a heat sink attached to the tab should not be electrically tied to any nodes on the pc board. when using p (dip-8) or g (smd-8) packages, a copper area underneath the package connected to the source pins will act as an effective heat sink. in addition, sufficient copper area should be provided at the anode and cathode leads of the output diode(s) for heat sinking. quick design checklist as with any power supply design, all topswitch-fx designs should be verified on the bench to make sure that components specifications are not exceeded under worst case conditions. the following minimum set of tests is strongly recommended: 1. maximum drain voltage verify that peak v ds does not exceed 675 v at highest input voltage and maximum overload output power. maximum overload output power occurs when the ouput is overloaded to a level just before the power supply goes into auto-restart (loss of regulation). 2. maximum drain current at maximum ambient temperature, maximum input voltage and maximum output load, verify drain current waveforms at start-up for any signs of transformer saturation and excessive leading edge current spikes. topswitch-fx has a leading edge blanking time of 200 ns to prevent premature termination of the on-cycle. verify that the leading edge current spike is below the allowed current limit envelope (see figure 33) for the drain current waveform at the end of the 200 ns blanking period. 3. thermal check at maximum output power, minimum input voltage and maximum ambient temperature, verify that temperature specifications are not exceeded for topswitch-fx , transformer, output diodes and output capacitors. enough thermal margin should be allowed for the part-to-part variation of the r ds(on) of topswitch-fx as specified in the data sheet. the margin required can either be calculated from the tolerances or it can be accounted for by connecting an external resistance in series with the drain pin and attached to the same heatsink, having a resistance value that is equal to the difference between the measured r ds(on) of the device under test and the worst case maximum specification. design tools 1. technical literature: data sheet, application notes, design ideas, etc. 2. transformer design spreadsheet. 3. engineering prototype boards. up to date information on design tools can be found at power integrations web site: www.powerint.com top232-234 24 b 7/01 absolute maximum ratings (1) drain voltage ............................................ -0.3 to 700 v drain peak current: top232 ................................. 0.8 a top233 ................................. 1.6 a top234 ................................. 2.4 a control voltage .......................................... -0.3 to 9 v control current ...............................................100 ma multi-function pin voltage .................... -0.3 to 9 v frequency pin voltage ............................... -0.3 to 9 v i c = 4 ma; t j = 25 c i c = i cd1 f osc ? f f m dc max dc min t soft control functions conditions (unless otherwise specified) see figure 34 source = 0 v ; t j = -40 to 125 c min typ max parameter symbol units thermal impedance khz khz hz % % ms %/ma thermal impedance: y package ( ja ) (1) ............... 70 c/w ( jc ) (2) ................. 2 c/w p/g package: ( ja ) ........ 45 c/w (3) ; 35 c/w (4) ( jc ) (5) .......................... 11 c/w notes: 1. free standing with no heatsink. 2. measured at the back surface of tab. 3. soldered to 0.36 sq. inch (232 mm 2 ), 2oz. (610 gm/m 2 ) copper clad. 4. soldered to 1 sq. inch (645 mm 2 ), 2oz. (610 gm/m 2 ) copper clad. 5. measured on the source pin close to plastic interface. 124 132 140 61.5 66 70.5 4 2 250 75.0 78.0 82.0 35.0 47.0 57.0 0.8 1.5 2.7 10 14 -27 -22 -17 i c = 4 ma; t j = 25 c switching frequency (average) frequency jitter deviation frequency jitter modulation rate maximum duty cycle minimum duty cycle (prior to cycle skipping) soft start time pwm gain frequency pin connected to source frequency pin connected to control 132 khz operation 66 khz operation i m i m(dc) i m = 190 a t j = 25 c; dc min to dc max storage temperature ..................................... -65 to 150 c operating junction temperature (2) ................ -40 to 150 c lead temperature (3) ................................................ 260 c notes: 1. all voltages referenced to source, t a = 25 c. 2. normally limited by internal circuitry. 3. 1/16" from case for 5 seconds. top232-234 b 7/01 25 control functions (cont.) conditions (unless otherwise specified) see figure 34 source = 0 v ; t j = -40 to 125 c min typ max parameter symbol units see note a see figure 4 t j = 25 c i c = 4 ma; t j = 25 c see figure 32 l b z c pwm gain temperature drift external bias current control current at start of cycle skipping dynamic impedance dynamic impedance temperature drift control pin internal filter pole %/ma/ c ma ma ? %/ c khz shutdown/auto-restart v c = 0 v v c = 5 v l c (ch) v c(ar) control pin charging current charging current temperature drift auto-restart upper threshold voltage auto-restart lower threshold voltage auto-restart hysteresis voltage auto-restart duty cycle auto-restart frequency ma %/ c v v v % hz -5.0 -3.8 -2.6 -3.0 -1.9 -0.8 0.5 5.8 4.5 4.8 5.1 0.8 1.0 248 1.0 t j = 25 c see note a - 0.01 1.2 1.9 2.8 5.9 7.5 10 15 22 0.18 7 top232-234 26 b 7/01 multi-function input conditions (unless otherwise specified) see figure 34 source = 0 v ; t j = -40 to 125 c min typ max parameter symbol units l uv i ov i rem (n) i m (sc) v m i m (dc) t ron t roff a a a a a a v a %/ a ma s s 44 50 54 210 225 240 10 -43 -35 -27 -7 300 400 520 -300 -240 -180 -110 -90 -70 2.00 2.60 3.00 2.50 2.90 3.30 1.25 1.32 1.39 1.18 1.24 1.30 75 90 110 0.30 0.6 1.1 1.0 1.8 1.5 2.5 4.0 1.5 2.5 4.0 t j = 25 c multi-function pin floating multi-function pin shorted to control t j = 25 c threshold hysteresis t j = 25 c v m = v c normal mode auto-restart mode l m = 50 a l m = 225 a l m = -50 a l m = -150 a t j = 25 c i m > i m (dc) v drain = 150 v from remote on to drain turn-on see note b minimum time before drain turn-on to disable cycle see note b v m = 0 v threshold hysteresis line under-voltage threshold current line over-voltage or remote on/ off threshold current and hysteresis remote on/off negative threshold current and hysteresis multi-function pin short circuit current multi-function pin voltage maximum duty cycle reduction onset threshold current maximum duty cycle reduction slope remote off drain supply current remote on delay remote off setup time top232-234 b 7/01 27 i limit i init t leb t ild v c(reset) r ds(on) a a ns ns c c v ? conditions (unless otherwise specified) see figure 34 source = 0 v ; t j = -40 to 125 c min typ max parameter symbol units circuit protection see figure 33 t j = 25 c t j = 25 c t j = 100 c t j = 25 c t j = 100 c t j = 25 c t j = 100 c top232 i d = 50 ma top233 i d = 100 ma top234 i d = 150 ma output frequency input frequency pin threshold voltage frequency pin input current v f = v c v f i f 0.465 0.500 0.535 0.930 1.000 1.070 1.395 1.500 1.605 0.75 x i limit(min) 0.6 x i limit(min) 200 100 125 135 150 70 2.0 3.3 4.3 15.6 18.0 25.7 30.0 7.8 9.0 12.9 15.0 5.2 6.0 8.6 10.0 self protection current limit initial current limit leading edge blanking time current limit delay thermal shutdown temperature thermal shutdown hysteresis power-up reset threshold voltage on-state resistance top232 t j = 25 c top233 t j = 25 c top234 t j = 25 c 85 vac (rectified line input) 265 vac (rectified line input) i c = 4 ma i c = 4 ma figure 34, s1 open internal; di/dt = 100ma/ s internal; di/dt = 200ma/ s internal; di/dt = 300ma/ s see note b 1.0 2.9 v c -1.0 v 10 22 40 a see note c see note c see note c top232-234 28 b 7/01 100 50 36 5.60 5.85 6.10 50 1.0 1.5 2.0 0.3 0.6 1.0 ns ns v v ppm/ c ma conditions (unless otherwise specified) see figure 34 source = 0 v ; t j = -40 to 125 c min typ max parameter symbol units t r t f v c(shunt) l cd1 l cd2 measured in a typical flyback converter application see note d i c = 4 ma output mosfet enabled v m = 0 v output mosfet disabled v m = 0 v supply voltage characteristics output (cont.) off-state current breakdown voltage i dss bv dss 150 a 700 v rise time fall time drain supply voltage shunt regulator voltage shunt regulator temperature drift control supply/ discharge current v m = floating; i c = 4ma v ds = 560 v; t j = 125 c v m = floating; i c = 4ma i d = 100 a; t j = 25 c notes: a. for specifications with negative values, a negative temperature coefficient corresponds to an increase in magnitude with increasing temperature, and a positive temperature coefficient corresponds to a decrease in magnitude with increasing temperature. b. guaranteed by characterization. not tested in production. c. for externally adjusted current limit values, please refer to the graph (current limit vs. external current limit resistance) in the typical performance characteristics section. d. it is possible to start up and operate topswitch-fx at drain voltages well below 36 v. however, the control pin charging current is reduced, which affects start-up time, auto-restart frequency, and auto-restart duty cycle. refer to the characteristic graph on control pin charge current (i c ) vs. drain voltage for low voltage operation characteristics. top232-234 b 7/01 29 figure 32. control pin i-v characteristic. figure 31. duty cycle measurement. figure 33. drain current operating envelope. figure 34. topswitch-fx general test circuit. pi-2538-040401 5-50 v s4 0-60 k ? 40 v 0-15 v 0.1 f 47 f 470 ? 5 w 470 ? 100 k ? notes: 1. this test circuit is not applicable for current limit or output characteristic measurements. 2. for p and g packages, short all source pins together. d s f c m c control topswitch-fx s2 s3 s1 0.8 1.3 1.2 1.1 0.9 0.8 1.0 0 012 6 8 3 time (us) drain current (normalized) pi-2022-033001 45 7 0.7 0.6 0.5 0.4 0.3 0.2 0.1 i limit(max) @ 25 c i limit(min) @ 25 c i init(min) @ 85 vac i init(min) @ 265 vac t leb (blanking time) pi-2039-033001 drain voltage hv 0 v 90% 10% 90% t 2 t 1 d = t 1 t 2 120 100 80 40 20 60 0 0246810 control pin voltage (v) control pin current (ma) 1 slope dynamic impedance = pi-1939-091996 top232-234 30 b 7/01 the following precautions should be followed when testing topswitch-fx by itself outside of a power supply. the schematic shown in figure 34 is suggested for laboratory testing of topswitch-fx . when the drain pin supply is turned on, the part will be in the auto-restart mode. the control pin voltage will be oscillating at a low frequency between 4.8 and 5.8 v and the drain is turned on every eighth cycle of the control pin oscillation. if the control pin power supply is turned on while in this auto- bench test precautions for evaluation of electrical characteristics typical performance characteristics restart mode, there is only a 12.5% chance that the control pin oscillation will be in the correct state (drain active state) so that the continuous drain voltage waveform may be observed. it is recommended that the v c power supply be turned on first and the drain pin power supply second if continuous drain voltage waveforms are to be observed. the 12.5% chance of being in the correct state is due to the divide-by-8 counter. temporarily shorting the control pin to the source pin will reset topswitch-fx, which then will come up in the correct state. .3 .4 .5 .6 .7 .8 .9 1.0 -250 -200 -150 -100 -50 0 i m ( a) current limit (a) current limit vs. multi-function pin current pi-2540-033001 60 80 100 120 140 160 180 200 di/dt (ma/ s) top234 1.50 top233 1.00 top232 0.50 scaling factors: .3 .4 .5 .6 .7 .8 .9 1.0 1.1 60 80 100 120 140 160 180 200 0 5k 10k 15k 20k 25k external current limit resistor r il ( ? ) current limit (a) di/dt (ma/ s) current limit vs. external current limit resistance pi-2539-033001 30k maximum and minimum levels are based on characterization. maximum minimum typical top234 1.50 top233 1.00 top232 0.50 scaling factors: top232-234 b 7/01 31 typical performance characteristics (cont.) 1.1 1.0 0.9 -50 -25 0 25 50 75 100 125 150 junction temperature ( c) breakdown voltage (normalized to 25 c) breakdown vs. temperature pi-176b-033001 1.2 1.0 0.8 0.6 0.4 0.2 0 -50 -25 0 25 50 75 100 125 150 junction temperature ( c) frequency vs. temperature pi-1123a-033001 output frequency (normalized to 25 c) 1.2 1.0 0.8 0.6 0.4 0.2 0 -50 -25 0 25 50 75 100 125 150 junction temperature ( c) internal current limit vs. temperature pi-2555-033001 current limit (normalized to 25 c) 1.2 1.0 0.8 0.6 0.4 0.2 0 -50 -25 0 25 50 75 100 125 150 junction temperature ( c) external current limit vs. temperature with r il = 12 k ? pi-2554-033001 current limit (a) top234 1.50 top233 1.00 top232 0.50 scaling factors: 1.2 1.0 0.8 0.6 0.4 0.2 0 -50 -25 0 25 50 75 100 125 150 junction temperature ( c) over-voltage threshold vs. temperature pi-2553-033001 over-voltage threshold (normalized to 25 c) 1.2 1.0 0.8 0.6 0.4 0.2 0 -50 -25 0 25 50 75 100 125 150 junction temperature ( c) under-voltage threshold vs. temperature pi-2552-033001 under-voltage threshold (normalized to 25 c) top232-234 32 b 7/01 typical performance characteristics (cont.) 1.2 1.4 1.6 0.4 0.6 0.2 0.8 1.0 0 -300 -200 -150 -50 -250 -100 0 multi-function pin voltage (v) multi-function pin voltage vs. current (expanded) pi-2541-091699 multi-function pin current ( a) 6 5 4 3 2 1 0 -300 -200 -100 0 100 200 300 400 500 multi-function pin voltage vs. current pi-2542-091699 multi-function pin (v) multi-function pin current ( a) see expanded version 2 1.2 1.6 0 0 20 40 60 80 100 drain voltage (v) control pin charging current (ma) i c vs. drain voltage pi-2564-101499 0.4 0.8 v c = 5 v 1.2 1.0 0.8 0.6 0.4 0.2 0 -50 -25 0 25 50 75 100 125 150 junction temperature ( c) control current at start of cycle skipping vs. temperature pi-2562-033001 control current (normalized to 25 c) 1.2 1.0 0.8 0.6 0.4 0.2 0 -50 -25 0 25 50 75 100 125 150 junction temperature ( c) max. duty cycle reduction onset threshold current vs. temperature pi-2563-033001 onset threshold current (normalized to 25 c) 1.5 0 0 246810 drain voltage (v) drain current (a) output characteristics pi-1940-033001 0.5 t case = 25 c t case = 100 c 1 top234 1.00 top233 0.67 top232 0.33 scaling factors: top232-234 b 7/01 33 typical performance characteristics (cont.) 1000 10 0 400 200 600 drain voltage (v) drain capacitance (pf) c oss vs. drain voltage 100 pi-1941-033001 top234 1.00 top233 0.67 top232 0.33 scaling factors: 200 300 100 0 0 200 400 600 drain voltage (v) power (mw) drain capacitance power (132 khz) pi-1942-033001 top234 1.00 top233 0.67 top232 0.33 scaling factors: top232-234 34 b 7/01 pi-2560-033001 notes: 1. controlling dimensions are inches. millimeter dimensions are shown in parentheses. 2. pin locations start with pin 1, and continue from left to right when viewed from the front. pins 2 and 6 are omitted. 3. dimensions do not include mold flash or other protrusions. mold flash or protrusions shall not exceed .006 (.15mm) on any side. 4. minimum metal to metal spacing at the pack- age body for omitted pin locations is .068 inch (1.73 mm). 5. position of the formed leads to be measured at the mounting plane, .670 inch (17.02 mm) below the hole center. 6. all terminals are solder plated. y07b pin 1 pin 7 mounting hole pattern .050 (1.27) .150 (3.81) .050 (1.27) .150 (3.81) .050 (1.27) .050 (1.27) .180 (4.58) .200 (5.08) pin 1 + .010 (.25) m .467 (11.86) .487 (12.37) .400 (10.16) .415 (10.54) .146 (3.71) .156 (3.96) .860 (21.84) .880 (22.35) .028 (.71) .032 (.81) .050 (1.27) bsc .150 (3.81) bsc .108 (2.74) ref pin 1 & 7 7 typ. pin 4 .040 (1.02) .060 (1.52) .190 (4.83) .210 (5.33) .015 (.38) .020 (.51) .095 (2.41) .115 (2.92) .236 (5.99) .260 (6.60) .165 (4.19) .185 (4.70) .040 (1.02) .060 (1.52) .045 (1.14) .055 (1.40) .670 (17.02) ref. .570 (14.48) ref. to-220-7b top232-234 b 7/01 35 notes: 1. package dimensions conform to jedec specification ms-001-ab (issue b 7/85) for standard dual-in-line (dip) package with .300 inch row spacing. 2. controlling dimensions are inches. millimeter sizes are shown in parentheses. 3. dimensions shown do not include mold flash or other protrusions. mold flash or protrusions shall not exceed .006 (.15) on any side. 4. pin locations start with pin 1, and continue counter-clock- wise to pin 8 when viewed from the top. the notch and/or dimple are aids in locating pin 1. pin 6 is omitted. 5. minimum metal to metal spacing at the package body for the omitted lead location is .137 inch (3.48 mm). 6. lead width measured at package body. 7. lead spacing measured with the leads constrained to be perpendicular to plane t. .010 (.25) .015 (.38) .300 (7.62) bsc (note 7) .300 (7.62) .390 (9.91) .375 (9.53) .385 (9.78) .245 (6.22) .255 (6.48) .128 (3.25) .132 (3.35) .057 (1.45) .063 (1.60) .125 (3.18) .135 (3.43) 0.15 (.38) minimum .048 (1.22) .053 (1.35) .100 (2.54) bsc .014 (.36) .022 (.56) -e- pin 1 seating plane -d- -t- p08b dip-8b pi-2551-033001 d s .004 (.10) t e d s .010 (.25) m (note 6) smd-8b pi-2546-040501 .004 (.10) .012 (.30) .036 (0.91) .044 (1.12) .004 (.10) 0 - 8 .375 (9.53) .385 (9.78) .048 (1.22) .009 (.23) .053 (1.35) .032 (.81) .037 (.94) .128 (3.25) .132 (3.35) -d- notes: 1. controlling dimensions are inches. millimeter sizes are shown in parentheses. 2. dimensions shown do not include mold flash or other protrusions. mold flash or protrusions shall not exceed .006 (.15) on any side. 3. pin locations start with pin 1, and continue counter-clock pin 8 when viewed from the top. pin 6 is omitted. 4. minimum metal to metal spacing at the package body for the omitted lead location is .137 inch (3.48 mm). 5. lead width measured at package body. 6. d and e are referenced datums on the package body. .057 (1.45) .063 (1.60) (note 5) e s .100 (2.54) (bsc) .372 (9.45) .245 (6.22) .388 (9.86) .255 (6.48) .010 (.25) -e- pin 1 d s .004 (.10) g08b heat sink is 2 oz. copper as big as possible .420 .046 .060 .060 .046 .080 pin 1 .086 .186 .286 solder pad dimensions top232-234 36 b 7/01 notes - 1) corrected rounding of operating frequency (132/66 khz). 2) corrected spelling. 3) corrected storage temperature jc and updated nomenclature in parameter table. date 1/00 7/01 revision a b korea power integrations international holdings, inc. rm# 402, handuk building 649-4 yeoksam-dong, kangnam-gu, seoul, korea phone: +82-2-568-7520 fax: +82-2-568-7474 e-mail: koreasales@powerint.com world headquarters americas power integrations, inc. 5245 hellyer avenue san jose, ca 95138 usa main: +1 408-414-9200 customer service: phone: +1 408-414-9665 fax: +1 408-414-9765 e-mail: usasales@powerint.com for the latest updates, visit our web site: www.powerint.com power integrations reserves the right to make changes to its products at any time to improve reliability or manufacturability. power integrations does not assume any liability arising from the use of any device or circuit described herein, nor does it convey any license under its patent rights or the rights of others. the pi logo, topswitch , tinyswitch and ecosmart are registered trademarks of power integrations, inc. ?copyright 2001, power integrations, inc. japan power integrations, k.k. keihin-tatemono 1st bldg. 12-20 shin-yokohama 2-chome kohoku-ku, yokohama-shi kanagawa 222-0033, japan phone: +81-45-471-1021 fax: +81-45-471-3717 e-mail: japansales@powerint.com taiwan power integrations international holdings, inc. 17f-3, no. 510 chung hsiao e. rd., sec. 5, taipei, taiwan 110, r.o.c. phone: +886-2-2727-1221 fax: +886-2-2727-1223 e-mail: taiwansales@powerint.com europe & africa power integrations (europe) ltd. centennial court easthampstead road bracknell berkshire, rg12 1yq united kingdom phone: +44-1344-462-300 fax: +44-1344-311-732 e-mail: eurosales@powerint.com china power integrations international holdings, inc. rm# 1705, bao hua bldg. 1016 hua qiang bei lu shenzhen, guangdong 518031 china phone: +86-755-367-5143 fax: +86-755-377-9610 e-mail: chinasales@powerint.com india (technical support) innovatech #1, 8th main road vasanthnagar bangalore, india 560052 phone: +91-80-226-6023 fax: +91-80-228-9727 e-mail: indiasales@powerint.com applications hotline world wide +1-408-414-9660 applications fax world wide +1-408-414-9760 |
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