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LXT384/6/8 twisted pair interface ? without component changes application note january 2001 order number: 249138-001 as of january 15, 2001, this document replaces the level one document known as an128 .
application note information in this document is provided in connection with intel ? products. no license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document. except as provided in intel?s terms and conditions of sale for such products, inte l assumes no liability whatsoever, and intel disclaims any express or implied warranty, relating to sale and/or use of intel products including liabil ity or warranties relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright or other intellectual property righ t. intel products are not intended for use in medical, life saving, or life sustaining applications. intel may make changes to specifications and product descriptions at any time, without notice. designers must not rely on the absence or characteristics of any features or instructions marked ? reserved ? or ? undefined. ? intel reserves these for future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them. the LXT384/6/8 twisted pair interface ? without component changes may contain design defects or errors known as errata which may cause the product to deviate from published specifications. current characterized errata are available on request. contact your local intel sales office or your distributor to obtain the latest specifications and before placing your product o rder. copies of documents which have an ordering number and are referenced in this document, or other intel literature may be obtaine d by calling 1-800-548-4725 or by visiting intel's website at http://www.intel.com. copyright ? intel corporation, 2001 *third-party brands and names are the property of their respective owners.
application note 3 LXT384/6/8 twisted pair interface ? without component changes contents 1.0 general description .................................................................................................. 5 2.0 LXT384/6/8 t1/e1 liu family ................................................................................. 6 3.0 lxt 384/6/8 standard line interface circuitry ............................................... 7 4.0 universal t1/e1 interface ........................................................................................ 8 4.1 transmit interface .................................................................................................8 4.1.1 high transmit return loss interface........................................................ 8 4.2 transmit interface summary ...............................................................................16 4.2.1 receive interface ...................................................................................17 5.0 conclusions ...............................................................................................................19 figures 1 LXT384/6/8 line interface circuitry.......................................................................5 2 high tx return loss interface............................................................................... 8 3 e1, twisted pair cable output ..............................................................................9 4 e1 twisted pair, tx return loss........................................................................... 9 5 low power interface............................................................................................10 6 e1, twisted pair cable output ............................................................................10 7 t1, len = 011 @ 0 ft. cable ...............................................................................11 8 t1, len = 011 @ 131 ft. cable ...........................................................................11 9 t1, len = 100 @ 131 ft. cable ...........................................................................12 10 t1, len = 100 @ 262 ft. cable ...........................................................................12 11 t1, len = 101 @ 262 ft. cable ...........................................................................13 12 t1, len = 101 @ 393 ft. cable ...........................................................................13 13 t1, len = 110 @ 393 ft. cable ...........................................................................14 14 t1, len = 110 @ 524 ft. cable ...........................................................................14 16 t1, len = 111 @ 655 ft. cable ...........................................................................15 15 t1, len = 111 @ 524 ft. cable ...........................................................................15 17 t1 twisted pair, tx return loss .........................................................................16 18 e1 twisted pair, tx return loss.........................................................................16 19 t1/e1 receive interface......................................................................................17 20 e1 twisted pair, tx return loss.........................................................................18 tables 1 transmit interface performance summary .........................................................18

LXT384/6/8 twisted pair interface ? without component changes application note 5 1.0 general description in today?s global economy, a critical consideration when designing telecommunications systems is compatibility with the various international standards. ideally, one should be able to design a system that can be sold in the different international markets with minimal or no hardware changes. by doing so, the manufacturer reduces the cost associated with maintaining different system versions. the designer of t1/e1 line interfaces is often faced with this same challenge. meeting all the electrical specifications using the same line interface circuitry for t1 and e1 can be a difficult task. this application note proposes two universal t1/e1 twisted pair line interface solutions using intel?s series of 3.3v t1/e1 lius. figure 1. LXT384/6/8 line interface circuitry 0.1 f tvcc r t r t 1:r ttip tring tvcc tgnd rtip rring r r r r 0.22 f 1:2 68 f tvcc d1 d2 tvcc d3 d4 560pf 1k ? 1k ? rx line tx line vcc gnd LXT384/6/8 (one channel) 0.1 f 3.3v
LXT384/6/8 twisted pair interface ? without component changes 6 application note 2.0 LXT384/6/8 t1/e1 liu family intel ? s family of 3.3v t1/e1 lius includes the following members: LXT384: eight channel t1/e1 liu with clock recovery and digital jitter attenuator (hardware/ software mode). lxt386: four channel version of the LXT384. lxt388: dual liu with four receivers. feature set is identical to the LXT384 with the addition of simultaneous receive and transmit jitter attenuator and dpm (driver performance monitoring). these devices have identical receive and transmit circuits. the following discussion applies to all three devices unless otherwise noted.
LXT384/6/8 twisted pair interface ? without component changes application note 7 3.0 lxt 384/6/8 standard line interface circuitry figure 1 shows the line interface circuitry as recommended in the LXT384/6/8 data-sheets. in the transmit section, the r t resistors change from e1 to t1. in t1 mode, series resistors are only supported when the transmitter power supply (tvcc) is set to 5v. in the receive section, the r r resistors are selected so that the input impedance offered by the receive circuitry matches the characteristic line impedance. therefore, r r is such that: z l = r 2 (2 r r ) where z l is the line characteristic impedance and r is the transformer turns ratio (in this case r = 2). consequently, to obtain optimum impedance matching and receive return loss performance, the designer typically changes r r when the line impedance changes. this is the case going from a t1 100 ? line impedance to an e1 120 ? line impedance. in the following section we will show that simple solutions exist for supporting t1/e1 twisted pair interfaces without component changes. transmit and receive interfaces are addressed in separate sections. the performance tradeoffs for each of the suggested configurations is discussed. test data is provided along with the recommended configurations. note that e1 coaxial cable interface is not addressed in this application note as most of the modern designs use twisted pair interfaces. in many applications, support for coaxial cable can be added with external baluns. for more information on supporting e1 coaxial and twisted pair interface in the same design, please refer to the LXT384 faq and the ? lxt380 design assistant ? at www.developer.intel.com/design/network.
LXT384/6/8 twisted pair interface ? without component changes 8 application note 4.0 universal t1/e1 interface 4.1 transmit interface two different t1/e1 transmit interface options are proposed in this section: a high transmit return loss interface and a low power interface. 4.1.1 high transmit return loss interface transmit return loss is a measure (in db) of the matching between the line impedance and the transmit interface impedance. high transmit return loss minimizes reflections and ensures quality transmission over harsh cable environments. the configuration illustrated in figure 2 can be used for both t1 and e1 operation while maintaining excellent transmit return loss performance. for t1 operation, this configuration coincides with the standard recommended interface. its performance is therefore well characterized in the product data-sheet. for e1, twisted pair operation, the transmit series resistors are slightly lower than the recommended value (r t = 11 ? ). the transient voltage suppressor and schottky diodes were added for surge protection. although intel recommends this protection for increased reliability, they are not mandatory for normal operation. 4.1.1.1 pulse template measurement the output voltage in e1 mode using this configuration is slightly higher than nominal. we measured a typical value of 3.2 v which is within the itu-t g.703 specified range: 2.7v < vo < 3.3v. figure 3 shows the resulting output pulse as measured using the LXT384 evaluation board. note: in typical applications, long pcb traces, protection elements, emi filters and connectors will add resistive loss that effectively reduces the output level at the measurement point. in these application, the increased output amplitude may actually result in additional margin to the pulse template specifications. figure 2. high tx return loss interface 9.1 ? 1:2 ttip tring 560pf tvcc tvcc LXT384/6/8 9.1 ? p0640sa teccor mbr0540t1 motorola s553-6500-55 bel-fuse
LXT384/6/8 twisted pair interface ? without component changes application note 9 4.1.1.2 transmit return loss measurement this configuration offers excellent transmit return loss performance exceeding the requirements in ets300166 by a comfortable margin. please refer to figure 4 . 4.1.1.3 low power interface figure 5 represent a low power solution for t1/e1 twisted pair cable interface. by using a transformer with a lower turns ratio, we effectively reduce the current consumption through the tvcc pins (tvcc = 5v). figure 3. e1, twisted pair cable output figure 4. e1 twisted pair, tx return loss etsi lxt38x
LXT384/6/8 twisted pair interface ? without component changes 10 application note 4.1.1.4 pulse template measurement since this configuration is not standard in the lxt38x datasheets, both t1 and e1 pulse template measurements were performed. figure 6 through figure 16 illustrate the measurements. figure 5. low power interface 9.53 ? 1:1.7 ttip tring 560pf tvcc tvcc LXT384/6/8 9.53 ? p0640sa teccor mbr0540t1 motorola s553-6500-73 bel-fuse figure 6. e1, twisted pair cable output
LXT384/6/8 twisted pair interface ? without component changes application note 11 figure 7. t1, len = 011 @ 0 ft. cable figure 8. t1, len = 011 @ 131 ft. cable
LXT384/6/8 twisted pair interface ? without component changes 12 application note figure 9. t1, len = 100 @ 131 ft. cable figure 10. t1, len = 100 @ 262 ft. cable
LXT384/6/8 twisted pair interface ? without component changes application note 13 figure 11. t1, len = 101 @ 262 ft. cable figure 12. t1, len = 101 @ 393 ft. cable
LXT384/6/8 twisted pair interface ? without component changes 14 application note figure 13. t1, len = 110 @ 393 ft. cable figure 14. t1, len = 110 @ 524 ft. cable
LXT384/6/8 twisted pair interface ? without component changes application note 15 4.1.1.5 transmit return loss measurement although transmit return loss performance in this configuration is not as good as the performance offered by the configuration described in the previous section, it is still enough to meet the requirements of ets 300166. note that there are no return loss specification for t1. in this application note, the corresponding e1 limits are used as a reference for the t1 measurements. figure 17 and figure 18 show the transmit return loss measurements. figure 15. t1, len = 111 @ 524 ft. cable figure 16. t1, len = 111 @ 655 ft. cable
LXT384/6/8 twisted pair interface ? without component changes 16 application note 4.2 transmit interface summary as we saw in the previous sections, the two proposed transmit interfaces offer different tradeoffs between transmit return loss, pulse template and power consumption performance. therefore, the right interface for a given application is going to depend on which of these parameters is the most critical for the design. table 1 summarizes the performance characteristics of both interfaces. figure 17. t1 twisted pair, tx return loss figure 18. e1 twisted pair, tx return loss lxt38x etsi lxt38x etsi
LXT384/6/8 twisted pair interface ? without component changes application note 17 4.2.1 receive interface as we saw in the standard receive interface description, the receive termination resistors r r are usually modified to match different line impedances. while this practice yields optimum receive return loss performance, it is not necessary to exactly match the line impedance in order to meet the receive return loss requirements with a comfortable margin. the receive interface we are about to propose takes advantage of this fact. since the t1 and e1 twisted pair characteristic impedances (100 ? and 120 ? ) are relatively close, we can use a compromise 110 ? equivalent impedance to terminate both interfaces. please refer to figure 19 . the reflected impedance z is: z = r 2 (2 r r ) = 2 2 x (2 x 13.7) = 109.6 ? with this termination impedance, we can easily meet g.703 receive return loss requirements as shown in figure 20 . on the other hand, the t1 receive return loss is still well above 20 db in the same frequency range. note that these measurements also take into account the capacitive loading effect of the protection sidactor. figure 19. t1/e1 receive interface 1k ? 1k ? 0.22uf 13.7 ? 13.7 ? 1:2 s553-6500-55 bel-fuse p0640sa teccor rtip rring LXT384/6/8
LXT384/6/8 twisted pair interface ? without component changes 18 application note figure 20. e1 twisted pair, tx return loss table 1. transmit interface performance summary per channel i tvcc max. 1,2 tx return loss typ. t1 e1 t1 f = 772 khz e1 f = 1024 khz high return loss option figure 2 62 ma 34 ma 21 db 16 db low power option figure 5 51 ma 27 ma 14 db 11 db 1. add total i vcc for total power consumption calculations. 2. tvcc = 5v +/- 5% lxt, t1 g.703 lxt, e1
LXT384/6/8 twisted pair interface ? without component changes application note 19 5.0 conclusions the previous sections we proposed simple solutions for t1/e1 twisted pair operation without component changes using the lxt38x series of 3.3v t1/e1 lius. these devices offer the flexibility to support different tradeoffs between power consumption and transmission performance. as a result, the designer can choose the interface circuit that better suits his requirements while meeting the applicable standards with a comfortable margin.

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