MTL013 single-chip sxga lcd controller sales@myson.com.tw www.myson.com.tw rev. 0.9 april 2003 page 1 of 110 myson century, inc. taiwan: no. 2, industry east rd. iii, science-based industrial park, hsin-chu, taiwan tel: 886-3-5784866 fax: 886-3-5784349 usa: 4020 moorpark avenue suite 115 san jose, ca, 95117 tel: 408-243-8388 fax: 408-243-3188 general description the MTL013 single-chip sxga lcd controller is a low-cost input format converter for tft-lcd monitor or lcd tv application which accepts 15-pin d-sub rgb graphic signals, yuv signals from digital video decoder or digital rgb graphic signals from panellink tmds receiver. it includes a rgb/yuv input processor, video scaling up and down processor, osd input interface and output display processor programmable timing controller in 208-pin pqfp package. features general auto configuration of sampling clock frequency, phase, h/v center, as well as white balance. auto detection of present or non-present or over range sync signals and their polarities. composite sync separation and odd/even field detection of interlaced video. no external memory required. on-chip output pll provide clock frequency fine- tune (inverse, duty cycle and delay). serial 2-wire i 2 c host interface. parallel 6-wire or 10-wire data transfer host interface. embedded osd engine. embedded 8-bit resolution adc. embedded programmable timing controller. embedded power on reset circuit. 2.5v/3.3v supplier in 208-pin pqfp package. input processor adc sample rate and digital single rgb (24-bit) input rates up to 135mhz. support both non-interlaced and interlaced rgb graphic input signals. support sync on green input format. yuv 4:2:2 or yuv 4:1:1 (ccir601/ccir656) interlaced video input. glue-less connection to philips saa711x digital video decoder built-in yuv to rgb color space converter. compliant with digital lvds/panellink tmds input interface. pc input resolution up to sxga 1280x1024 @ 75hz. video processor independent programmable horizontal and vertical scaling up ratios from 1 to 32 support scaling down ratios from 1 to 1/2. flexible de-interlacing unit for digital yuv video input data. zoom to full screen resolution of de-interlaced yuv video data stream. built-in programmable gain control for white balance alignments. built-in programmable 10-bit gamma correction table. built-in programmable temporal color dithering built-in programmable interpolation look-up table. built-in programmable sharpening & smoothing filters for edge enhancement. support smooth panning under viewing window change. output processor single pixel (18/24-bit) or dual pixel (36/48-bit) per clock digital rgb output. built-in output timing generator with programmable clock and h/v sync. support vga/svga/xga/sxga display resolution. overlay input interface with external osd controller. double scan capability for interlaced input.
MTL013 page 2 of 110 block diagram applications yuv input rgb input auto calibration yuv to rgb zoom buffer mode detect host interface to i2c bus scale up sharpness smooth dithering gamma correct gain control osd & output mux display timing generator to external osd tcon rgb output digital video digital rgb adc analog rgb MTL013 fpd monitor controller MTL013 fpd monitor controller tft-lcd flat panel mtv230 mcu+osd digital video decoder lvds/panellink tmds receiver composite/ s-video d-sub rgb graphic signals
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