1. abstract the sd2923, which utilizes a double-diffused metal oxide (dmos) semiconductor technology, is the latest addition to stmicroelectronics' rf power mosfet family; the packaged version is shown in figure 1. the sd2923 is a single-ended, 50 volt, 300w, gold (au) metallized, n-channel, vertical mosfet, intended for use up to 150 mhz, with exceptionally high gain, and enhanced thermal packaging which makes it ideal for various applications including plasma generation, excitation and fm broadcast applications. the unique design of this single-ended 300 watt mosfet, makes it the only one of its class available on the market today. 2. device assembly. the sd2923 discrete component design consists of two 40 cell, n-channel, enhancement mode dmos transistor dice eutectically mounted in a parallel configuration (see figure 2). each cell consists of 60, 127m gate fingers, yielding a source periphery of 1220mm allowing a maximum drain current of 40 amperes. the transistor dice are separated by a metallized gate rail on which two, thin film, au metallized resistors are eutectically mounted. for improved current capability and lower inductance, the components are connected to each other and to the package by au wire with a diameter of 2 mils (50 m). since the dice and package utilize gold metallization and the bonding wires are also gold, reliability issues pertaining to the contact of dissimilar metals between wire, package, and die are eliminated. the package is sealed with a ceramic lid ensuring the complete integrity of the wires and silicon die and also preventing any foreign objects from entering the package which could ultimately cause device reliability problems. figure 1. sd2923 package march 2000 1/5 AN1256 application note high-power rf mosfet targets vhf applications by jim davies and brett hanson figure 2. two enhancement-mode dmos mounted in parallel
AN1256 - application note 2/5 3. device characteristics. the sd2923 has a very high transconductance. the transconductance (gfs) denotes the dc gain of a mosfet. it is defined as the ratio of the infinitesimal change in drain current corresponding to the infinitesimal change in gate voltage at a specified current level and drain bias. it is important to measure the gfs in the device's region of operation where the gfs is independent of the drain bias (vds). the gfs of the sd2923 measured at a drain-source voltage of 10 volts and a corresponding drain current of 10 amps, is typically 13 siemens. impedance data across a range of frequencies may be the most important information an amplifier designer needs. without it, the rf performance may not come close to the published values found in the datasheet. with properly measured data, and sound impedance matching techniques, many frustrating hours of circuit design iterations can be saved. for this reason, the following impedances were measured to help in the design of amplifiers for the hf, fm broadcast, and plasma generation markets as shown in table 1. one important item to note is the relatively small change in input impedance from 30 mhz to 150 mhz. this can be attributed to the series gate resistors which presents a real impedance at the input across the full band of frequencies. matching is easily accomplished by using transmission line transformers and lumped elements commonly found in many amplifiers the sd2923 was characterized in a common source mode at 30 mhz with a circuit optimized for best return loss and maximum power delivered to the load with a typical gain and efficiency of 22 db and 55% respectively, as shown in figure 3 the junction to case thermal resistance (rth-jc) was measured under rf operating conditions using infrared techniques to be 0.27 c/w allowing for a maximum power dissipation of approximately 650 watts (see figure 4). additionally, data was taken at 150 mhz demonstrating the gain and efficiency at the upper limits of the device characterization (see figure 5). frequency (mhz) z in ( w )z dl ( w ) 30 1.8-j0.2 2.8+j2.3 108 1.9+j0.2 1.6+j1.4 150 1.9+j0.3 1.5+j1.6 50 100 150 200 250 300 350 400 450 pout, output power (w) 19 20 21 22 23 power gain (db) 30 40 50 60 70 efficiency (%) power gain and efficiency vs output power tc = 25c f = 30 mhz vdd = 50 v idq = 250 ma figure 3. power gain and efficiency vs. output power table 1. impedance data for the design of amplifiers
AN1256 - application note 3/5 4. device ruggedness. the sd2923 is very rugged. most dmos failures during operating conditions are due to the inability to support the effective drain voltage across the body-drain pn junction during an over voltage condition when, for example, a mismatched load causes a large voltage standing wave on the drain terminal. if the device is subjected to an excessive drain to source voltage the electric field across this junction will reach a critical value at which point avalanche current will be generated. under these conditions, current flows from the source to the body, effectively biasing the internal parasitic bipolar transistor to an on state, creating a catastrophic failure very quickly. the voltage required to turn on the parasitic transistor has a negative temperature coefficient, thus at higher operating temperatures this phenomena is more likely. it can be noted that some manufacturers of high power rf devices do not specify a load mismatch, but the sd2923 is guaranteed to sustain a 5:1 load mismatch across all phase angles with no degradation in output power when returned to 50 ohms. this load mismatch is comparable to devices with similar output power levels utilizing a push-pull package configuration. the ability of the sd2923 to handle such a severe mismatch can be attributed to two design improvements over similar devices. the first being a proprietary doping scheme of the transistor die during its fabrication process, which allows high current and voltage swings without inducing turn-on of the internal parasitic bipolar transistor, and the second enhancement is the lower thermal resistance of the packaging allowing for increased power dissipation of figure 4. maximum thermal resistance vs. case temperature 0 50 100 150 200 250 300 pout, output power (w) 7 7.5 8 8.5 9 9.5 10 power gain (db) 10 20 30 40 50 60 70 efficiency (%) gain & efficiency vs output power f = 150 mhz vdd = 50 v idq = 500 ma figure 5. power gain and efficiency vs. output power
AN1256 - application note 4/5 the device. these considerations result in a very high breakdown voltage minimum rating of 125 volts, with a normal distribution of 145 volts dc. 5. design considerations. designing the sd2923 offered two distinct challenges beyond the semiconductor device design; one was due to the high gain of the sd2923 in the hf frequency band, and the other was due to the high power dissipation of this single ended device. the gfs of this device is very high thus, stabilizing the transistor was extremely critical. without the use of any stabilization technique, the device would oscillate and destroy itself under bias conditions before the rf input was applied. to overcome potential instabilities, gate resistors were employed. these resistors, as mentioned before, are eutectically mounted inside the package along with the transistor die and are wired in series with each gate pad. this layout presents a series resistance to each gate site and thus any difference between the site to site impedances are small relative to the total. 6. mttf (mean time to failure) enhanced package. a major problem inherent to high power rf transistors is their high operating junction temperatures; if careful consideration is not taken to remove the heat generated by the junction, degradation in device performance and reduction in its operating lifetime will be the consequence. the design of the sd2923 has approached this problem by using a thermally enhanced package, labeled a non-pedestal (np) package, having lower thermal resistance than the widely used pedestal (p) packages. a finite-element analysis was performed on a similar np package and the results showed a 10 c lower peak temperature than the p package under the same thermal conditions. the sd2921-10 and a similar st device were then chosen to further demonstrate the enhanced thermal properties of the np package over the p package under normal operating conditions. these devices use the same transistor die and also share the same overall mechanical dimensioning. the major difference between the devices is the sd2921-10 is a np package and the other was a p package. both devices were operated under rf conditions and their corresponding die junction temperatures were measured using an infrared (ir) imaging unit. once again the results were in favor of the np package with a 25% improvement in thermal resistance which corresponds to a operating life improvement of approximately 400%. 50 75 100 125 150 175 200 junction temperature (c) 1e+4 1e+6 1e+8 1e+10 1e+12 mttf (hrs.) 8a 14a 4 0a figure 6. sd2923 mttf for various currents as a function of junction temerature
AN1256 - application note 5/5 electromigration is another temperature enhanced failure mechanism. electromigration failures are related to current density in the metallization as well as other metallization material properties. a graph of the sd2923 mean-time-to failure, for various currents as a function of junction temperature, based on the electromigration activation energy derived from arrhenius plots for the sd2923, is shown in figure 6. it can be seen that the typical lifetime is greater than 1 million hours. it should be noted that in comparison, the sd2923 is a larger device than the sd2921-10, but the overall structure of the sd2923 package and the sd2921-10 package are the same and both devices use the same transistor die. for a complete thermal analysis of the p vs. np packages, please refer to the april 1999 issue of microwaves & rf titled "novel package improves mosfet reliability". for complete documentation on the sd2923, a datasheet can be found on stmicroelectronics website, www.st.com. just follow the quick links to datasheets by going from products to technical literature, and then at the bottom of the page you will find radio frequency & power rf where the mosfet transistors link resides. information furnished is believed to be accurate and reliable. however, stmicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of stmicroelectronics. specification mentioned in this publication are subject to change without notice. this publication supersedes and replaces all information previously supplied. stmicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of stmicroelectronics. the st logo is a trademark of stmicroelectronics ? 2000 stmicroelectronics - printed in italy - all rights reserved stmicroelectronics group of companies australia - brazil - china - finland - france - germany - hong kong - india - italy - japan - malaysia - malta - morocco - singapore - spain - sweden - switzerland - united kingdom - u.s.a. http://www.st.com
|
