ASM811, asm812 alliance semiconductor 2575 augustine drive . santa clara, ca 95054 . tel: 408.855.4900 . fax: 408.855.4999 . www.alsc.com notice: the information in this document is subject to change without notice october 2003 rev 1.0 4 pin p voltage supervis or with manual reset general description the ASM811/asm812 are cost effective low power supervisors designed to monitor voltage levels of 3.0v, 3.3v and 5.0v power supplies in low-power microprocessor (p), microcontroller (c) and digital systems. they provide excellent reliability by eliminating external components and adjustments. a reset signal is issued if the power supply voltage drops below a preset reset threshold and is asserted for at least 140ms after the supply has risen above t he reset threshold. the ASM811 has an active-low output reset that is guaranteed to be in the correct state for v cc down to 1.1v. the asm812 has an active- high reset output. the reset comparator is designed to ignore fast transients on v cc . a debounced manual reset input allows the user to manually reset t he systems to bring them out of locked state. low power consumption makes the ASM811/asm812 ideal for use in portable and battery o perated equipment. the ASM811/ asm812 are available in a compact 4-pin sot-143 package and thus use minimal board space. six voltage thresholds are available to support 3v to 5v systems: features ? new 4.0v threshold option ? 9a supply current ? monitor 5v, 3.3v and 3v supplies ? manual reset input ? 140ms min. reset pulse width ? guaranteed over temperature ? active-low reset valid with 1.1v supply (ASM811) ? small 4-pin sot-143 package ? no external components ? power-supply transient-immune design reset threshold suffix voltage l4.63 m4.38 j4.00 t3.08 s2.93 r2.63 applications ? computers and controllers ? embedded controllers ? portable/battery operated systems ? intelligent instruments ? wireless communication systems ? pdas and handheld equipment ? automotive systems ? safety systems typical operating circuit v cc v cc v cc p reset input reset (reset) gnd gnd (reset) mr
2 of 10 notice: the information in this docum ent is subject to change without notice 4 pin p voltage superv isor with manual reset ASM811, asm812 october 2003 rev 1.0 pin diagram: block diagram pin description pin # pin name function ASM811 asm812 1 1 gnd ground. 2 - reset reset is asserted low if v cc falls below v th and remains low for t rst after v cc exceeds the threshold. in addition, reset is active low as long as the manual reset is low. -2reset reset is asserted high if v cc falls below v th and remains high for t rst after v cc exceeds the threshold. in addition, r eset is active high as long as the manual reset is low. 33mr manual reset input. a logic low on mr asserts reset. reset rema ins active as long as mr is low and for t mrst after mr returns high. the active low input has an internal 20k ? pull-up resistor. the input should be left open if not used. it can be driven by ttl or cmos logic or shorted to ground by a switch. 44 v cc power supply input voltage (3.0v, 3.3v, 5.0v) detailed description a proper reset input enables a microprocessor / microcontroller to start in a known state. ASM811/812 assert reset to prevent code executio n errors during power-up, power- down and brown-out conditions. reset timing the reset signal is asserted- low for the ASM811 and high for the asm812- when the v cc supply voltage falls below the threshold trip voltage and remains asserted for 140ms minimum after the v cc has risen above the threshold. manual reset (mr ) input a logic low on mr assserts reset low on the ASM811 and reset high on the asm812. mr is internally pulled high through a 20k ? resistor and can be driven by ttl/cmos gates or with open collector/drain outputs. mr can be left open if not used. mr may be connected to ground through a normally- open momentary switch without an external debounce circuit. a 0.1f capacitor from mr to ground can be added for additional noise immunity. 1 2 3 sot143 ASM811 (asm812) gnd reset v cc (reset) 4 mr + - reset generator - + v cc reset (reset) gnd ASM811 (asm812) 4.38v 4.00v 3.08v 2.93v 2.63v 4.38v 4.63v mr 20k ? v cc
3 of 10 notice: the information in this docum ent is subject to change without notice ASM811, asm812 4 pin p voltage supervis or with manual reset october 2003 rev 1.0 reset output operation in p / c systems it is important to have the processor and the system begin operation from a known state. a reset output to a processor is pr ovided to prevent improper operation during power supply sequencing or low voltage brown-out conditions. the ASM811/812 are designed to monitor the system power supply voltages and issue a reset signal when the levels are out of range. reset outputs are guaranteed to be active for v cc above 1.1v. when v cc exceeds the reset threshold, an internal timer keeps reset active for the reset timeout period, after which reset beco mes inactive (high for the ASM811 and low for the asm812). if v cc drops below the reset threshold, reset auto matically becomes active. alternatively, external circuitry or an operator can initiate this condition using the manual reset (mr ) pin. mr can be left open if it is not used. mr can be driven by ttl/cmos logic or even an external switch. valid reset with v cc under 1.1v to ensure logic inputs connected to the ASM811 reset pin are in a known state when v cc is under 1.1v, a 100k ? pull- down resistor at reset is needed. the value is not critical. a 100k ? pull-up resistor to v cc is needed with the asm812. application information negative vcc transients typically short duration transients of 100mv amplitude and 20s duration do no t cause a false reset . a 0.1f capacitor at v cc increses transient immunity. bidirectional reset pin interfacing the ASM811/812 can interface with p / c bi-directional reset pins by connecting a 4.7k ? resistor in series with the ASM811/812 reset output and the p/c bi-directional reset input pin. power supply buf buffered reset v cc ASM811 gnd gnd reset reset input c or p 4.7k ? bi-directional i/o pin figure 4: bi-directional reset pin interface mr v cc power supply ASM811 reset gnd 100k ? v cc power supply asm812 reset gnd mr mr 100k ? 0v 5v v cc v th t rst t mrst 5v 0v 5v 0v 5v 0v mr reset reset ASM811 asm812 figure 1: reset timing and manual reset (mr ) figures 2 & 3: reset valid with v cc under 1.1v
ASM811, asm812 4 of 10 notice: the information in this docum ent is subject to change without notice 4 pin p voltage superv isor with manual reset october 2003 rev 1.0 absolute maximum ratings, table 1: absolute maximum ratings, table 2: parameter min max units pin terminal voltage with respect to ground v cc -0.3 6.0 v reset, reset and mr -0.3 v cc + 0.3 v input current at v cc and mr 20 ma output current: reset, reset 20 ma rate of rise at v cc 100 v/s note: these are stress ratings only and the functional operation is not implied. exposure to absolute maximum ratings for prolonged time periods may affect device reliability. parameter min max units power dissipation (t a = 70c) derate sot-143 4mw/c above 70c 320 uw operating temperature range -40 105 c storage temperature range -65 160 c lead temperature (soldering, 10 sec) 300 c note: these are stress ratings only and the function al operation is not impl ied. exposure to absolute maximum ratings for prolonged time periods may affect device reliability.
ASM811, asm812 5 of 10 notice: the information in this docum ent is subject to change without notice 4 pin p voltage superv isor with manual reset october 2003 rev 1.0 electrical characteristics: unless otherwise noted, v cc is over the full voltage range, t a = -40c to 105c. typical values at t a = 25c, v cc = 5v for l/m/j devices, v cc = 3.3v for t/s devices and v cc = 3v for r devices. symbol parameter conditions min typ max unit v cc input voltage range t a = 0c to 70c t a = -40c to 105c 1.1 1.2 5.5 5.5 v v i cc supply current (unloaded) t a = -40c to 85c t a = -40c to 85c t a = 85c to 105c t a = 85c to 105c v cc < 5.5v, l/m/j v cc < 3.6v, r/s/t v cc < 5.5v, l/m/j v cc < 3.6v, r/s/t 9 6.8 15 10 25 20 a v th reset threshold l devices t a = 25c t a = -40c to 85c t a = 85c to 105c 4.56 4.50 4.40 4.63 4.70 4.75 4.86 v m devices t a = 25c t a = -40c to 85c t a = 85c to 105c 4.31 4.25 4.16 4.38 4.45 4.50 4.56 j devices t a = 25c t a = -40c to 85c t a = 85c to 105c 3.93 3.89 3.80 4.00 4.06 4.10 4.20 t devices t a = 25c t a = -40c to 85c t a = 85c to 105c 3.04 3.00 2.92 3.08 3.11 3.15 3.23 s devices t a = 25c t a = -40c to 85c t a = 85c to 105c 2.89 2.85 2.78 2.93 2.96 3.00 3.08 r devices t a = 25c t a = -40c to 85c t a = 85c to 105c 2.59 2.55 2.50 2.63 2.66 2.70 2.76 tc vth reset threshold temp. coefficient 30 ppm/c v cc to reset delay v cc = v th to (v th - 125mv), 60 s reset active timeout period t a = 0c to 70c 140 100 240 560 840 ms t a = -40c to 105c t mr mr minimum pulse width 10 s notes: 1. production testing done at ta = 25c. over-temperature specif ications guaranteed by design only using six sigma design limit s. 2. reset output is active low for the ASM811 and reset output is active high for the asm812. 3. glitches of 100ns or less typically will not generate a reset pulse.
ASM811, asm812 6 of 10 notice: the information in this docum ent is subject to change without notice 4 pin p voltage superv isor with manual reset october 2003 rev 1.0 mr glitch immunity note 3 100 ns t md mr to reset propogation delay note 2 0.5 s v ih mr input threshold v cc > v th (max), ASM811/812l/m/j 2.3 v v il 0.8 v ih mr input threshold v cc > v th (max), ASM811/812r/s/t 0.77v cc v v il 0.25v cc mr pullup resistance 10 20 30 k ? v ol low reset output voltage (ASM811) v cc = v th min., i sink = 1.2ma, ASM811r/s/t 0.3 0.4 0.3 v v cc = v th min., i sink = 3.2ma, ASM811l/m/j v cc > 1.1v, i sink = 50a v oh high reset output voltage (ASM811) v cc > v th max., i source = 500a, ASM811r/s/t 0.8v cc v cc - 1.5 v v cc > v th max., i source = 800a, ASM811l/m/j v ol low reset output voltage (asm812) v cc = v th max., i sink = 1.2ma, asm812r/s/t 0.3 0.4 v v cc = v th max., i sink = 3.2ma, asm812l/m/j v oh high reset output voltage (asm812) 1.8v < v cc < v th min., i source = 150a 0.8v cc v t rst active reset timeout period v cc > v th 140 240 msec t mrst manual active reset time- out period mr returns high 180 msec symbol parameter conditions min typ max unit notes: 1. production testing done at ta = 25c. over-temperature specif ications guaranteed by design only using six sigma design limit s. 2. reset output is active low for the ASM811 and reset output is active high for the asm812. 3. glitches of 100ns or less typically will not generate a reset pulse.
ASM811, asm812 7 of 10 notice: the information in this docum ent is subject to change without notice 4 pin p voltage superv isor with manual reset october 2003 rev 1.0 typical operating characteristics unless otherwise noted, v cc is over the full voltage range, t a = -40c to 105c. typical values at t a = 25c, v cc = 5v for l/m/j devices, v cc = 3.3v for t/s devices and v cc = 3v for r devices. normalised reset threshold vs temperature 0.95 0.96 0.97 0.98 0.99 1 1.01 1.02 -40 -20 0 20 40 60 80 100 125 temperature (c) normalised reset threshold reset timeout period vs temperature 0 50 100 150 200 250 300 350 400 -40 -20 0 20 40 60 80 100 125 temperature (c) reset timeout period (ms) ASM811t ASM811r ASM811t ASM811r supply current vs temperature 0 2 4 6 8 10 -40 -20 0 20 40 60 80 100 125 temperature (c) supply current (a) ASM811r ASM811t
ASM811, asm812 8 of 10 notice: the information in this docum ent is subject to change without notice 4 pin p voltage superv isor with manual reset october 2003 rev 1.0 package dimensions: plastic sot-143 (4-pin) inches millimeters min max min max a 0.031 0.047 0.787 1.194 a1 0.001 0.005 0.025 0.127 b 0.014 0.022 0.356 0.559 b1 0.030 0.038 0.762 0.965 c 0.0034 0.006 0.086 0.152 d 0.105 0.120 2.667 3.048 e 0.047 0.055 1.194 1.397 e 0.070 0.080 1.778 2.032 e1 0.071 0.079 1.803 2.007 h 0.082 0.098 2.083 2.489 l 0.004 0.012 0.102 0.305 e h e d a a1 e c l a = 0 -8 b e1 b1
ASM811, asm812 9 of 10 notice: the information in this docum ent is subject to change without notice 4 pin p voltage superv isor with manual reset october 2003 rev 1.0 ordering information: related products: part number 1 reset threshold (v) temperature range pin-package package marking (xx lot code) ASM811 active low reset ASM811leus-t 4.63 -40c to +105c 4-sot143 smxx ASM811meus-t 4.38 -40c to +105c 4-sot143 snxx ASM811jeus-t 4.00 -40c to +105c 4-sot143 soxx ASM811teus-t 3.08 -40c to +105c 4-sot143 spxx ASM811seus-t 2.93 -40c to +105c 4-sot143 sqxx ASM811reus-t 2.63 -40c to +105c 4-sot143 srxx asm812 active high reset asm812leus-t 4.63 -40c to +105c 4-sot143 ssxx asm812meus-t 4.38 -40c to +105c 4-sot143 stxx asm812jeus-t 4.00 -40c to +105c 4-sot143 suxx asm812teus-t 3.08 -40c to +105c 4-sot143 svxx asm812seus-t 2.93 -40c to +105c 4-sot143 swxx asm812reus-t 2.63 -40c to +105c 4-sot143 sxxx notes: 1. tape and reel packaging is indicated by the -t designation. asm809 asm810 ASM811 asm812 max supply current 15a 15a 15a 15a package pins 3 3 4 4 manual reset input ? ? package type sot - 23 sot - 23 sot - 143 sot - 143 active-high reset output ? ? active-low reset output ? ?
alliance semiconductor corporation 2575, augustine drive, santa clara, ca 95054 tel: 408 - 855 - 4900 fax: 408 - 855 - 4999 www.alsc.com copyright ? alliance semiconductor all rights reserved part number: ASM811, asm812 document version: v 1.0 ? copyright 2003 alliance semiconductor corporation. all rights reserved. our three-point logo, our name and intelliwatt are tr ademarks or registered trademarks of alliance. all other brand and product names may be the trademarks of their respective companies. allia nce reserves the right to make changes to this document and its products at any time without notice. alliance assumes no responsibility for any errors that may appear in this document. the data contained herein represents al liance's best data and/or estimates at the time of issuance. al liance reserves the right to change or correct this data at any time, without notice. if the product described herein is under development, signifi cant change s to these specifications are possible. the information in this product data sheet is intended to be general descriptive information for p otential customers and users, and is not intended to operate as, or provide, any guarantee or warrantee to any user or customer. alliance does not ass ume any responsibility or liability arising out of the application or use of any prod uct described herein, and disclaims any express or implied warran ties related to the sale and/or use of alliance products including liability or warrant ies related to fitness for a particular purpose, merchantability, or infringement of any intellectual property rights, except as express agreed to in al liance's terms and conditions of sale (which are available from alliance). all sales of alliance products are made exclusively accord ing to alliance's terms and conditions of sale. the purchase of products from alli ance does not convey a license under any patent rights, copyrights; mask work s rights, trademarks, or any other intellectual property rights of alliance or third parties. alliance does not authorize its products for use as crit ical components in life-supporti ng systems where a malfunction or failure may reasonably be expected to result in sign ificant injury to the user, and the inclusio n of alliance products in such life-support ing systems implies that the manufacturer assumes all risk of such use and agrees to indemnify alliance against all claims arising from such use. ASM811, asm812
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