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  rev 1 november 2005 1/13 13 vn540-e / vn540sp-e VN540-12-E single high side smart power solid state relay general features output current (continuous) : 2.8a digital input clamped at 32v protection against: ? loss of ground ? shorted load and over- temperature built-in current limiter undervoltage shut-down open drain diagnostic output fast demagnetization of inductive loads description the vn540-e, vn540sp-e, VN540-12-E are monolithic devices designed in stmicroelectronics vipower technology, intended for driving resistive or inductive loads with one side connected to ground. active current limitation avoids the system power supply dropping in case of shorted load. built-in thermal shut-down protects the chip from overtemperature. the open drain diagnostic output indicates over- temperature conditions. type v demag r dson i out v cc vn540-e vn540sp-e VN540-12-E v cc -55v 50m ? 2.8a 36v pentawatt(012y ) pentawatt powerso-10 tm www.st.com block diagram
vn540-e / vn540sp-e / VN540-12-E 2/13 table 1. absolute maximum rating figure 1. connection diagram (top view) figure 2. current and voltage conventions symbol parameter value unit v cc power supply voltage 45 v -v cc reverse supply voltage -4.0 v i out maximum dc load current internally limited a i r reverse output current -10 a i in input current 10 ma i stat status pin current 10 ma v esd electrostatic discharge (r = 1.5kw; c = 100pf) 2000 v p tot power dissipation at t c = 25c internally limited w t j junction operating temperature internally limited c t stg storage temperature -55 to 150 c e as single pulse avalanche energy 500
vn540-e / vn540sp-e / VN540-12-E 3/13 table 2. thermal data electrical chracteristics (10v < v cc < 36v; -25c < t j < 85c; unless otherwise specified) table 3. power section table 4. switching symbol parameter value unit powerso-10 pentawatt r thjc thermal resistance junction-case max 1.5 2.0 c/w r thja thermal resistance junction-ambient max 50 60 c/w symbol parameter test conditions min. typ. max. unit v cc supply voltage 10 36 v r on on state resistance i out = 2.8a; t j = 25c i out = 2.8a; 50 90 m ? m ? i s supply current off state on state; t j = 125c i out = 0a 1 3 ma ma i ls output leakage current channel off v cc = 45v 100 ? i lgnd output current at turn-off v cc = v in = v gnd = v stat = 24v t j = - 25c < t j < 100c 2ma v ol low state output voltage v in = v il; r load >= 10m ? 1.5 v v demag output voltage at turn-off i out = 2.8a; l load >= 1mh v cc -65 v cc -55 v cc -45 v symbol parameter test conditions min. typ. max. unit t d(on) turn-on delay on output current i out = 2.8a, resistive load input rise time < 0.1 s, v cc = 24v; t j = 25c 40 s t r rise time of output current i out = 2.8a, resistive load input rise time < 0.1 s, v cc = 24v; t j = 25c 60 s t d(off) turn-off delay time of output current i out = 2.8a, resistive load input rise time < 0.1 s, v cc = 24v; t j = 25c 60 s t f fall time of output current i out = 2.8a, resistive load input rise time < 0.1 s, v cc = 24v; t j = 25c 25 s di/dt (on) turn-on current average slope i out = 2.8a, i out = i lim ; 25c < t j < 140c 0.5 2 / s di/dt (off) turn-off current average slope i out = 2.8a, i out = i lim ; 25c < t j < 140c 2 4 / s
vn540-e / vn540sp-e / VN540-12-E 4/13 table 5. logical input note: 1 the input voltage is internally clamped at 32v minimum, it is possible to connect the input pins to an higher voltage via an external resistor calculate to not exeed 10ma table 6. protection and diagnostic (*)status determination > 100ms after the switching edge. figure 3. switching characteristics symbol parameter test conditions min. typ. max. unit v il input low level voltage 2.0 v v ih input high level voltage 3.5 v v i(hyst) input hysteresis voltage 0.5 v i in input current v in = 30v v in = 2.0v 25 300 ? ? v icl i/o input clamp voltage note 1 i in = 1ma i in = -1ma 32 36 -0.7 v v symbol parameter test conditions min. typ. max. unit v stat status output voltage i stat = 5ma ( fault condition ) 1v v scl(*) status clamp voltage i stat = 1ma i stat = -1ma 32 36 -0.7 v v i stat leakage on diagnostic pin in high state v stat = 5v 10 ? v usd undervoltage shut down 5.0 8.0 v i lim dc short circuit current v cc = 24v; r load < 10m ? 2.8 5.0 8.0 a i ovpk peak short circuit current v cc = 24v; v in = 30; r load < 10m ? 4a t sc delay time of current limiter 100 s t tsd thermal shut down temperature 150 170 c t r thermal reset temperature 135 155 c
vn540-e / vn540sp-e / VN540-12-E 5/13 table 7. truth table figure 4. peak short test circuit input output status normal operation l h l h h h overtemperature l h l l h l undervoltage l h l l h h shorted load ( current limitation ) l h l h h h
vn540-e / vn540sp-e / VN540-12-E 6/13 figure 5. switching waveforms figure 6. i lgnd test configuration in
vn540-e / vn540sp-e / VN540-12-E 7/13 package mechanical data in order to meet environmental requirements, st offers these devices in ecopack ? packages. these packages have a lead-free second level interconnect. the category of second level interconnect is marked on the package and on the inner box label, in compliance with jedec standard jesd97. the maximum ratings related to soldering conditions are also marked on the inner box label. ecopack is an st trademark. ecopack specifications are available at: www.st.com .
vn540-e / vn540sp-e / VN540-12-E 8/13
vn540-e / vn540sp-e / VN540-12-E 9/13
vn540-e / vn540sp-e / VN540-12-E 10/13
vn540-e / vn540sp-e / VN540-12-E 11/13 table 8. order codes package tube tape and reel powerso-10 tm vn540sp-e vn540sptr-e pentawatt vertical vn540-e pentawatt straight VN540-12-E
vn540-e / vn540sp-e / VN540-12-E 12/13 table 9. revision history date revision changes 2-nov-2005 1 initial release
vn540-e / vn540sp-e / VN540-12-E 13/13 i nformation furnished is believed to be accurate and reliable. however, stmicroelectronics assumes no responsibility for the con sequence s o f use of such information nor for any infringement of patents or other rights of third parties which may result from its use. n o license is grante d b y implication or otherwise under any patent or patent rights of stmicroelectronics. specifications mentioned in this publicatio n are subje ct t o change without notice. this publication supersedes and replaces all information previously supplied. stmicroelectronics produ cts are n ot a uthorized for use as critical components in life support devices or systems without express written approval of stmicroelectron ics. the st logo is a registered trademark of stmicroelectronics. all other names are the property of their respective owners ? 2005 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - belgium - brazil - canada - china - czech republic - finland - france - germany - hong kong - india - israel - ital y - japan - malaysia - malta - morocco - singapore - spain - sweden - switzerland - united kingdom - united states of america www.st.com


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