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LG Semicon Co.,Ltd.
Description
The GM76C8128CL/CLL-W is a 1,048,576 bits static random access memory organized as 131,072 words by 8 bits. Using a 0.6um advanced CMOS technology and operated from a single 2.7V to 5.5V supply. Advanced circuit technique provide both high speed and low power consumption. The device is placed in a low power standby mode with /CS1 high or CS2 low and the output enable (/OE) allows fast memory access. Thus it is suitable for high speed and low power applications, especially where battery back-up is required.
GM76C8128CL/CLL-W
131,072 WORDS x 8 BIT
CMOS STATIC RAM Pin Configuration
NC A16 A14 A12 A7 A6 A5 A4 A3 A2 A1 A0 I/O0 I/O1 I/O2 VSS
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17
VCC A15 CS2 /WE A13 A8 A9 A11 /OE A10 /CS1 I/O7 I/O6 I/O5 I/O4 I/O3
Features
* Fast Speed : 55/70ns at Vcc=5V+/-10% 120/150ns at Vcc=3V+/-10% * Low Power Standby and Low Power Operation -Standby : 0.11mW Max. at Vcc=5V+/-10% 49.5uW Max. at Vcc=3V+/-10% -Operation : 385mW Max. at Vcc=5V+/-10% .com 66mW Max. at Vcc=3V+/-10% * Completely Static RAM : No Clock or Timing Strobe Required * Equal Access and Cycle Time * TTL compatible inputs and outputs * Capability of Battery Back-up Operation * Single +2.7V ~ +5.5V Operation A0 * Standard 32 DIP, SOP and TSOP I A1
A2
DataShee
(Top View) Block Diagram
........
Address Buffer
10
1024 MEMORY CELL ARRAY X 1024 x 128 x 8 Decoder (128K x 8)
Pin Description
Pin A0-A16 /WE /CS1, CS2 /OE I/O0-I/O7 VCC VSS NC Function Address Inputs Write Enable Input Chip Select Input Output Enable Input Data Inputs/Outputs
/OE /CS1 CS2 A14 A15 A16
128 x 8 7 Y Decorder 128
Column Select
/CS1, CS2 Chip Control
8
/OE, /WE Chip Control
Power Supply (2.7V~5.5V) Ground
I/O Buffer
/WE
I/O0
I/O1
I/O2
I/O3
I/O4
I/O5
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I/O6
121
I/O7
No Connection
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GM76C8128CL/CLL-W
Absolute Maximum Ratings*
Symbol TA TSTG TSOL VCC VIN VI/O PD Parameter
Ambient Temperature under Bias Storage Temperature Soldering Temperature and Time Supply Voltage Input Voltage Input and Output Voltage Power Dissipation
Rating
0 ~ 70 -55 ~ 150 260, 10 (at lead) -0.3 ~ 7.0 -0.3 ~ 7.0 -0.5 ~ VCC + 0.5 1.0
Unit
C C C, S V V V W
*: Stresses greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
Recommended DC Operating Conditions (TA = 0 ~ 70C)
Vcc = 5V +/- 10% Symbol VCC Parameter Min
Supply Voltage Input High Voltage Input Low Voltage 4.5
Vcc = 2.7 ~ 5.5V Unit Min
2.7 2.2 -0.3*
Typ
5.0
Max
5.5
Typ
3.0 -
Max
5.5 VCC + 0.3 0.4 V V V
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VIH VIL
2.2.com0.3 VCC + -0.3* 0.8
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*Note :VIL(min) = -3.0V for <= 10ns pulse
Truth Table
/CS1
L L L H X
CS2
H H H X L
/OE
L X H X X
/WE
H L H X X
A0 to A16
Stable Stable Stable -
DATA I/O
Output Data Input Data Hi-Z Hi-Z Hi-Z
MODE
Read Write Output Disable Standby
*Note: X means don't care
Capacitance (f = 1MHZ, TA = 25C)
Symbol
CIN CI/O
Parameter
Input Capacitance Output Capacitance
Test Conditions
VI = 0V VO = 0V
Min
-
Max
6 8
Unit
pF pF
*Note: This parameter is sampled and not 100% tested. 122
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GM76C8128CL/CLL-W
DC Operating Characteristics (VCC = 3V+/-10%, TA = 0 ~ 70C)
Symbol Parameter
Input Leakage Current Output Leakage Current High Level Output Voltage Low Level Output Voltage Operating Supply Current
Conditions
VIN = 0 to VCC /CS1 = VIH or CS2 = VIL /OE = VIH, VSS <=VOUT<=VCC IOH = -1.0mA IOL = 2.1mA /CS1 = VIL and CS2 = VIH VIN = VIH/VIL, IOUT = 0mA /CS1 = VIL and CS2 = VIH VIN = VIH/VIL IOUT = 0mA tcycle = Min, cycle
Min *Typ
-1 -1 2.2 -
Max
1 1 0.4 5
Unit
uA uA V V mA
II(L) IO(L) VOH VOL ICC ICC1
-
-
20
mA
Average Operating Current
ICC2
/CS1 = 0.2V, CS2 = VCC-0.2V VIN = VCC - 0.2V/0.2V IOUT = 0mA tcycle = 1us Standby Current (TTL) Standby Current (CMOS) /CS1 = VIH, CS2 = VIL /CS1 = VCC-0.2V .comL - Version CS2 = 0.2V LL - Version
-
-
5
mA
ICCS1
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-
-
0.5 50 15
mA uA
ICCS2
DataShee
*Typ. Values are measured at 25C
AC Operating Characteristics Test Conditions (VCC = 3V+/-10%, TA = 0 ~ 70C, unless otherwise noted.)
Parameter
Input Pulse Level Input Rise and Fall Time Input and Output Timing Reference Levels Output Load
Value
0.4V to 2.2V 5ns 1.5V CL = 100pF + 1TTL Load
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GM76C8128CL/CLL-W
AC Operating Characteristics (VCC = 3V+/-10%, TA = 0 ~ 70C) Read Cycle
GM76C8128C-55W GM76C8128C-70W
Symbol
Parameter
Min Max 120 120 120 55 40 40 40 Min 150 10 10 10 10 Max 150 150 150 60 45 45 45 Read Cycle Time Address Access Time Chip Select 1 Access Time Chip Select 2 Access Time Output Enable Access Time Chip Select 1 Output Setup Time Chip Select 1 Output Floating Chip Select 2 Output Setup Time Chip Select 2 Output Floating Output Enable Output Setup Time Output Enable Output Floating Output Hold Time 120 10 10 10 10
Unit
ns ns ns ns ns ns ns ns ns ns ns ns
tRC tAA tACS1 tACS2 tOE tCLZ1 tCHZ1 tCLZ2 tCHZ2 tOLZ tOHZ tOH
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Write Cycle
Symbol Parameter
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GM76C8128C-55W GM76C8128C-70W
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Unit
Min Max 40 Min 150 120 120 120 0 70 0 45 0 10 Max 50 ns ns ns ns ns ns ns ns ns ns ns 120 100 100 100 0 65 0 40 0 10
tWC tCW1 tCW2 tAW tAS tWP tWR tDW tDH tWHZ tOW
Write Cycle Time Chip Select Time 1 Chip Select Time 2 Address Enable Time Address Setup Time Write Pulse Width Address Hold Time Input Data Setup Time Input Data Hold Time Write to Output in High-Z Output Active from End of Write
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GM76C8128CL/CLL-W
DC Operating Characteristics (VCC = 5V+/-10%, TA = 0 ~ 70C)
Symbol Parameter
Input Leakage Current Output Leakage Current High Level Output Voltage Low Level Output Voltage Operating Supply Current
Conditions
VIN = 0 to VCC /CS1 = VIH or CS2 = VIL /OE = VIH, VSS <=VOUT<=VCC IOH = -1.0mA IOL = 2.1mA /CS1 = VIL and CS2 = VIH VIN = VIH/VIL, IOUT = 0mA /CS1 = VIL and CS2 = VIH VIN = VIH/VIL IOUT = 0mA tcycle = Min, cycle
Min *Typ
-1 -1 2.4 -
Max
1 1 0.4 15
Unit
uA uA V V mA
II(L) IO(L) VOH VOL ICC ICC1
-
-
70
mA
Average Operating Current
ICC2
/CS1 = 0.2V, CS2 = VCC-0.2V VIN = VCC - 0.2V/0.2V IOUT = 0mA tcycle = 1us Standby Current (TTL) Standby Current (CMOS) /CS1 = VIH, CS2 = VIL /CS1 = VCC-0.2V .comL - Version CS2 = 0.2V LL - Version
-
-
10
mA
ICCS1
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-
-
2 100 20
mA uA
ICCS2
DataShee
*Typ. Values are measured at 25C
AC Operating Characteristics Test Conditions (VCC = 5V+/-10%, TA = 0 ~ 70C, unless otherwise noted.)
Parameter
Input Pulse Level Input Rise and Fall Time Input and Output Timing Reference Levels Output Load
Value
0.6V to 2.4V 5ns 1.5V See below
Output Load (A)
+5V DOUT
990U 1.8KU
Output Load (B) (for tCHZ, tCLZ, tWHZ, tOW, tOLZ & tOHZ)
+5V DOUT
990U 1.8KU
100 U*
5 U*
125
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GM76C8128CL/CLL-W
AC Operating Characteristics (VCC = 5V+/-10%, TA = 0 ~ 70C) Read Cycle
GM76C8128C-55W GM76C8128C-70W
Symbol
Parameter
Min Max 55 55 55 30 20 20 20 Min 70 5 5 0 10 Max 70 70 70 35 25 25 25 Read Cycle Time Address Access Time Chip Select 1 Access Time Chip Select 2 Access Time Output Enable Access Time Chip Select 1 Output Setup Time Chip Select 1 Output Floating Chip Select 2 Output Setup Time Chip Select 2 Output Floating Output Enable Output Setup Time Output Enable Output Floating Output Hold Time 55 5 5 0 10
Unit
ns ns ns ns ns ns ns ns ns ns ns ns
tRC tAA tACS1 tACS2 tOE tCLZ1 tCHZ1 tCLZ2 tCHZ2 tOLZ tOHZ tOH
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Write Cycle
Symbol Parameter
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GM76C8128C-55W GM76C8128C-70W
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Unit
Min Max 20 Min 70 65 65 60 0 50 0 30 0 0 Max 25 ns ns ns ns ns ns ns ns ns ns ns 55 50 50 50 0 45 0 25 0 0
tWC tCW1 tCW2 tAW tAS tWP tWR tDW tDH tWHZ tOW
Write Cycle Time Chip Select Time 1 Chip Select Time 2 Address Enable Time Address Setup Time Write Pulse Width Address Hold Time Input Data Setup Time Input Data Hold Time Write to Output in High-Z Output Active from End of Write
126
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GM76C8128CL/CLL-W
Timing Waveforms Read Cycle (Note 1)
tRC
ADD
tAA tACS1
/CS1
tCLZ1 tACS2
CS2
tCHZ1
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tCLZ2 .com tOE tOLZ
/OE
DataShee
tCHZ2
tOHZ tOH
DOUT
High-Z
VALID DATA
127
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GM76C8128CL/CLL-W
Write Cycle (1) (/WE Controlled) (Notes 2, 3, 4)
tWC
ADD
tAS tWR tAW tWP
/WE
tCW1
/CS1
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tCW2
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CS2
tWHZ
DOUT
tOW
tDW
DIN
tDH
VALID DATA
128
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GM76C8128CL/CLL-W
Write Cycle (2) (/CS1 Controlled) (Notes 4)
tWC
ADD
tAS tWP
/WE
tWR
tCW1
/CS1
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tCW2
DataShee
CS2
tWHZ tCLZ
DOUT
tDW
DIN
tDH
VALID DATA
129
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GM76C8128CL/CLL-W
Write Cycle (3) (CS2 Controlled) (Notes 4)
tWC
ADD
tAS tWP
/WE
tWR
tCW2
CS2
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tCW1
DataShee
/CS1
tWHZ tCLZ
DOUT
tDW
DIN
tDH
VALID DATA
Notes: 1. /WE is High for Read Cycle. 2. Assuming that /CS1 Low transition or CS2 High transition occurs coincident with or after /WE Low transition. Outputs remain in a high impedance state. 3. Assuming that /CS1 High transition or CS2 Low transition occurs coincident with or prior to /WE High transition. Outputs remain in a high impedance state. 4. Assuming that /OE is high for write cycle. Outputs are in a high impedance state during this period. 130
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GM76C8128CL/CLL-W
Data Retention Characteristics
Symbol VCCR ICCR tCDR tR Parameter
Data Retention Supply Voltage Data Retention Current Chip Select to Data Retention Time Operation Recovery Time VCC=3.0V L - Version LL - Version
Min
2.0 0 tRC**
Typ
1 0.5 -
Max
5.5 50 15* -
Unit
V uA ns ns
* 3uA max at TA = 0 ~ 40C ** tRC = Read Cycle
* Low VCC Data Retention Mode: (1) /CS1 Controlled
tCDR
VCC 4.5V Data Retention Mode
tR
2.2V VCCR1 /CS1>= VCCR - 0.2V
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/CS1 0V
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DataShee
* Low VCC Data Retention Mode: (2) CS2 Controlled
tCDR
VCC 4.5V CS2 Data Retention Mode
tR
VCCR2 CS2 <= 0.2V 0.4V 0V
Notes: In Data Retention Mode, CS2 controls the Address, /WE, /CS1, /OE and DIN buffer. If CS2 controls data retention mode, VIN for these inputs can be in the high impedance state. If /CS1 controls the _ data retention mode, CS2 must satisfy either CS2 > VCCR - 0.2V or CS2<=0.2V. The other input levels (Address, /WE, /OE, I/O) can be in the high impedance state.
131
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GM76C8128CL/CLL-W Package Dimensions
32 DIP
1.645(41.78) MIN 1.665(42.29) MAX 0 ~ 15
o
Unit: Inches (mm)
0.600(15.24) MIN 0.625(15.88) MAX
0.045(1.14) MIN 0.055(1.40) MAX
0.008(0.200) MIN 0.015(0.380) MAX 0.15(3.81) TYP 0.165(4.191) MIN 0.190(4.83) MAX
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0.016(0.41) MIN 0.020(0.51) MAX
0.100(2.54) TYP
0.015(0.38) MIN
0.125(3.18) MIN 0.135(3.43) MAX
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0.02(0.53) MIN 0.04(1.04) MAX
0.600(15.240) TYP
0.540(13.72) TYP
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0~8
32 SOP
0.435(11.05) MIN 0.445(11.30) MAX
0.004(0.10) MIN 0.010(0.254) MAX 0.799(20.30) MIN 0.815(20.70) MAX
0.086(2.18) MIN 0.090(2.29) MAX
0.014(0.35) MIN 0.020(0.50) MAX
0.050(1.27) TYP
0.004(0.102) MIN 0.010(0.254) MAX
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0.55(14.05) MIN 0.57(14.40) MAX
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GM76C8128CL/CLL-W
32 TSOP I (8x20mm)
0.313(7.95) MIN 0.327(8.30) MAX
A11 A9 A8 A13 /WE CS2 A15 VCC N.C A16 A14 A12 A7 A6 A5 A4
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17
/OE A10 /CS1 I/O7 I/O6 I/O5 I/O4 I/O3 VSS I/O2 I/O1 I/O0 A0 A1 A2 A3
0.720(18.30) MIN 0.728(18.50) MAX
0.006(0.15) MIN 0.000(0.00) MAX
0.780(19.80) MIN 0.795(20.20) MAX 0.039(1.0) MIN 0.047(1.2) MAX 0.016(0.40) MIN 0.024(0.60) MAX
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0.006(0.15) MIN 0.010(0.25) MAX
0.020(0.50) TYP
133
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DataSheet 4 U .com

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