![]() |
|
If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
Datasheet File OCR Text: |
ACPL-M60L Small Outline, 5 Leads, High CMR, High Speed, Logic Gate Optocouplers Data Sheet Description The ACPL-M60L is an optically coupled gate that combines a GaAsP light emitting diode and an integrated high gain photo detector. The output of the detector IC is an open collector Schottky-clamped transistor. The internal shield provides a guaranteed common mode transient immunity specification of 15 kV/s at 3.3V operation. This unique design provides maximum AC and DC circuit isolation while achieving LVTTL/LVCMOS compatibility. The optocoupler AC and DC operational parameters are guaranteed from -40C to +85C, allowing trouble-free system performance. These optocouplers are suitable for high speed logic interfacing, input/output buffering, as line receivers in environments that conventional line receivers cannot tolerate and are recommended for use in extremely high ground or induced noise environments. Features * Dual Voltage Operation (3.3V/5V) * Low power consumption * 15 kV/s minimum Common Mode Rejection (CMR) at VCM = 1000 V (3.3V operating voltage) * High speed: 15 MBd typical * LVTTL/LVCMOS compatible * Low input current capability: 5 mA * Guaranteed AC and DC performance over temperature: -40C to +85C * Safety approvals; UL, CSA, IEC/EN/DIN EN 60747-5-2 * Surface mountable * Very small, low profile JEDEC Registered package outline Applications * Isolated line receiver * Computer-peripheral interfaces * Microprocessor system interfaces * Digital isolation for A/D, D/A conversion * Switching power supply * Instrument input/output isolation * Ground loop elimination * Pulse transformer replacement * Field buses Functional Diagram ANODE 1 6 VCC 5 VO CATHODE 3 4 GND CAUTION: It is advised that normal static precautions be taken in handling and assembly of this component to prevent damage and/or degradation which may be induced by ESD. Ordering Information ACPL-xxxx is UL Recognized with 3750 Vrms for 1 minute per UL1577 and is approved under CSA Component Acceptance Notice #5, File CA 88324. Option RoHS Part Number Compliant Package Surface Mount Tape & Reel IEC/EN/DIN EN 60747-5-2 Quantity ACPL-M60L -000E -500E SO-5 X X X 100 per tube 1500 per reel To order, choose a part number from the part number column and combine with the desired option from the option column to form an order entry. Combination of Option 020 and Option 060 is not available. Example 1: ACPL-M60L-500E to order product of Surface Mount SO-5 in Tape and Reel packaging with RoHS compliant. Option datasheets are available. Contact your Avago sales representative or authorized distributor for information. Schematic + 1 IO 5 IF ICC 6 VCC VO - 3 ACPL-M60L SHIELD USE OF A 0.1 F BYPASS CAPACITOR MUST BE CONNECTED BETWEEN PINS 6 AND 4 (SEE NOTE 1). 4 GND TRUTH TABLE (POSITIVE LOGIC) OUTPUT LED L ON H OFF 2 Package Outline Drawing 4.4 0.1 (0.173 0.004) M60L XXX ANODE 7.0 0.2 (0.276 0.008) CATHODE 1 6 5 VCC VOUT GND 3 4 0.4 0.05 (0.016 0.002) 3.6 0.1* (0.142 0.004) 2.5 0.1 (0.098 0.004) 0.102 0.102 (0.004 0.004) 0.216 0.038 (0.0085 0.0015) 7 MAX. 1.27 BSC (0.050) 0.71 MIN. (0.028) MAX. LEAD COPLANARITY = 0.102 (0.004) DIMENSIONS IN MILLIMETERS (INCHES) * MAXIMUM MOLD FLASH ON EACH SIDE IS 0.15 mm (0.006) NOTE: FLOATING LEAD PROTRUSION IS 0.15 mm (6 mils) MAX. Land Pattern 4.4 (0.17) 1.3 (0.05) 2.5 (0.10) 2.0 (0.080) 8.27 (0.325) 0.64 (0.025) 3 Solder Reflow Temperature Profile 300 PREHEATING RATE 3C + 1C/-0.5C/SEC. REFLOW HEATING RATE 2.5C 0.5C/SEC. PEAK TEMP. 245C PEAK TEMP. 240C TEMPERATURE (C) 200 160C 150C 140C PEAK TEMP. 230C 2.5C 0.5C/SEC. 30 SEC. 3C + 1C/-0.5C 30 SEC. SOLDERING TIME 200C 100 PREHEATING TIME 150C, 90 + 30 SEC. 50 SEC. TIGHT TYPICAL LOOSE ROOM TEMPERATURE 0 0 50 100 150 200 250 TIME (SECONDS) Note: Non-halide flux should be used Recommended PB-Free IR Profile tp Tp TL TEMPERATURE TIME WITHIN 5 C of ACTUAL PEAK TEMPERATURE 20-40 SEC. 260 +0/-5 C 217 C RAMP-UP 3 C/SEC. MAX. 150 - 200 C Tsmax Tsmin RAMP-DOWN 6 C/SEC. MAX. ts PREHEAT 60 to 180 SEC. 25 tL 60 to 150 SEC. t 25 C to PEAK TIME NOTES: THE TIME FROM 25 C to PEAK TEMPERATURE = 8 MINUTES MAX. Tsmax = 200 C, Tsmin = 150 C Note: Non-halide flux should be used 4 Insulation and Safety Related Specifications Parameter Minimum External Air Gap (Clearance) Minimum External Tracking Path (Creepage) Minimum Internal Plastic Gap (Clearance) Tracking Resistance Isolation Group (per DIN VDE 0109) CTI Symbol L (I01) L (I02) Value 5 5 0.08 175 IIIa Units mm mm mm V Conditions Measured from input terminals to output terminals Measured from input terminals to output terminals Through insulation distance, conductor to conductor DIN IEC 112/VDE 0303 Part 1 Material Group DIN VDE 0109 Absolute Maximum Ratings (No Derating Required up to 85C) Parameter Storage Temperature Operating Temperature Average Forward Input Current Reverse Input Voltage Input Power Dissipation Supply Voltage (1 minute maximum) Output Collector Current Output Collector Voltage Output Collector Power Dissipation Solder Reflow Temperature Profile Symbol TS TA IF VR PI VCC IO VO PO Min. -55 -40 Max. 125 85 20 5 40 7 50 7 85 Units C C mA V mW V mA V mW Note 1 See Package Outline Drawings section Recommended Operating Conditions Parameter Input Current, Low Level Input Current, High Level[1] Power Supply Voltage Operating Temperature Fan Out (at RL = 1 k)[1] Output Pull-up Resistor Symbol IFL* IFH** VCC TA N RL Min. 0 5 2.7 4.5 -40 Max. 250 15 3.6 5.5 85 5 Units A mA V V C TTL Loads 330 4k *The off condition can also be guaranteed by ensuring that VFL 0.8 volts. **The initial switching threshold is 5 mA or less. It is recommended that 6.3 mA to 10 mA be used for best performance and to permit at least a 20% LED degradation guardband. 5 Electrical Specifications Over recommended Operating Condition (TA = -40C to +85C , 2.7V VDD 3.6V) unless otherwise specified. All Typicals at VCC = 3.3 V, TA = 25C. Parameter High Level Output Current Input Threshold Current Low Level Output Voltage High Level Supply Current Low Level Supply Current Input Forward Voltage Input Reverse Breakdown Voltage Input Diode Temperature Coefficient Input-Output Insulation Input Capacitance Symbol IOH* ITH VOL* ICCH ICCL VF BVR* VF/ TA VISO CIN Min. Typ. 4.5 3.0 0.35 4.7 7.0 Max. 50 5.0 0.6 7.0 10.0 1.75* Units A mA V mA mA V V Test Conditions VCC = 3.3 V, VO = 3.3 V IF = 250 A VCC = 3.3 V, VO = 0.6 V, IOL (Sinking) = 13 mA VCC = 3.3 V, IF = 5 mA IOL (Sinking) = 13 mA IF = 0 mA, VCC = 3.3 V IF = 10 mA, VCC = 3.3 V TA = 25C, IF = 10 mA IR = 10 A IF = 10 mA Fig. 1 Note 2 1.4 5 1.5 5 -1.6 mV/C 3750 60 VRMS pF RH 50%, t = 1 min. f = 1 MHz, VF = 0 V 12, 13 *The JEDEC Registration specifies 0C to +70C. Avago specifies -40C to +85C. Electrical Specifications Over recommended temperature (TA = -40C to +85C , 4.5V VDD 5.5V) unless otherwise specified. All Typical specification at VCC = 5V, TA = 25 C Parameter High Level Output Current Input Threshold Current Low Level Output Voltage High Level Supply Current Low Level Supply Current Input Forward Voltage Input Reverse Breakdown Voltage Input Diode Temperature Coefficient Input-Output Insulation Input Capacitance *All typicals at TA = 25C, VCC = 5 V. Symbol IOH ITH VOL ICCH ICCL VF BVR VF/TA Min. Typ.* 5.5 2 0.4 4 6 Max. 100 5 0.6 7.5 10.5 1.75 1.85 Units A mA V mA V Test Conditions VCC = 5.5 V, VO = 5.5 V IF = 250 A VCC = 5.5 V, IO 13 mA, VO = 0.6 V VCC = 5.5 V, IF = 5 mA, IOL (Sinking) = 13 mA VCC = 5.5 V, IF = 0 mA, VCC = 5.5 V, IF = 10 mA, TA = 25C, IF = 10 mA IF = 10 mA IR = 10 A Fig. 1 Note 2 1.4 1.3 5 1.5 5 -1.6 mV/C IF = 10 mA VISO CIN 3750 60 VRMS pF RH 50%, t = 1 min. VF = 0V, f = 1 MHz 12, 13 6 Switching Specifications Over recommended temperature (TA = -40C to +85C), VCC = 3.3 V, IF = 7.5 mA unless otherwise specified. All Typicals at TA = 25C, VCC = 3.3 V. Parameter Propagation Delay Time to High Output Level Propagation Delay Time to Low Output Level Pulse Width Distortion Propagation Delay Skew Output Rise Time (10-90%) Output Fall Time (90-10%) Symbol tPLH Min. Typ. Max. 90 Units ns Test Conditions RL = 350 CL = 15 pF RL = 350 CL = 15 pF RL = 350 CL = 15 pF RL = 350 CL = 15 pF RL = 350 CL = 15 pF RL = 350 CL = 15 pF Fig. 6, 7, 8 Note 5 tPHL 75 ns 6, 7, 8 6 |tPHL - tPLH| tPSK tr tf 45 20 25 40 ns ns ns ns 9 8 *JEDEC registered data for the 6N137. Switching Specifications Over recommended temperature (TA = -40C to 85C), VCC = 5 V, IF = 7.5 mA unless otherwise specified. All Typicals at TA = 25C, VCC = 5 V. Parameter Propagation Delay Time to High Output Level Propagation Delay Time to Low Output Level Pulse Width Distortion Propagation Delay Skew Output Rise Time (10%-90%) Output Fall Time (10%-90%) Symbol tPLH Min. 20 Typ.* 48 Max. 75 100 Unit ns Test Conditions TA = 25C, RL=350 CL=15pF RL=350 , CL=15pF TA = 25C, RL=350 CL=15pF RL=350 , CL=15pF RL= 350 CL = 15 pF RL= 350 CL = 15 pF RL= 350 CL = 15 pF RL= 350 CL = 15 pF Fig. 6, 7, 8 Note 5 tPHL 25 50 75 100 ns 6, 7, 8 6 |tPHL - tPLH| tPSK trise tfall 3.5 35 40 ns ns ns ns 9 8 24 10 *All typicals at TA = 25C, VCC = 5 V. 7 Parameter Logic High Common Mode Transient Immunity Logic Low Common Mode Transient Immunity Sym. |CMH| Device ACPL-M60L Min. 15,000 Typ. 25,000 Units V/s Test Conditions |VCM| = 1000 V VCC = 3.3 V, IF = 0 mA, VO(MIN) = 2 V, RL = 350 , TA = 25C VCC = 5 V, IF = 0 mA, VO(MIN) = 2 V, RL = 350 , TA = 25C Fig. 9 Note 9, 11 10,000 15,000 9 9, 11 |CML| ACPL-M60L 15,000 25,000 V/s |VCM| = 1000 V VCC = 3.3 V, IF = 7.5 mA, VO(MAX) = 0.8 V, RL = 350 , TA = 25C VCC = 5 V, IF = 7.5 mA, VO(MIN) = 0.8 V, RL = 350 , TA = 25C 9 10, 11 10,000 15,000 9 10, 11 Notes: 1. Peaking circuits may produce transient input currents up to 50 mA, 50 ns maximum pulse width, provided average current does not exceed 20 mA. 2. Peaking circuits may produce transient input currents up to 50 mA, 50 ns maximum pulse width, provided average current does not exceed 15 mA. 3. Derate linearly above +80C free-air temperature at a rate of 2.7 mW/C for the SOIC-5 package. 4. Bypassing of the power supply line is required, with a 0.1 F ceramic disc capacitor adjacent to each optocoupler as illustrated in Figure 11. Total lead length between both ends of the capacitor and the isolator pins should not exceed 20 mm. 5. The tPLH propagation delay is measured from the 3.75 mA point on the falling edge of the input pulse to the 1.5 V point on the rising edge of the output pulse. 6. The tPHL propagation delay is measured from the 3.75 mA point on the rising edge of the input pulse to the 1.5 V point on the falling edge of the output pulse. 7. tPSK is equal to the worst case difference in tPHL and/or tPLH that will be seen between units at any given temperature and specified test conditions. 8. See test circuit for measurement details. 9. CMH is the maximum tolerable rate of rise on the common mode voltage to assure that the output will remain in a high logic state (i.e., Vo > 2.0 V). 10. CML is the maximum tolerable rate of fall of the common mode voltage to assure that the output will remain in a low logic state (i.e., Vo < 0.8 V). 11. For sinusoidal voltages, (|dVCM | / dt)max = fCMVCM (p-p). 12. Device considered a two terminal device: pins 1 and 3 shorted together, and pins 4, 5 and 6 shorted together. 13. In accordance with UL 1577, each optocoupler is proof tested by applying an insulation test voltage 4500 VRMS for 1 second (Leakage detection current limit, II-O 5 A). 15 IOH - HIGH LEVEL OUTPUT CURRENT - A 10 I OH - HIGH LEVEL OUTPUT CURRENT - A VCC = 3.3 V VO = 3.3 V IF = 250 A 15 V CC = 5.5 V V O = 5.5 V I F = 250 A 10 5 5 0 -60 -40 -20 0 20 40 60 80 100 0 -60 -40 -20 0 20 40 60 8 0 100 TA - TEMPERATURE - C T A - TEMPERATURE - C Figure 1. Typical high level output current vs. temperature. 8 ITH - INPUT THRESHOLD CURRENT - mA ITH - INPUT THRESHOLD CURRENT - mA 12 10 8 6 4 2 VCC = 3.3 V VO = 0.6 V 6 5 4 3 2 1 VCC = 5.0 V VO = 0.6 V RL = 350 K RL = 1 K RL = 1 k RL = 350 RL = 4 K 0 20 40 60 80 100 RL = 4 k 0 20 40 60 80 100 0 -60 -40 -20 0 -60 -40 -20 TA - TEMPERATURE - C TA - TEMPERATURE - C Figure 2. Typical input threshold current vs. Temperature HCPL-M600 fig 13 0.8 VOL - LOW LEVEL OUTPUT VOLTAGE - V 0.7 0.6 0.5 0.4 0.3 0.2 0.1 V OL - LOW LEVEL OUTPUT VOLTAGE - V VCC = 3.3 V IF = 5.0 mA 0.5 V CC = 5.5 V I F = 5.0 mA I O = 12.8 mA 0.4 0.3 IO = 13 mA 0.2 0 -60 -40 -20 0 20 40 60 80 100 0.1 -60 -40 -20 0 20 40 60 80 100 TA - TEMPERATURE - C T A - TEMPERATURE - C Figure 3. Typical low level output voltage vs. temperature. IOL - LOW LEVEL OUTPUT CURRENT - mA I OL - LOW LEVEL OUTPUT CURRENT - mA 70 VCC = 3.3 V VOL = 0.6 V 80 60 60 IF - FORWARD CURRENT - mA V CC = 5.0 V V OL = 0.6 V 1000 TA = 25 C 100 10 1.0 0.1 0.01 0.001 1.1 1.2 1.3 1.4 1.5 1.6 VF - + IF 50 IF = 5.0 mA 40 40 I F = 5.0 mA 20 20 -60 -40 -20 0 20 40 60 80 100 0 -60 -40 -20 0 20 40 60 80 100 TA - TEMPERATURE - C T A - TEMPERATURE - C VF - FORWARD VOLTAGE - V Figure 4. Typical low level output current vs. temperature. Figure 5. Typical input diode forward characteristic. 9 PULSE GEN. Z = 50 O t = tr = 5 ns f IF 3.3 V 1 VCC 6 0.1 F BYPASS *CL 3 RL OUTPUT VO MONITORING NODE INPUT IF tPHL OUTPUT VO tPLH 1.5 V IF = 7.50 mA IF = 3.75 mA 5 INPUT MONITORING NODE 4 RM GND *CL IS APPROXIMATELY 15 pF WHICH INCLUDES PROBE AND STRAY WIRING CAPACITANCE. PULSE GEN. Z O = 50 t f = t r = 5 ns IF 1 V CC 6 5 INPUT MONITORING NODE 3 RM 4 +5 V 0.1F BYPASS *C L RL OUTPUT V O MONITORING NODE INPUT IF t PHL OUTPUT VO t PLH I F = 7.5 mA I F = 3.75 mA GND 1.5 V *C L IS APPROXIMATELY 15 pF WHICH INCLUDES PROBE AND STRAY WIRING CAPACITANCE. Figure 6. Test circuit for tPHL and tPLH. 150 tP - PROPAGATION DELAY - ns 120 90 60 30 0 -60 VCC = 3.3 V IF = 7.5 mA 100 t P - PROPAGATION DELAY - ns 80 60 40 20 0 -60 V CC = 5.0 V I F = 7.5 mA t PHL , R L = 350 tPLH , RL = 350 tPHL , RL = 350 t PLH , R L = 350 -40 -20 0 20 40 60 80 100 -40 -20 0 20 40 60 80 100 TA - TEMPERATURE - C T A - TEMPERATURE - C Figure 7. Typical propagation delay vs. temperature. 10 50 PWD - PULSE WIDTH DISTORTION - ns 40 30 20 10 0 -60 RL = 350 PWD - PULSE WIDTH DISTORTION - ns VCC = 3.3 V IF = 7.5 mA 40 30 20 10 0 -10 R L = 350 k V CC = 5.0 V I F = 7.5 mA -40 -20 0 20 40 60 80 100 -60 -40 -20 0 20 40 60 80 100 TA - TEMPERATURE - C T A - TEMPERATURE - C Figure 8. Typical pulse width distortion vs. temperature. IF B A VFF 3 GND 1 VCC 6 0.1 F BYPASS 3.3 V 350 OUTPUT VO MONITORING NODE VCM VO VO 0V 3.3 V SWITCH AT A: IF = 0 mA SWITCH AT B: IF = 7.5 mA 0.5 V VO (MIN.) VO (MAX.) VCM (PEAK) CMH 5 4 CML - + PULSE GENERATOR ZO = 50 IF B A VFF 3 GND 5 4 1 VCC 6 0.1 F BYPASS +5 V 350 OUTPUT VO MONITORING NODE VCM VCM (PEAK) 0V 5V SWITCH AT A: IF = 0 mA VO (MIN.) SWITCH AT B: IF = 7.5 mA VO (MAX.) VO CMH VO 0.5 V _ + PULSE GENERATOR ZO = 50 CML Figure 9. Test circuit for common mode transient immunity and typical waveforms. For product information and a complete list of distributors, please go to our web site: www.avagotech.com Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies in the United States and other countries. Data subject to change. Copyright (c) 2005-2008 Avago Technologies. All rights reserved. Obsoletes AV01-0273EN AV02-0891EN - December 18, 2008 |
Price & Availability of ACPL-M60L-500E
![]() |
|
|
All Rights Reserved © IC-ON-LINE 2003 - 2022 |
[Add Bookmark] [Contact Us] [Link exchange] [Privacy policy] |
Mirror Sites : [www.datasheet.hk]
[www.maxim4u.com] [www.ic-on-line.cn]
[www.ic-on-line.com] [www.ic-on-line.net]
[www.alldatasheet.com.cn]
[www.gdcy.com]
[www.gdcy.net] |