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A62S9308 Series
Preliminary
Document Title 512K X 8 BIT LOW VOLTAGE CMOS SRAM Revision History
Rev. No.
0.0
512K X 8 BIT LOW VOLTAGE CMOS SRAM
History
Initial issue
Issue Date
February 12, 2001
Remark
Preliminary
PRELIMINARY
(February, 2001, Version 0.0)
AMIC Technology, Inc.
A62S9308 Series
Preliminary
Features
n Power supply range: 2.7V to 3.6V n Access times:70 ns (max.) n Current: A62S9308-S series: Operating: 40mA (max.) Standby: 10A (max.) A62S9308-SI series: Operating: 40mA (max.) Standby: 15A (max.) n Extended operating temperature range: -25C to 85C for -SI series n n n n Full static operation, no clock or refreshing required All inputs and outputs are directly TTL compatible Common I/O using three-state output Output enable and two chip enable inputs for easy application n Data retention voltage: 2V (min.) n Available in 32-pin SOP, TSOP, sTSOP (8X 13.4mm) forward type and 36-ball Mini BGA (6X8) packages
512K X 8 BIT LOW VOLTAGE CMOS SRAM
General Description
The A62S9308 is a low operating current 4,194,304-bit static random access memory organized as 524,288 words by 8 bits and operates on a low power supply voltage from 2.7V to 3.6V. Inputs and three-state outputs are TTL compatible and allow for direct interfacing with common system bus structures. Two chip enable inputs for Mini BGA package are provided for power down and a device enable and an output enable input are included for easy interfacing. Data retention is guaranteed at a power supply voltage as low as 2V.
Pin Configurations
n SOP n TSOP/(sTSOP) (forward type) n Mini BGA (6X8) Top View
A17 A16 A14 A12 A7 A6 A5 A4 A3 A2 A1 A0 I/O0 I/O1 I/O2 GND
1 2 3 4 5 6
32 31 30 29 28 27
VCC
A18 WE A13 A8 A9 A11 OE A10 CE1 I/O7 I/O6 I/O5 I/O4 I/O3
~
A15 A11 A9 A8 A13 WE A18 A15 VCC A17 A16 A14 A12 A7 A6 A5 A4 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
1
32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 OE A10 CE1 I/O 7 I/O 6 I/O 5 I/O 4 I/O 3 GND I/O 2 I/O 1 I/O 0 A0 A1 A2 A3
2 A1 A2
3 CE2
WE
4 A3 A4 A5
5 A6 A7
6 A8 I/O0 I/O1 VCC VSS
A B C D E F G H
A0 I/O4 I/O5 VSS VCC I/O6 I/O7 A9
NC
A62S9308M
7 8 9 10 11 12 13 14 15 16
26 25 24 23 22 21 20 19 18 17
A62S9308V (A62S9308X)
A18
OE CE1
A17 A16 A12 A15 A13
I/O2 I/O3 A14
~ ~
A10
A11
PRELIMINARY
(February, 2001, Version 0.0)
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AMIC Technology, Inc.
A62S9308 Series
Block Diagram
A0
VCC GND
A16 A17 A18
ROW DECODER
2048 X 2048 MEMORY ARRAY
I/O0
INPUT DATA CIRCUIT
COLUMN I/O
I/O7
CE2 CE1 OE WE
CONTROL CIRCUIT
Pin Descriptions - SOP
Pin No. 1 - 12, 23, 25 - 28, 30, 31 13 - 15, 17 - 21 16 22 24 29 32 Symbol Description
Pin Description - TSOP/sTSOP
Pin No. 1 - 4, 6, 7, 9 - 20, 31 5 Symbol A0 - A18
WE
Description Address Inputs Write Enable Power Supply Data Inputs/Outputs Ground Chip Enable 1 Output Enable
A0 - A18
Address Inputs
I/O0 - I/O7 GND
CE1 OE WE
Data Inputs/Outputs 8 Ground Chip Enable 1 Output Enable 30 Write Enable 32
OE CE1
VCC I/O0 - I/O7 GND
21 - 23, 25 - 29 24
VCC
Power Supply
PRELIMINARY
(February, 2001, Version 0.0)
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AMIC Technology, Inc.
A62S9308 Series
Recommended DC Operating Conditions
(TA = 0C to + 70C or -25C to 85C) Symbol VCC GND VIH VIL CL TTL Parameter Supply Voltage Ground Input High Voltage Input Low Voltage Output Load Output Load Min. 2.7 0 2.4 -0.3 Typ. 3.0 0 Max. 3.6 0 VCC + 0.3 +0.6 30 1 Unit V V V V pF -
Absolute Maximum Ratings*
VCC to GND . . . . . . . . . . . . . . . . . . . . . -0.5V to + 4.6V IN, IN/OUT Volt to GND . . . . . . . . . -0.5V to VCC + 0.5V Operating Temperature, Topr . . . . . . . . -25C to + 85C Storage Temperature, Tstg . .. . . . . . . . -55C to + 125C Power Dissipation, PT . . . . . . . . . . . . . . . . . . . . . . 0.7W Soldering Temp. & Time . . . . . . . . . . . . . 260C, 10 sec
*Comments
Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to this device. These are stress ratings only. Functional operation of this device at these or any other conditions above those indicated in the operational sections of this specification is not implied or intended. Exposure to the absolute maximum rating conditions for extended periods may affect device reliability.
DC Electrical Characteristics
Symbol Parameter
(TA = 0C to + 70C or -25C to 85C, VCC = 2.7V to 3.6V, GND = 0V) A62S9308-70S Min. Max. 1 A62S9308-70SI Min. Max. 1 A VIN = GND to VCC
CE1 = VIH or CE2 = VIL or OE = VIH or WE = VIL VI/O = GND to VCC CE1 = VIL, CE2 = VIH II/O = 0mA
Unit
Conditions
ILI
Input Leakage Current Output Leakage Current Active Power Supply Current
-
ILO
-
1
-
1
A
ICC
-
3
-
3
mA
ICC1 Dynamic Operating Current ICC2
-
40
-
40
mA
Min. Cycle, Duty = 100% CE1 = VIL, CE2 = VIH II/O = 0mA
CE1 = VIL, CE2 = VIH VIH = VCC, VIL = 0V, f = 1MHz, II/O = 0mA
-
10
-
10
mA
PRELIMINARY
(February, 2001, Version 0.0)
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AMIC Technology, Inc.
A62S9308 Series
DC Electrical Characteristics (continued)
Symbol Parameter A62S9308-70S Min. ISB Max. 0.5 A62S9308-70SI Min. Max. 0.5 mA
CE1 = VIH or CE2 = VIL CE1 VCC - 0.2V CE2 VCC - 0.2V VIN 0V
Unit
Conditions
ISB1
Standby Power Supply Current
-
10
-
15
A
ISB2 VOL VOH Output Low Voltage Output High Voltage
2.4
10 0.4 -
2.4
15 0.4 -
A V V
CE2 0.2V VIN 0V IOL = 2.1mA IOH = -1.0mA
Truth Table
Mode Standby
CE1
CE2 X L H H H
OE
WE
I/O Operation High Z High Z High Z DOUT DIN
Supply Current ISB, ISB1 ISB, ISB2 ICC, ICC1, ICC2 ICC, ICC1, ICC2 ICC, ICC1, ICC2
H X
X X H L X
X X H H L
Output Disable Read Write Note: X = H or L
L L L
Capacitance (TA = 25C, f = 1.0MHz)
Symbol CIN* CI/O* Parameter Input Capacitance Input/Output Capacitance Min. Max. 6 8 Unit pF pF Conditions VIN = 0V VI/O = 0V
* These parameters are sampled and not 100% tested.
PRELIMINARY
(February, 2001, Version 0.0)
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AMIC Technology, Inc.
A62S9308 Series
AC Characteristics (TA = 0C to + 70C or -25C to 85C, VCC = 2.7V to 3.6V)
Symbol Parameter A62S9308-70S/SI Min. Read Cycle tRC tAA tACE1 tACE2 tOE tCLZ1 tCLZ2 tOLZ tCHZ1 tCHZ2 tOHZ tOH Read Cycle tWC tCW tAS tAW tWP tWR tWHZ tDW tDH tOW Notes: Write Cycle Time Chip Enable to End of Write Address Setup Time Address Valid to End of Write Write Pulse Width Write Recovery Time Write to Output in High Z Data to Write Time Overlap Data Hold from Write Time Output Active from End of Write 70 60 0 60 50 0 0 30 0 5 25 ns ns ns ns ns ns ns ns ns ns Output Disable to Output in High Z Output Hold from Address Change Output Enable to Output in Low Z Chip Disable to Output in High Z
CE1
Unit
Max.
Read Cycle Time Address Access Time Chip Enable Access Time
CE1
70 CE1
70 70 70 35 25 25 25 -
ns ns ns ns ns ns ns ns ns ns ns ns
CE2 Output Enable to Output Valid Chip Enable to Output in Low Z
10 10 5 0 0 0 10
CE2
CE2
tCHZ1, tCHZ2, tOHZ and tWHZ are defined as the time at which the outputs achieve the open circuit condition and are not referred to output voltage levels.
PRELIMINARY
(February, 2001, Version 0.0)
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AMIC Technology, Inc.
A62S9308 Series
Timing Waveforms
Read Cycle 1(1, 2, 4)
tRC Address
tAA tOH tOH
DOUT
Read Cycle 2 (1, 3, 4, 6)
CE1
tACE1 tCLZ15
tCHZ15
DOUT
Read Cycle 3
(1, 4, 7 ,8)
CE2
tACE2 tCLZ25 tCHZ25
DOUT
PRELIMINARY
(February, 2001, Version 0.0)
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AMIC Technology, Inc.
A62S9308 Series
Timing Waveforms (continued)
Read Cycle 4 (1)
tRC Address tAA
OE
tOE tOLZ5
tOH
CE1
tACE1 tCLZ15 CE2 tACE2 tCLZ25 DOUT tCHZ25 tOHZ5 tCHZ15
Notes: 1. 2. 3. 4. 5. 6. 7. 8.
WE is high for Read Cycle. Device is continuously enabled CE1 = VIL and CE2 = VIH. Address valid prior to or coincident with CE1 transition low. OE = VIL. Transition is measured 500mV from steady state. This parameter is sampled and not 100% tested. CE2 is high. CE1 is low. Address valid prior to or coincident with CE2 transition high.
PRELIMINARY
(February, 2001, Version 0.0)
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AMIC Technology, Inc.
A62S9308 Series
Timing Waveforms (continued)
Write Cycle 1(6) (Write Enable Controlled)
tWC Address tAW tCW5 CE1 (4) tWR3
CE2
(4) tAS1 tWP2
WE
tDW
tDH
DIN tWHZ tOW DOUT
PRELIMINARY
(February, 2001, Version 0.0)
8
AMIC Technology, Inc.
A62S9308 Series
Timing Waveforms (continued)
Write Cycle 2 (Chip Enable Controlled)
tWC Address tAW tCW5 CE1 tAS1 (4) tWR3
CE2
(4) tCW5 tWP2
WE
tDW
tDH
DIN
tWHZ7
DOUT
Notes: 1. 2. 3. 4.
tAS is measured from the address valid to the beginning of Write. A Write occurs during the overlap (tWP) of a low CE1, a high CE2 and a low WE . tWR is measured from the earliest of CE1 or WE going high or CE2 going low to the end of the Write cycle. If the CE1 low transition or the CE2 high transition occurs simultaneously with the WE low transition or after the WE transition, outputs remain in a high impedance state. 5. tCW is measured from the later of CE1 going low or CE2 going high to the end of Write. 6. OE is continuously low. ( OE = VIL) 7. Transition is measured 500mV from steady state. This parameter is sampled and not 100% tested.
PRELIMINARY
(February, 2001, Version 0.0)
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AMIC Technology, Inc.
A62S9308 Series
AC Test Conditions
Input Pulse Levels Input Rise and Fall Time Input and Output Timing Reference Levels Output Load 0V to 3.0V 5 ns 1.5V See Figures 1 and 2
TTL
TTL
CL 30pF
CL 5pF
* Including scope and jig.
* Including scope and jig.
Figure 1. Output Load
Figure 2. Output Load for tCLZ1, tCLZ2, tOHZ, tOLZ, tCHZ1, tCHZ2, tWHZ, and tOW
Data Retention Characteristics
Symbol VDR1
(TA = 0C to + 70C or -25C to 85C) Min. 2.0 Max. 3.6 Unit V Conditions
CE1 VCC - 0.2V
Parameter
VCC for Data Retention VDR2 2.0 3.6 V
CE2 0.2V CE1 VCC - 0.2V or CE1 0.2V VCC = 2.0V CE1 VCC - 0.2V CE2 VCC - 0.2V VIN 0V VCC = 2.0V CE2 0.2V VIN 0V
S-Version ICCDR1 SI-Version Data Retention Current S-Version ICCDR2 SI-Version tCDR tR Chip Disable to Data Retention Time Operation Recovery Time
0 tRC
5* A 10** 5* A 10** ns ns
See Retention Waveform
* A62S9308-70S ** A62S9308-70SI
ICCDR: Max. 1A at TA = 0C + 40C ICCDR: Max. 1A at TA = 0C + 40C
PRELIMINARY
(February, 2001, Version 0.0)
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AMIC Technology, Inc.
A62S9308 Series
Low VCC Data Retention Waveform (1) ( CE1 Controlled)
DATA RETENTION MODE VCC 2.7V tCDR VDR 2V 2.7V tR
CE1
VIH CE1 VDR - 0.2V
VIH
Low VCC Data Retention Waveform (2) (CE2 Controlled)
DATA RETENTION MODE VCC 2.7V tCDR VDR 2V 2.7V tR
CE2
VIL CE2 < 0.2V
VIL
PRELIMINARY
(February, 2001, Version 0.0)
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AMIC Technology, Inc.
A62S9308 Series
Ordering Information
Part No. Access Time (ns) Operating Current Max. (mA) 40 40 40 70 40 40 40 40 40 Standby Current Max. (A) 10 15 10 15 10 15 10 15 Package
A62S9308M-70S A62S9308M-70SI A62S9308V-70S A62S9308V-70SI A62S9308X-70S A62S9308X-70SI A62S9308G-70S A62S9308G-70SI
32L SOP 32L SOP 32L TSOP 32L TSOP 32L sTSOP 32L sTSOP 36B Mini BGA 36B Mini BGA
PRELIMINARY
(February, 2001, Version 0.0)
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AMIC Technology, Inc.
A62S9308 Series
Package Information SOP (W.B.) 32L Outline Dimensions
32 17
unit: inches/mm
HE
E
L 1 b 16 Detail F
D c A2 A S Seating Plane y D
e
A1
LE See Detail F
Dimensions in inches Symbol A A1 A2 b c D E e HE L LE S y Min 0.004 0.101 0.014 0.006 0.440 0.044 0.546 0.023 0.047 0 Nom 0.106 0.016 0.008 0.805 0.445 0.050 0.556 0.031 0.055 Max 0.118 0.111 0.020 0.012 0.817 0.450 0.056 0.566 0.039 0.063 0.036 0.004 10
Dimensions in mm Min 0.10 2.57 0.36 0.15 11.18 1.12 13.87 0.58 1.19 0 Nom 2.69 0.41 0.20 20.45 11.30 1.27 14.12 0.79 1.40 Max 3.00 2.82 0.51 0.31 20.75 11.43 1.42 14.38 0.99 1.60 0.91 0.10 10
Notes: 1. The maximum value of dimension D includes end flash. 2. Dimension E does not include resin fins. 3. Dimension S includes end flash.
PRELIMINARY
(February, 2001, Version 0.0)
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AMIC Technology, Inc.
A62S9308 Series
Package Information TSOP 32L TYPE I (8 X 20mm) Outline Dimensions
D
unit: inches/mm
e
A2
E
A1
c
L LE
HD Detail "A"
Detail "A"
y
D
S
b
Dimensions in inches Symbol A A1 A2 b c D E e HD L LE S y 0.779 0.016 0 Min 0.002 0.037 0.007 0.004 0.720 Nom 0.039 0.009 0.724 0.315 0.020 BSC 0.787 0.020 0.032 0.795 0.024 0.020 0.003 5 Max 0.047 0.006 0.041 0.011 0.008 0.728 0.319
Dimensions in mm Min 0.05 0.95 0.18 0.11 18.30 Nom 1.00 0.22 18.40 8.00 0.50 BSC 19.80 0.40 0 20.00 0.50 0.80 20.20 0.60 0.50 0.08 5 Max 1.20 0.15 1.05 0.27 0.20 18.50 8.10
Notes: 1. The maximum value of dimension D includes end flash. 2. Dimension E does not include resin fins. 3. Dimension S includes end flash.
PRELIMINARY
(February, 2001, Version 0.0)
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AMIC Technology, Inc.
A
A62S9308 Series
Package Information sTSOP 32L TYPE I (8 X 13.4mm) Outline Dimensions
unit: inches/mm
e
A2
E
A1
c
L LE Detail "A"
D1 D Detail "A"
D
0.076MM
S
SEATING PLANE
b
Dimensions in inches Symbol A A1 A2 b c E e D D1 L LE S 0 0.520 0.461 0.012 0.0275 Min 0.002 0.037 0.007 0.0056 0.311 Nom 0.039 0.008 0.0059 0.315 0.020 TYP 0.528 0.465 0.020 0.0315 0.0109 TYP 3 5 0.535 0.469 0.028 0.0355 Max 0.049 0.041 0.009 0.0062 0.319
Dimensions in mm Min 0.05 0.95 0.17 0.142 7.90 Nom 1.00 0.20 0.150 8.00 0.50 TYP 13.20 11.70 0.30 0.700 13.40 11.80 0.50 0.800 0.278 TYP 0 3 5 13.60 11.90 0.70 0.900 Max 1.25 1.05 0.23 0.158 8.10
Notes: 1. The maximum value of dimension D1 includes end flash. 2. Dimension E does not include resin fins. 3. Dimension S includes end flash.
PRELIMINARY
(February, 2001, Version 0.0)
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AMIC Technology, Inc.
A
A62S9308 Series
Package Information Mini BGA 6X8 (36 BALLS) Outline Dimensions
unit : millimeter(mm)
Bottom View Pin A1 Index 654 321 Pin A1 Index
Top View
C1
E F G H
A
A B1 Diameter D Solder Ball
B
D
Symbol A B B1 C C1 D E E1 E2
Min 5.90 7.90 0.30 1.00 -
Typ 0.75 6.00 3.75 8.00 5.25 0.35 1.10 0.36 0.22
Max 6.10 8.10 0.40 1.20 -
PRELIMINARY
(February, 2001, Version 0.0)
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AMIC Technology, Inc.
C E2 E
A B C D
0.10 E1

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