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 Supervisory Circuits with Watchdog and Manual Reset in 5-Lead SC70 and SOT-23 ADM823/ADM824/ADM825
FEATURES
Precision 2.5 V to 5 V power supply monitor 7 reset threshold options: 2.19 V to 4.63 V 140 ms (min) reset timeout Watchdog timer with 1.6s timeout (ADM823, ADM824) Manual reset input (ADM823, ADM825) Push-pull output stages: RESET (ADM823) RESET, RESET (ADM824/ADM825) Low power consumption (5 A) Guaranteed reset output valid to VCC = 1 V Power supply glitch immunity Specified over automotive temperature range 5-lead SC70 and SOT-23 packages
FUNCTIONAL BLOCK DIAGRAM
ADM823
VCC VCC VREF RESET GENERATOR
RESET
MR
DEBOUNCE WATCHDOG DETECTOR
04534-0-001
GND
WDI
Figure 1.
APPLICATIONS
Microprocessor systems Computers Controllers Intelligent instruments Portable equipment
GENERAL DESCRIPTION The ADM823/ADM824/ADM825 are supervisory circuits which monitor power supply voltage levels and code execution integrity in microprocessor-based systems. As well as providing power on reset signals, an on-chip watchdog timer can reset the microprocessor if it fails to strobe within a preset timeout period. A reset signal can also be asserted by an external pushbutton, through a manual reset input. The three parts feature different combinations of watchdog input, manual reset input and output stage configuration, as shown in Table 1. Each part is available in a choice of seven reset threshold options ranging from 2.19 V to 4.63 V. The reset and watchdog timeout periods are fixed at 140 ms (min) and 1.6s (typ), respectively. The ADM823/ADM824/ADM825 are available in 5-lead SC70 and SOT-23 packages and typically consume only 3 A, making them suitable for use in low power portable applications.
Table 1. Selection Table
Output Stage Part No. ADM823 ADM824 ADM825 Watchdog Timer Yes Yes - Manual Reset Yes - Yes RESET Push-Pull Push-Pull Push-Pull RESET - Push-Pull Push-Pull
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.326.8703 (c) 2004 Analog Devices, Inc. All rights reserved.
ADM823/ADM824/ADM825 TABLE OF CONTENTS
Specifications..................................................................................... 3 Absolute Maximum Ratings............................................................ 5 ESD Caution.................................................................................. 5 Pin Configurations and Function Descriptions ........................... 6 Typical Performance Characteristics ............................................. 7 Circuit Description........................................................................... 9 Reset Output ................................................................................. 9 Manual Reset Input ...................................................................... 9 Watchdog Input .............................................................................9 Application Information................................................................ 10 Watchdog Input Current ........................................................... 10 Negative-Going VCC Transients ................................................ 10 Ensuring Reset Valid to VCC = 0 V ........................................... 10 Watchdog Software Considerations......................................... 10 Outline Dimensions ....................................................................... 11 Ordering Guides......................................................................... 11
REVISION HISTORY
10/04--Revision 0: Initial Version
Rev. 0 | Page 2 of 12
ADM823/ADM824/ADM825 SPECIFICATIONS
VCC = 4.75 V to 5.5 V for ADM82_L, VCC = 4.5 V to 5.5 V for ADM82_M, VCC = 3.15 V to 3.6 V for ADM82_T, VCC = 3 V to 3.6 V for ADM82_S, VCC = 2.7 V to 3.6 V for ADM82_R, VCC = 2.38 V to 2.75 V for ADM82_Z, VCC = 2.25 V to 2.75 V for ADM82_Y, TA = TMIN to TMAX, unless otherwise noted. Table 2.
Parameter SUPPLY VCC Operating Voltage Range Supply Current Min 1 1.2 10 5 RESET THRESHOLD VOLTAGE ADM82_L ADM82_M ADM82_T ADM82_S ADM82_R ADM82_Z (SC70 only) ADM82_Y (SC70 only) RESET THRESHOLD TEMPERATURE COEFFICIENT RESET THRESHOLD HYSTERESIS RESET TIMEOUT PERIOD VCC TO RESET DELAY RESET Output Voltage 140 Typ Max 5.5 24 12 Unit V V A A Test Conditions/Comments TA = 0C to +70C TA = TMIN to TMAX WDI and MR unconnected ADM82_L/M WDI and MR unconnected ADM82_T/S/R/Z/Y TA = 25C TA = TMIN to TMAX TA = 25C TA = TMIN to TMAX TA = 25C TA = TMIN to TMAX TA = 25C TA = TMIN to TMAX TA = 25C TA = TMIN to TMAX TA = 25C TA = TMIN to TMAX TA = 25C TA = TMIN to TMAX ADM82_L/M ADM82_T/S/R/Z/Y VTH - VCC = 100 mV VCC = VTH min, ISINK = 3.2 mA, ADM82_L/M VCC = VTH min, ISINK = 1.2 mA, ADM82_T/S/R/Z/Y TA = 0C to 70C, VCC = 1 V, VCC falling, ISINK = 50 A VCC = VTH max, ISOURCE = 120 A, ADM82_L/M VCC = VTH max, ISOURCE = 30 A, ADM82_T/S/R/Z/Y VCC = VTH max, ISINK = 3.2 mA, ADM824L/M, ADM825L/M VCC = VTH max, ISINK = 1.2 mA, ADM824T/S/R/Z/Y, ADM825T/S/R/Z/Y VCC 1.8 V, ISOURCE = 150 A
4.56 4.50 4.31 4.25 3.04 3.00 2.89 2.85 2.59 2.55 2.28 2.25 2.16 2.13
4.63 4.38 3.08 2.93 2.63 2.32 2.19 40 10 5 200 40
4.70 4.75 4.45 4.50 3.11 3.15 2.96 3.00 2.66 2.70 2.35 2.38 2.22 2.25
280 0.4 0.3 0.3
V V V V V V V V V V V V V V ppm/C mV mV ms s V V V V V
VCC - 1.5 0.8 x VCC RESET Output Voltage 0.4 0.3
V V
0.8 x VCC
V
Rev. 0 | Page 3 of 12
ADM823/ADM824/ADM825
Parameter WATCHDOG INPUT (ADM823, ADM824) Watchdog Timeout Period WDI Pulse Width WDI Input Threshold VIL WDI Input Current MANUAL RESET INPUT (ADM823, ADM825) MR Input Threshold MR Input Pulse Width MR Glitch Rejection MR Pull-Up Resistance MR to Reset Delay 0.7 x VCC 1 35 100 52 500 75 Min 1.12 50 0.7 x VCC -20 120 -15 Typ 1.6 Max 2.40 Unit s ns V A A V V s ns k ns Test Conditions/Comments
VIL = 0.4 V, VIH = 0.8 x V CC
0.3 x VCC 160
VWDI = VCC, time average VWDI = 0, time average
0.3 x VCC
Rev. 0 | Page 4 of 12
ADM823/ADM824/ADM825 ABSOLUTE MAXIMUM RATINGS
TA = 25C, unless otherwise noted. Table 3.
Parameter VCC Output Current (RESET, RESET) All Other Pins Operating Temperature Range Storage Temperature Range JA Thermal Impedance SC70 SOT-23 Lead Temperature Soldering (10 s) Vapor Phase (60 s) Infrared (15 s) Rating -0.3 V to +6 V 20 mA -0.3 V to (VCC + 0.3 V) -40C to +125C -65C to +150C 146C/W 270C/W 300C 215C 220C
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although this product features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
Rev. 0 | Page 5 of 12
ADM823/ADM824/ADM825 PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
RESET 1
5
VCC
RESET 1
5
VCC
RESET 1
5
VCC
ADM823
GND 2
04534-0-002
ADM824
GND 2
04534-0-003
ADM825
GND 2
04534-0-004
TOP VIEW (Not to Scale)
4
TOP VIEW (Not to Scale)
4
TOP VIEW (Not to Scale)
4
MR 3
WDI
RESET 3
WDI
RESET 3
MR
Figure 2. ADM823 Pin Configuration
Figure 3. ADM824 Pin Configuration
Figure 4. ADM825 Pin Configuration
Table 4. Pin Function Descriptions
Pin. No. 1 2 3 Mnemonic RESET GND MR (ADM823) RESET (ADM824/ADM825) WDI (ADM823/ADM824) Description Push-Pull Active-Low Reset Output. Asserted whenever VCC is below the reset threshold, VTH. Ground. Manual Reset Input. This is an active-low input which, when forced low for at least 1 s, generates a reset. It features a 52 kV internal pull-up. Active-High, Push-Pull Reset Output. Watchdog Input. Generates a reset if the voltage on the pin remains low or high for the duration of the watchdog timeout. The timer is cleared if a logic transition occurs on this pin or if a reset is generated. Manual Reset Input. Power Supply Voltage Being Monitored.
4
5
MR (ADM825) VCC
Rev. 0 | Page 6 of 12
ADM823/ADM824/ADM825 TYPICAL PERFORMANCE CHARACTERISTICS
10.0 9.5 9.0 8.5 8.0 7.5 ADM823L
80 100 90
VCC TO RESET DELAY (s)
ADM825R
04534-0-005
70 60 50 40 30 20 10 0 -40
04534-0-008 04534-0-010 04534-0-009
ICC (A)
7.0 6.5 6.0 5.5 5.0 4.5 4.0 3.5 -40 -20 0 ADM824Y
20 40 60 TEMPERATURE (C)
80
100
120
-20
0
20 40 60 TEMPERATURE (C)
80
100
120
Figure 5. Supply Current vs. Temperature
Figure 8. Reset Comparator Propagation Delay vs. Temperature (VCC Falling)
80
340
MANUAL RESET TO RESET DELAY (ns)
04534-0-006
75 70 65 60 55 50 45 40 35 30 25 20 15 10 5 0 0 0.5 1.0 1.5 2.0 2.5 3.0 VCC (V) 3.5 4.0 4.5 5.0 5.5
320 300 280 260 240 220 200 180 160 140 120 100 -40 -20 0 20 40 60 TEMPERATURE (C) 80 100 120
ICC (A)
Figure 6. Supply Current vs. Supply Voltage
1.05 1.04
Figure 9. Manual Reset to Reset Propagation Delay vs. Temperature (ADM823/ADM825)
250 240 230
NORMALIZED RESET THRESHOLD
1.03 1.02
RESET TIMEOUT
04534-0-007
1.01 1.00 0.99 0.98 0.97 0.96 0.95 -40
220 210 200 190 180 170 -40
-20
0
20 40 60 TEMPERATURE (C)
80
100
120
-20
0
20 40 60 TEMPERATURE (C)
80
100
120
Figure 7. Normalized Reset Threshold vs. Temperature
Figure 10. Reset Timeout Period vs. Temperature
Rev. 0 | Page 7 of 12
ADM823/ADM824/ADM825
2.0 1.8
190 180
MR MINIMUM PULSE WIDTH (ns)
04534-0-011
1.6
170 160 150 140 130 120 110 100 -50
04534-0-013
TIMEOUT PERIOD (s)
1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 -40 -20 0 25 60 TEMPERATURE (C) 85 125
0
50 TEMPERATURE (C)
100
Figure 11. Watchdog Timeout Period vs. Temperature (ADM823/ADM824)
160 140 RESET OCCURS ABOVE GRAPH
Figure 13. Manual Reset Minimum Pulse Width vs. Temperature (ADM823/ADM825)
3.8 3.6 3.4 3.2 3.0 2.8 2.6 2.4 2.2
04534-0-012
MAXIMUM TRANSIENT DURATION (s)
100 VTH = 4.63V 80 60 40 20 VTH = 2.93V 0 10 100 OVERDRIVE VOD (mV) 1000
MINIMUM PULSE WIDTH (ns)
120
NEGATIVE PULSE
POSITIVE PULSE
2.0 -40
10
60 TEMPERATURE (C)
110
160
Figure 12. Maximum VCC Transient Duration vs. Reset Threshold Overdrive
Figure 14. Watchdog Input Minimum Pulse Width vs. Temperature (ADM823/ADM824)
Rev. 0 | Page 8 of 12
04534-0-014
ADM823/ADM824/ADM825 CIRCUIT DESCRIPTION
The ADM823/ADM824/ADM825 provide microprocessor supply voltage supervision by controlling the microprocessor's reset input. Code-execution errors are avoided during powerup, power-down, and brownout conditions by asserting a reset signal when the supply voltage is below a preset threshold. They are also avoided by allowing supply voltage stabilization with a fixed-timeout reset pulse after the supply voltage rises above the threshold. In addition, problems with microprocessor code execution can be monitored and corrected with a watchdog timer (ADM823/ ADM824). By including watchdog strobe instructions in microprocessor code, a watchdog timer can detect if the microprocessor code breaks down or becomes stuck in an infinite loop. If this happens, the watchdog timer asserts a reset pulse that restarts the microprocessor in a known state. If the user detects a problem with the system's operation, a manual reset input is available (ADM823/ADM825) to reset the microprocessor with an external push-button, for example.
MANUAL RESET INPUT
The ADM823/ADM825 feature a manual reset input (MR) which, when driven low, asserts the reset output. When MR transitions from low to high, reset remains asserted for the duration of the reset active timeout period before deasserting. The MR input has a 52 kV internal pull-up so that the input is always high when unconnected. An external push-button switch can be connected between MR and ground so that the user can generate a reset. Debounce circuitry for this purpose is integrated on-chip. Noise immunity is provided on the MR input and fast, negative-going transients of up to 100 ns (typ) are ignored. A 0.1 F capacitor between MR and ground provides additional noise immunity.
WATCHDOG INPUT
The ADM823/ADM824 feature a watchdog timer which monitors microprocessor activity. A timer circuit is cleared with every low-to-high or high-to-low logic transition on the watchdog input pin (WDI), which detects pulses as short as 50 ns. If the timer counts through the preset watchdog timeout period (tWD), reset is asserted. The microprocessor is required to toggle the WDI pin to avoid being reset. Failure of the microprocessor to toggle WDI within the timeout period therefore indicates a code execution error, and the reset pulse generated restarts the microprocessor in a known state. In addition to logic transitions on WDI, the watchdog timer is also cleared by a reset assertion due to an undervoltage condition on VCC or by MR being pulled low. When reset is asserted, the watchdog timer is cleared and does not begin counting again until reset deassserts. The watchdog timer can be disabled by leaving WDI floating or by three-stating the WDI driver.
VCC VCC 1V 0V VCC VTH
RESET OUTPUT
The ADM823 features an active-low, push-pull reset output while the ADM824/ADM825 feature dual active-low and active-high push-pull reset outputs. For active-low and activehigh outputs, the reset signal is guaranteed to be logic low and logic high, respectively, for VCC down to 1 V. The reset output is asserted when VCC is below the reset threshold (VTH), when MR is driven low, or when WDI is not serviced within the watchdog timeout period (tWD). Reset remains asserted for the duration of the reset active timeout period (tRP) after VCC rises above the reset threshold, after MR transitions from low-to-high, or after the watchdog timer times out. Figure 15 illustrates the behavior of the reset outputs.
VCC VCC 1V 0V VCC RESET 0V
04534-0-018
VTH
VTH
tRP
VCC
tRD
RESET
tRP
0V VCC 0V
tWD
tRD
04534-0-021
RESET
1V 0V
tRP
WDI
tRD
Figure 15. Reset Timing Diagram
Figure 16. Watchdog Timing Diagram
Rev. 0 | Page 9 of 12
ADM823/ADM824/ADM825 APPLICATION INFORMATION
WATCHDOG INPUT CURRENT
In order to minimize watchdog input current (and minimize overall power consumption), leave WDI low for the majority of the watchdog timeout period. When driven high, WDI can draw as much as 160 A. Pulsing WDI low-high-low at a low duty cycle reduces the effect of the large input current. When WDI is unconnected, a window comparator disconnects the watchdog timer from the reset output circuitry so that reset is not asserted when the watchdog timer times out.
WATCHDOG SOFTWARE CONSIDERATIONS
In implementing the microprocessor's watchdog strobe code, quickly switching WDI low-high and then high-low (minimizing WDI high time) is desirable for current consumption reasons. However, a more effective way of using the watchdog function can be considered. A low-high-low WDI pulse within a given subroutine prevents the watchdog timing out. However, if the subroutine becomes stuck in an infinite loop, the watchdog cannot detect this because the subroutine continues to toggle WDI. A more effective coding scheme for detecting this error involves using a slightly longer watchdog timeout. In the program that calls the subroutine, WDI is set high. The subroutine sets WDI low when it is called. If the program executes without error, WDI is toggled high and low with every loop of the program. If the subroutine enters an infinite loop, WDI is kept low, the watchdog times out, and the microprocessor is reset.
START
NEGATIVE-GOING VCC TRANSIENTS
To avoid unnecessary resets caused by fast power supply transients, the ADM823/ADM824/ADM825 are equipped with glitch rejection circuitry. The typical performance characteristic in Figure 12 plots VCC transient duration vs. the transient magnitude. The curves show combinations of transient magnitude and duration for which a reset is not generated for 4.63 V and 2.93 V reset threshold parts. For example, with the 2.93 V threshold, a transient that goes 100 mV below the threshold and lasts 8 s typically does not cause a reset, but if the transient is any bigger in magnitude or duration, a reset is generated. An optional 0.1 F bypass capacitor mounted close to VCC provides additional glitch rejection.
SET WDI HIGH
RESET
ENSURING RESET VALID TO VCC = 0 V
Both active-low and active-high reset outputs are guaranteed to be valid for VCC as low as 1 V. However, by using an external resistor with push-pull configured reset outputs, valid outputs for VCC as low as 0 V are possible. For an active-low reset output, a resistor connected between RESET and ground pulls the output low when it is unable to sink current. For the activehigh case, a resistor connected between RESET and VCC pulls the output high when it is unable to source current. A large resistance such as 100 k should be used so that it does not overload the reset output when VCC is above 1 V.
VCC VCC
PROGRAM CODE INFINITE LOOP: WATCHDOG TIMES OUT
SUBROUTINE SET WDI LOW
RETURN
Figure 18. Watchdog Flow Diagram
VCC
100k
RESET RESET
04534-0-017
Figure 17. Ensuring Reset Valid to VCC = 0 V
Figure 19. Typical Application Circuit
Rev. 0 | Page 10 of 12
04534-0-019
ADM823/ ADM824/ ADM825
RESET 100k
ADM824/ ADM825
ADM823
RESET
MR WDI I/O
P
04534-0-020
ADM823/ADM824/ADM825 OUTLINE DIMENSIONS
2.00 BSC
5 4
1.25 BSC
1 2 3
2.10 BSC
PIN 1 1.00 0.90 0.70
0.65 BSC
1.10 MAX 0.22 0.08 0.30 0.15 0.10 COPLANARITY COMPLIANT TO JEDEC STANDARDS MO-203AA SEATING PLANE 8 4 0
0.10 MAX
0.46 0.36 0.26
Figure 20. 5-Lead Plastic Surface-Mount Package [SC-70] (KS-5) Dimensions shown in millimeters
2.90 BSC
5
4
1.60 BSC
1
2.80 BSC
2 3
PIN 1 0.95 BSC 1.30 1.15 0.90 1.90 BSC
1.45 MAX
0.22 0.08 10 5 0 0.60 0.45 0.30
0.15 MAX
0.50 0.30
SEATING PLANE
COMPLIANT TO JEDEC STANDARDS MO-178AA
Figure 21. 5-Lead Small Outline Transistor Package [SOT-23] (RJ-5) Dimensions shown in millimeters
ORDERING GUIDES
Table 5. ADM823 Ordering Guide
Model ADM823LYKS-R7 ADM823LYRJ-R7 ADM823MYKS-R7 ADM823MYRJ-R7 ADM823TYKS-R7 ADM823TYRJ-R7 ADM823SYKS-R7 ADM823SYRJ-R7 ADM823RYKS-R7 ADM823RYRJ-R7 ADM823ZYKS-R7 ADM823YYKS-R7 Reset Threshold (V) 4.63 4.63 4.38 4.38 3.08 3.08 2.93 2.93 2.63 2.63 2.32 2.19 Temperature Range -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C
Rev. 0 | Page 11 of 12
Quantity 3k 3k 3k 3k 3k 3k 3k 3k 3k 3k 3k 3k
Package Type SC70-5 SOT-23-5 SC70-5 SOT-23-5 SC70-5 SOT-23-5 SC70-5 SOT-23-5 SC70-5 SOT-23-5 SC70-5 SC70-5
Branding N07 N07 N07 N07 N07 N07 N07 N07 N07 N07 N07 N07
ADM823/ADM824/ADM825
Table 6. ADM824 Ordering Guide
Model1 ADM824LYKS-R7 ADM824LYRJ-R7 ADM824MYKS-R7 ADM824MYRJ-R7 ADM824TYKS-R7 ADM824TYRJ-R7 ADM824SYKS-R7 ADM824SYRJ-R7 ADM824RYKS-R7 ADM824RYRJ-R7 ADM824ZYKS-R7 ADM824YYKS-R7 Reset Threshold (V) 4.63 4.63 4.38 4.38 3.08 3.08 2.93 2.93 2.63 2.63 2.32 2.19 Temperature Range -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C Quantity 3k 3k 3k 3k 3k 3k 3k 3k 3k 3k 3k 3k Package Type SC70-5 SOT-23-5 SC70-5 SOT-23-5 SC70-5 SOT-23-5 SC70-5 SOT-23-5 SC70-5 SOT-23-5 SC70-5 SC70-5 Branding N08 N08 N08 N08 N08 N08 N08 N08 N08 N08 N08 N08
1
All of the ADM824 models are nonstandard. For availability of alternate versions, contact Sales.
Table 7. ADM825 Ordering Guide
Model ADM825LYKS-R7 ADM825LYRJ-R7 ADM825MYKS-R7 ADM825MYRJ-R7 ADM825TYKS-R7 ADM825TYRJ-R7 ADM825SYKS-R7 ADM825SYRJ-R7 ADM825RYKS-R7 ADM825RYRJ-R7 ADM825ZYKS-R7 ADM825YYKS-R7 Reset Threshold (V) 4.63 4.63 4.38 4.38 3.08 3.08 2.93 2.93 2.63 2.63 2.32 2.19 Temperature Range -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C Quantity 3k 3k 3k 3k 3k 3k 3k 3k 3k 3k 3k 3k Package Type SC70-5 SOT-23-5 SC70-5 SOT-23-5 SC70-5 SOT-23-5 SC70-5 SOT-23-5 SC70-5 SOT-23-5 SC70-5 SC70-5 Branding N09 N09 N09 N09 N09 N09 N09 N09 N09 N09 N09 N09
(c) 2004 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D04534-0-10/04(0)
Rev. 0 | Page 12 of 12


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