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NTMFS4943N Power MOSFET
Features
30 V, 41 A, Single N-Channel, SO-8 FL
* * * *
Low RDS(on) to Minimize Conduction Losses Low Capacitance to Minimize Driver Losses Optimized Gate Charge to Minimize Switching Losses These Devices are Pb-Free, Halogen Free/BFR Free and are RoHS Compliant
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V(BR)DSS 30 V RDS(ON) MAX 7.2 mW @ 10 V 11 mW @ 4.5 V D (5,6) ID MAX 41 A
Applications
* CPU Power Delivery * DC-DC Converters
MAXIMUM RATINGS (TJ = 25C unless otherwise stated)
Parameter Drain-to-Source Voltage Gate-to-Source Voltage Continuous Drain Current RqJA (Note 1) Power Dissipation RqJA (Note 1) Continuous Drain Current RqJA 10 s (Note 1) Power Dissipation RqJA 10 s (Note 1) Continuous Drain Current RqJA (Note 2) Power Dissipation RqJA (Note 2) Continuous Drain Current RqJC (Note 1) Power Dissipation RqJC (Note 1) Pulsed Drain Current Steady State TA = 25C TA = 100C TA = 25C TA = 25C TA = 100C TA = 25C TA = 25C TA = 100C TA = 25C TC = 25C TC = 85C TC = 25C TA = 25C, tp = 10 ms TA = 25C PD IDM IDmax TJ, TSTG IS dV/dt EAS PD ID PD ID PD ID Symbol VDSS VGS ID Value 30 20 14 8.7 2.6 23 14.3 6.83 W W A Unit V V A G (4)
S (1,2,3) N-CHANNEL MOSFET
MARKING DIAGRAM
D
1
8.3 5.2 0.91 41 26 22.3 125 100 -55 to +150 20 8.0 31
A
W A
SO-8 FLAT LEAD CASE 488AA STYLE 1
S S S G
4943N AYWWG G D
D
D
W A A C A V/ns mJ
A = Assembly Location Y = Year WW = Work Week G = Pb-Free Package (Note: Microdot may be in either location)
Current Limited by Package Operating Junction and Storage Temperature Source Current (Body Diode) Drain to Source DV/DT
ORDERING INFORMATION
Device NTMFS4943NT1G NTMFS4943NT3G Package SO-8 FL (Pb-Free) SO-8 FL (Pb-Free) Shipping 1500 / Tape & Reel 5000 / Tape & Reel
Single Pulse Drain-to-Source Avalanche Energy TJ = 25C, VDD = 30 V, VGS = 10 V, IL = 25 Apk, L = 0.1 mH, RG = 25 W Lead Temperature for Soldering Purposes (1/8 from case for 10 s)
TL
260
C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. Surface-mounted on FR4 board using 1 sq-in pad, 1 oz Cu. 2. Surface-mounted on FR4 board using the minimum recommended pad size.
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.
(c) Semiconductor Components Industries, LLC, 2009
September, 2009 - Rev. 1
1
Publication Order Number: NTMFS4943N/D
NTMFS4943N
THERMAL RESISTANCE MAXIMUM RATINGS
Parameter Junction-to-Case (Drain) Junction-to-Ambient - Steady State (Note 3) Junction-to-Ambient - Steady State (Note 4) Junction-to-Ambient - (t 10 s) (Note 3) 3. Surface-mounted on FR4 board using 1 sq-in pad, 1 oz Cu. 4. Surface-mounted on FR4 board using the minimum recommended pad size. Symbol RqJC RqJA RqJA RqJA Value 5.6 49.1 137.2 18.3 C/W Unit
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ELECTRICAL CHARACTERISTICS (TJ = 25C unless otherwise specified)
Parameter OFF CHARACTERISTICS Drain-to-Source Breakdown Voltage Drain-to-Source Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current V(BR)DSS V(BR)DSS/ TJ IDSS IGSS VGS(TH) VGS(TH)/TJ RDS(on) VGS = 10 V VGS = 4.5 V Forward Transconductance gFS CISS COSS CRSS QG(TOT) QG(TH) QGS QGD QG(TOT) td(ON) tr td(OFF) tf VGS = 4.5 V, VDS = 15 V, ID = 15 A, RG = 3.0 W VGS = 10 V, VDS = 15 V; ID = 30 A VGS = 4.5 V, VDS = 15 V; ID = 30 A VGS = 0 V, f = 1 MHz, VDS = 15 V ID = 30 A ID = 15 A ID = 30 A ID = 15 A VDS = 1.5 V, ID = 15 A CHARGES, CAPACITANCES & GATE RESISTANCE Input Capacitance Output Capacitance Reverse Transfer Capacitance Total Gate Charge Threshold Gate Charge Gate-to-Source Charge Gate-to-Drain Charge Total Gate Charge SWITCHING CHARACTERISTICS (Note 6) Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time 11 31 18 3.0 ns 1401 446 16 9.2 2.7 4.4 1.9 20.9 nC nC pF VGS = 0 V, VDS = 24 V TJ = 25C TJ = 125C VGS = 0 V, ID = 250 mA 30 15 1.0 10 100 V mV/C mA nA Symbol Test Condition Min Typ Max Unit
Gate-to-Source Leakage Current ON CHARACTERISTICS (Note 5) Gate Threshold Voltage Negative Threshold Temperature Coefficient Drain-to-Source On Resistance
VDS = 0 V, VGS = 20 V VGS = VDS, ID = 250 mA 1.2 1.66 4.0 5.8 5.8 8.2 8.2 32
2.2
V mV/C
7.2 mW
11
S
5. Pulse Test: pulse width v 300 ms, duty cycle v 2%. 6. Switching characteristics are independent of operating junction temperatures.
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NTMFS4943N
ELECTRICAL CHARACTERISTICS (TJ = 25C unless otherwise specified)
Parameter SWITCHING CHARACTERISTICS (Note 6) Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time DRAIN-SOURCE DIODE CHARACTERISTICS Forward Diode Voltage VSD tRR ta tb QRR LS LD LG RG TA = 25C VGS = 0 V, dIS/dt = 100 A/ms, IS = 30 A VGS = 0 V, IS = 30 A TJ = 25C TJ = 125C 0.9 0.8 23 12.5 10.5 10 nC ns 1.1 V td(ON) tr td(OFF) tf VGS = 10 V, VDS = 15 V, ID = 15 A, RG = 3.0 W 8.0 21 21 2.1 ns Symbol Test Condition Min Typ Max Unit
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Reverse Recovery Time Charge Time Discharge Time Reverse Recovery Charge PACKAGE PARASITIC VALUES Source Inductance Drain Inductance Gate Inductance Gate Resistance
0.93 0.005 1.84 1.1 2.0
nH nH nH W
5. Pulse Test: pulse width v 300 ms, duty cycle v 2%. 6. Switching characteristics are independent of operating junction temperatures.
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NTMFS4943N
TYPICAL CHARACTERISTICS
80 70 ID, DRAIN CURRENT (A) 80 3.8 V ID, DRAIN CURRENT (A) 3.6 V 3.4 V 3.2 V 3.0 V 2.8 V 2.6 V 2.4 V 0 1 2 3 4 VDS, DRAIN-TO-SOURCE VOLTAGE (V) 70 60 50 40 30 20 10 0 1.0 1.5 TJ = 125C TJ = -55C 2.0 2.5 3.0 3.5 4.0 VGS, GATE-TO-SOURCE VOLTAGE (V) TJ = 25C VDS = 10 V
10 V 7V 4.2 V
4.0 V
TJ = 25C
60 4.5 V 50 40 30 20 10 0
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Figure 1. On-Region Characteristics
RDS(on), DRAIN-TO-SOURCE RESISTANCE (W) 0.014 0.013 0.012 0.011 0.010 0.009 0.008 0.007 0.006 0.005 3.0 4.0 5.0 6.0 7.0 8.0 9.0 ID = 30 A TJ = 25C RDS(on), DRAIN-TO-SOURCE RESISTANCE (W) 0.012 0.011 0.010 0.009 0.008 0.007 0.006 0.005 0.004 20
Figure 2. Transfer Characteristics
TJ = 25C
VGS = 4.5 V
VGS = 10 V
10
30
40
50
60
70
80
VGS (V)
ID, DRAIN CURRENT (A)
Figure 3. On-Resistance vs. VGS
1.9 1.8 ID = 30 A 1.7 VGS = 10 V 1.6 1.5 1.4 1.3 1.2 1.1 1.0 0.9 0.8 0.7 0.6 -50 -25 0 10,000
Figure 4. On-Resistance vs. Drain Current and Gate Voltage
VGS = 0 V TJ = 150C
RDS(on), DRAIN-TO-SOURCE RESISTANCE (NORMALIZED)
IDSS, LEAKAGE (nA)
1000 TJ = 125C 100 TJ = 85C
25
50
75
100
125
150
10
5
10
15
20
25
30
TJ, JUNCTION TEMPERATURE (C)
VDS, DRAIN-TO-SOURCE VOLTAGE (V)
Figure 5. On-Resistance Variation with Temperature
Figure 6. Drain-to-Source Leakage Current vs. Voltage
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NTMFS4943N
TYPICAL CHARACTERISTICS
1800 1600 C, CAPACITANCE (pF) 1400 1200 1000 800 600 400 200 0 0 5 10 Crss 15 20 25 30 VDS, DRAIN-TO-SOURCE VOLTAGE (V) Coss Ciss VGS = 0 V TJ = 25C 11 10 9 8 7 6 5 4 3 2 1 0 Qgs Qgd VDD = 15 V VGS = 10 V ID = 30 A 4 6 8 10 12 14 16 18 20 TJ = 25C
VGS, GATE-TO-SOURCE VOLTAGE (V)
QT
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0
2
Qg, TOTAL GATE CHARGE (nC)
Figure 7. Capacitance Variation
1000 IS, SOURCE CURRENT (A) VDD = 15 V ID = 15 A VGS = 10 V t, TIME (ns) 100 30
Figure 8. Gate-to-Source and Drain-to-Source Voltage vs. Total Charge
VGS = 0 V 25 20 15 10 5 0 0.4 TJ = 25C 0.5 0.6 0.7 0.8 0.9 1.0 td(off) tf tr td(on)
TJ = 125C
10
1
1
10 RG, GATE RESISTANCE (W)
100
VSD, SOURCE-TO-DRAIN VOLTAGE (V)
Figure 9. Resistive Switching Time Variation vs. Gate Resistance
VGS = 20 V Single Pulse TC = 25C EAS, SINGLE PULSE DRAIN-TO- SOURCE AVALANCHE ENERGY (mJ) 1000 35 30 25 20 15 10 5 0
Figure 10. Diode Forward Voltage vs. Current
ID = 25 A
ID, DRAIN CURRENT (A)
100
10
100 ms 1 ms
1
10 ms RDS(on) Limit Thermal Limit Package Limit 0.1 1 10 dc
0.1
100
25
50
75
100
125
150
VDS, DRAIN-TO-SOURCE VOLTAGE (V)
TJ, STARTING JUNCTION TEMPERATURE (C)
Figure 11. Maximum Rated Forward Biased Safe Operating Area
Figure 12. Maximum Avalanche Energy vs. Starting Junction Temperature
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NTMFS4943N
TYPICAL CHARACTERISTICS
100 Duty Cycle = 50% 20% 10% 5% 2% 1% 0.1 Single Pulse 0.01 0.000001 0.00001 0.0001 0.001 0.01 PULSE TIME (sec) 0.1 1 10 100 1000
10 R(t) (C/W)
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Figure 13. Thermal Response
70 60 50 GFS (S) 40 30 20 10 0 0 10 20 30 40 ID (A) 50 60 70 80
Figure 14. GFS vs. ID
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NTMFS4943N
PACKAGE DIMENSIONS
DFN5 5x6, 1.27P (SO8 FL) CASE 488AA-01 ISSUE D
2X NOTES: 1. DIMENSIONING AND TOLERANCING PER www..com ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION D1 AND E1 DO NOT INCLUDE MOLD FLASH PROTRUSIONS OR GATE BURRS.
0.20 C D 2 D1 A B
2X
0.20 C E1 2 E c
4X
q
A1
1
2
3
4
TOP VIEW
3X
C
SEATING PLANE
0.10 C A 0.10 C SIDE VIEW
8X
e
DETAIL A
DIM A A1 b c D D1 D2 E E1 E2 e G K L L1 M q
MILLIMETERS MIN NOM MAX 0.90 1.00 1.10 0.00 --- 0.05 0.33 0.41 0.51 0.23 0.28 0.33 5.15 BSC 4.50 4.90 5.10 3.50 --- 4.22 6.15 BSC 5.50 5.80 6.10 3.45 --- 4.30 1.27 BSC 0.51 0.61 0.71 0.51 --- --- 0.51 0.61 0.71 0.05 0.17 0.20 3.00 3.40 3.80 0_ --- 12 _
SOLDERING FOOTPRINT*
DETAIL A 1.270
STYLE 1: PIN 1. SOURCE 2. SOURCE 3. SOURCE 4. GATE 5. DRAIN 6. DRAIN 3X
b e/2
1 4
0.750
4X
1.000
4X
0.10 0.05
CAB c L
0.965 1.330 0.495
2X
K E2 L1
0.905 4.530 0.475
2X
2X
PIN 5 (EXPOSED PAD)
M
3.200
G
D2 BOTTOM VIEW
1.530 4.560 *For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
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NTMFS4943N/D

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