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UNISONIC TECHNOLOGIES CO., LTD PA3202
2-W STEREO AUDIO POWER AMPLIFIER WITH MUTE
DESCRIPTION
The UTC PA3202 is a monolithic integrated circuit that stereo bridged audio power amplifiers capable of producing 2 W into 3 with a 5V supply voltage or 800mW into 3 with a 3.3V supply voltage .The UTC PA3202 simplifies design and frees up board space for other features. Both of the depop circuitry and the thermal shutdown protection circuitry are integrated in UTC PA3202, that reduce clicks and pops noise during power up or shutdown mode operation. A MUX control terminal (HP/LINE) allows selection between the two sets of stereo input signals. To simplify the audio system design, UTC PA3202 combines a stereo bridge-tied loads (BTL)mode for speaker drive and a stereo single-end (SE)mode for headphone drive into a single chip, where both modes are easily switched by the SE/BTL input control pin signal.
CMOS IC
HTSSOP-24
*Pb-free plating product number: PA3202L
FEATURES
* Improves depop circuitry to eliminate turn-on and turn-off transients in output * Output power: -2W(typ.)@5V into 3 with 0.2% THD+N max (1kHz) -800mW(typ.)@3.3V into 3 with 0.2% THD+N max (1kHz) * Fully specified for use with 3- Loads * Stereo switchable bridged/single-ended power amplifiers * Input MUX select terminal * Thermal-shutdown protection * Shutdown mode available
ORDERING INFORMATION
Ordering Number Normal Lead Free Plating PA3202-N24-R PA3202L-N24-R PA3202-N24-T PA3202L-N24-T Package HTSSOP-24 HTSSOP-24 Packing Tape Reel Tube
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PIN CONFIGURATION
GND/HS TJ LOUT+ LLINEIN LHPIN LBYPASS LVDD SHUTDOWN MUTE OUT LOUTMUTE IN GND/HS 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 GND/HS NC ROUT+ RLINEIN RHPIN RBYPASS RVDD NC HP/LINE ROUTSE/BTL GND/HS
CMOS IC
PIN DESCRIPTION
PIN NO 1, 12, 13, 24 6 17, 23 19 4 5 7 8 9 11 14 16 18 20 21 2 3 10 22 15 PIN NAME GND/HS LBYPASS NC RBYPASS LLINE IN LHP IN LVDD SHUTDOWN MUTE OUT MUTE IN SE/BTL HP/LINE RVDD RHPIN RLINEIN TJ LOUT+ LOUTROUT+ ROUTI/O DESCRIPTION Power ground; directly connected to thermal pad. Tap to left channel internal mid-supply voltage divider bias No connection Tap to right channel internal mid-supply voltage divider bias Left channel line input; selected when HP/LINE is held low Left channel headphone input; selected when HP/LINE is held high Left channel power supply and for primary bias circuits Places entire IC in shutdown mode when held high, IDD = 5A Follows MUTE IN, provides buffered output Mute all amplifiers input; high active to mute amplify, low active to normal operation SE & BTL mode selection; active high for SE mode, active low for BTL mode MUX control input, active high to select headphone input, active low to select line input Right channel power supply Right channel headphone input, selected when HP/LINE is held high Right channel line input, selected when HP/LINE is held low Sources current proportional to the junction temperature. Left floating for normal operation. Left channel + output in BTL & SE mode Left channel - output in BTL mode & high-impedance in SE mode Right channel + output in BTL & SE mode Right channel - output in BTL mode & high impedance in SE mode
I I I I I I I I I I I O O O O O
UNISONIC TECHNOLOGIES CO., LTD
www.unisonic.com.tw
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BLOCK DIAGRAM
CMOS IC
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ABSOLUTE MAXIMUM RATINGS (unless otherwise specified)
CMOS IC
PARAMETER SYMBOL RATINGS UNIT Supply Voltage VDD 6 V Input Voltage VIN -0.3~VDD ~+0.3 V Continuous Total Power Dissipation PD Internally limited Junction Temperature TJ +150 Operating Temperature TOPR -40 ~ +85 Storage Temperature TSTG -65 ~ +150 Note: Absolute maximum ratings are those values beyond which the device could be permanently damaged. Absolute maximum ratings are stress ratings only and functional device operation is not implied.
RECOMMENDED OPERATING CONDITIONS
PARAMETER Supply Voltage SYMBOL VDD 4- stereo BTL VDD = 5 V, drive, 250 mW/ch with proper PCB average power, design 3- stereo BTL VDD = 5 V, drive, 2 W/ch average with proper PCB power, design VDD=5V VDD=3.3V MIN 3 -40 NOM 5 MAX UNIT 5.5 V 85
Operating Temperature
TOPR
-40 1.25 1.25
85 4.5 2.7
Common Mode Input Voltage
VICM
V
DC ELECTRICAL CHARACTERISTICS (TA = 25 )
PARAMETER SYMBOL TEST CONDITIONS Stereo BTL Stereo SE VDD=5V Mono BTL Mono SE Stereo BTL Stereo SE VDD=3.3V Mono BTL Mono SE MIN TYP(1) 19 9 9 3 13 5 5 3 5 1 5 MAX 30 18 18 10 20 10 10 6 25 19 UNIT mA
Supply Current
IDD
mA
Output Offset Voltage VO(OFF) VDD = 5 V, Gain = 2, See Note 1 (Measured Differentially) Supply Current in Mute Mode IDD(MUTE) VDD=5V IDD in Shutdown IDD(SD) VDD=5V Note 1. At 3 V < VDD < 5 V the dc output voltage is approximately VDD/2.
mV mA A
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AC OPERATING CHARACTERISTICS
VDD = 5 V, TA = 25 , RL = 3 PARAMETER SYMBOL TEST CONDITIONS Output Power (Each Channel) See THD =0.2% BTL POUT Note 2 THD =1% BTL Total Harmonic Distortion Plus POUT = 2 W, f = 20 ~20 kHz TDH+N Noise VIN = 1V, RL=10K, AV=1V/V Maximum Output Power Bandwidth BW AV = 10 V/V ,THD < 1 %, Phase Margin RL = 4 , Open Loop, f = 1 kHz Supply Ripple Rejection Ratio RR f = 20~20kHz, Mute Attenuation Channel-to-Channel Output f = 1 kHz Separation Line/HP Input Separation BTL Attenuation in SE Mode Input Impedance ZIN Signal-to-Noise Ratio POUT =500mW, BTL Output Noise Voltage eN VDD = 3.3 V, TA = 25 , RL = 3 PARAMETER SYMBOL TEST CONDITIONS Output Power ( Each Channel) See THD =0.2% BTL POUT Note 2 THD =1% BTL Total Harmonic Distortion Plus POUT = 800mW, f = 20 ~20 kHz TDH+N Noise VIN = 1V, RL=10K, AV=1V/V Maximum Output Power Bandwidth BW AV = 10 V/V, THD < 1 %, Phase Margin RL = 4 , Open Loop f = 1 kHz Supply Ripple Rejection Ratio RR f = 20~20kHz, Mute Attenuation Channel-to-Channel Output f = 1 kHz Separation Line/HP Input Separation BTL Attenuation in SE Mode Input Impedance ZIN Signal-to-Noise Ratio POUT =500mW, BTL Output Noise Voltage eN Note 2. Output power is measured at the output terminals of the IC at 1 kHz. MIN TYP 2 2.2 200 100 >20 85 80 60 85 85 100 100 2 95 21 MIN TYP 800 900 350 200 >20 85 70 55 85 85 100 100 2 95 21
CMOS IC
MAX
UNIT W m% m% KHz dB dB dB dB dB M dB V(RMS)
MAX
UNIT mW m% m% KHz dB dB dB dB dB M dB V(RMS)
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TYPICAL APPLICATION CIRCUIT
RFR 50K
CMOS IC
CFR 5pF RIR 10K CIR 1F NC RLINEIN RHPIN
Right MUX
ROUT+ ROUTRVDD V DD CS 0.1 F 100K ( see Note ) SE/BTL 100K HP/ LINE Bias, Thermal Shutdown LVDD VDD 1K C OUTL 330 F 0.1 F C OUTR 330 F 1K
RBYPASS CB 1F System Control MUTE IN MUTE OUT SHUTDOWN Logic Control
LBYPASS
CIL 1F RIL 10K
NC
LHPIN LLINEIN Left MUX
LOUT+ LOUT-
RFL 50K
CFL 5pF Note : 0. 1 F ceramic capacitor should be placed as close as possible to the IC. For filtering lower frequency noise signals, a larger aluminum electrolytic capacitor of 10 F or greater should be placed near the audio power amplifier . PA3202 Minimum Configuration Application Circuit
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TYPICAL APPLICATION CIRCUIT
CMOS IC
RFRHP 10K RFRLINE 50K CFRLINE 5pF CIRLINE RIR LINE 1F 10K
RLINEIN RHPIN Right MUX
ROUT+ ROUTRVDD VDD CSR 0.1F 100K (see Note 2) SE/BTL 100K HP/LINE Bias, Thermal Shutdown LVDD 0.1F COUTR 330F 1K
CIRHP 1F
RIRHP 10K
RBYPASS CBR 0.1F MUTE IN MUTE OUT Logic Control
System Control
see Note 1 SHUTDOWN
CILHP R ILHP 1F 10K
LBYPASS CBL 1F LHPIN LLINEIN Left MUX LOUT+ LOUT-
VDD CSR 0.1F (see Note 2)
1K COUTL 330F
CILLINE 1F
RILLINE 10K RFLLINE 50K CFLLINE 5pF RFLHP 10K Note:1. This connection is for ultra-low current in shutdown mode. 2. A 0.1 F ceramic capacitor should be placed as close as possible to the IC. For filtering lowerfrequency noise signals, a larger aluminum electrolytic capacitor of 10 F or greater should be placed near the audio power amplifier. PA3202 Full Configuration Application Circuit
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TYPICAL CHARACTERISTICS
CMOS IC
THD+N -Total Harmonic Distortion + Noise (%)
THD+N -Total Harmonic Distortion + Noise (%)
Total Harmonic Distortion Plus Noise vs Frequency 10 VDD=5V RL=32 SE 1
THD+N -Total Harmonic Distortion + Noise (%) Total Harmonic Distortion Plus Noise vs Output Power 10 VDD=5V RL=32 SE 1 f=20KHz 0.1 0.1 f=20Hz 0.01 0.001 POUT=75mW POUT=20mW
THD+N -Total Harmonic Distortion + Noise (%)
0.01 20
POUT=25mW 100 1K 10K 20K Frequency, f (Hz)
f=1KHz 1
0.01 0.1 Output Power, POUT (W)
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Crosstalk (dB) Supply Ripple Rejection Ratio (dB) Output Noise Voltage, Vn (v) (rms)
TYPICAL CHARACTERISTICS(Cont.)
UNISONIC TECHNOLOGIES CO., LTD
Crosstalk (dB) Supply Ripple Rejection Ratio (dB)
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Gain (dB)
CMOS IC
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Phase
PA3202
TYPICAL CHARACTERISTICS(Cont.)
CMOS IC
Output Power, POUT (W)
Power Dissipation vs Output Power 0.8 Power Dissipation, PD (W) Power Dissipation, PD (W) 0.6
Power Dissipation, PD (W)
Output Power, PD (W)
Output Power, POUT (W)
Power Dissipation vs Output Power
0.6
RL=4
0.4
RL=4
0.4
RL=8
RL=8 0.2 VDD=3.3V SE Each Channel 0.25
0.2
RL=32
0 0
VDD=5V SE Each Channel
0 0
RL=32
0.1 0.2 0.3 0.4 0.5 0.6 Output Power, POUT (W)
0.05 0.1 0.15 0.2 Output Power, POUT (W)
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CMOS IC
UTC assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all UTC products described or contained herein. UTC products are not designed for use in life support appliances, devices or systems where malfunction of these products can be reasonably expected to result in personal injury. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice.
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www.unisonic.com.tw
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