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Micrel, Inc.
Precision Edge 5GHz, 1:2 LVPECL FANOUT SY58012U Precision Edge(R) BUFFER/TRANSLATOR SY58012U WITH INTERNAL INPUT TERMINATION
(R)
FEATURES
Precision 1:2, 800mV LVPECL fanout buffer Guaranteed AC performance over temperature/ voltage: * > 5GHz fMAX (clock) * < 110ps tr / tf times * < 260ps tpd * < 15ps max skew Low jitter performance * < 10psPP total jitter (clock) * < 1psRMS random jitter (data) * < 10psPP deterministic jitter (data) Accepts an input signal as low as 100mV Unique input termination and VT pin accepts DCand AC-coupled differential inputs: LVPECL, LVDS, and CML Outputs are 100k LVPECL compatible, 800mV swing Power supply 2.5V 5% and 3.3V 10% -40C to +85C temperature range Available in 16-pin (3mm x 3mm) MLF(R) package Precision Edge(R)
DESCRIPTION
The SY58012U is a 2.5V/3.3V precision, high-speed, fully differential 1:2 LVPECL fanout buffer. Optimized to provide two identical output copies with less than 15ps of skew and less than 10ps(pk-pk) total jitter, the SY58012U can process clock signals as fast as 5GHz or 5Gbps data. The differential input includes Micrel's unique, 3-pin input termination architecture that interfaces to LVPECL, LVDS or CML differential signals, (AC-coupled or DC-coupled) as small as 100mV without any level-shifting or termination resistor networks in the signal path. For AC-coupled input interface applications, an on-board output reference voltage (VREF-AC) is provided to bias the VT pin. The outputs are 100k LVPECL compatible, with extremely fast rise/fall times guaranteed to be less than 110ps. The SY58012U operates from a 2.5V 5% supply or 3.3V 10% supply and is guaranteed over the full industrial temperature range (-40C to +85C). For applications that require faster rise/fall times, or greater bandwidth, consider the SY58013U 1:2 fanout buffer with 400mV output swing, or the SY58011 1:2 CML (400mV) fanout buffer. The SY58012U is part of Micrel's high-speed, Precision Edge(R) product line. Data sheets and support documentation can be found on Micrel's web site at www.micrel.com.
APPLICATIONS
s s s s All SONET and GigE clock distribution Fibre Channel clock and data distribution Backplane distribution High-end, low skew, multiprocessor synchronous clock distribution
FUNCTIONAL BLOCK DIAGRAM
TYPICAL PERFORMANCE
2.5GHz Output
VCC = 3.3V
IN 50 VT 50 /IN VREF-AC
TIME (50ps/div.)
/Q0
Q1 /Q1
Output Swing (200mV/div.)
Q0
2GHz with 100mV Input
Precision Edge is registered trademark of Micrel, Inc. MicroLeadFrame and MLF are registered trademarks of Amkor Technology, Inc. M9999-051408 hbwhelp@micrel.com or (408) 955-1690
Rev.: F Amendment: /0
1
Issue Date: May 2008
Micrel, Inc.
Precision Edge(R) SY58012U
PACKAGE/ORDERING INFORMATION
GND GND VCC VCC
Ordering Information(1)
Part Number
12 11 10 9
16
15
14
13
Package Type MLF-16 MLF-16 MLF-16 MLF-16
Operating Range Industrial Industrial Industrial Industrial
Package Marking 012U 012U 012U with Pb-Free bar-line indicator 012U with Pb-Free bar-line indicator
Lead Finish Sn-Pb Sn-Pb Pb-Free NiPdAu Pb-Free NiPdAu
IN VT VREF-AC /IN
1 2 3 4 5 6 7 8
Q0 /Q0 /Q1 Q1
SY58012UMI SY58012UMITR(2) SY58012UMG(3) SY58012UMGTR(2, 3)
GND
VCC
GND
VCC
16-Pin MLF(R) (MLF-16)
Notes: 1. Contact factory for die availability. Dice are guaranteed at TA = 25C, DC electricals only. 2. Tape and Reel. 3. Pb-Free package recommended for new designs.
PIN DESCRIPTION
Pin Number 1, 4 Pin Name IN, /IN Pin Function Differential Input: This input pair is the signal to be buffered. Each pin of this pair internally terminates with 50 to the VT pin. Note that this input will default to an indeterminate state if left open. See "Input Interface Applications" section. Input Termination Center-Tap: Each input terminates to this pin. The VT pin provides a center-tap for each input (IN, /IN) to a termination network for maximum interface flexibility. See "Input Interface Applications" section. Reference Output Voltage: This output biases to VCC -1.2V. It is used when AC-coupling the inputs (IN, /IN). Connect VREF-AC directly to the VT pin. Bypass with 0.01F low ESR capacitor to VCC. Maximum current source or sink is 0.5mA. See "Input Interface Applications" section. Positive Power Supply: Bypass with 0.1F//0.01F low ESR capacitors as close to the VCC pins as possible. Ground. Exposed pad must be connected to a ground plane that is the same potential as the ground pin. LVPECL Differential Output Pairs: Differential buffered output copy of the input signal. The output swing is typically 800mV. Unused output pairs may be left floating with no impact on jitter. See "LVPECL Output Termination" section.
2
VT
3
VREF-AC
5, 8, 13, 16 6, 7, 14, 15 12, 11 9, 10
VCC GND, Exposed Pad Q0, /Q0, Q1, /Q1
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Micrel, Inc.
Precision Edge(R) SY58012U
Absolute Maximum Ratings(Note 1)
Power Supply Voltage (VCC ) ...................... -0.5V to +4.0V Input Voltage (VIN) ......................................... -0.5V to VCC LVPECL Output Current (IOUT) Continuous ............................................................. 50mA Surge .................................................................... 100mA Source or sink current on VT pin VT Current .......................................................... 100mA Source or sink current on IN, /IN Input Current ........................................................ 50mA Source or sink current on VREF-AC, Note 4 VREF Current ....................................................... 1.5mA Soldering, (20 seconds) ............................................ 260C Storage Temperature Range (TSTORE ) ... -65C to +150C
Operating Ratings(Note 2)
Power Supply Voltage (VCC) ..................... 2.375V to 3.60V Operating Temperature Range (TA) ........... -40C to +85C Package Thermal Resistance, Note 3 MLF(R) (JA) Still-Air ............................................................. 60C/W 500 lpfm ........................................................... 54C/W MLF(R) (JB) .......................................................... 33C/W
INPUT DC ELECTRICAL CHARACTERISTICS(Note 5)
Symbol VCC ICC VIH VIL VIN VDIFF_IN RIN IN to VT VREF-AC Output Reference Voltage VCC-1.3 VCC -1.2 Parameter Power Supply Voltage Power Supply Current Input HIGH Voltage Input LOW Voltage Input Voltage Swing Differential Input Voltage Swing In to VT Resistance Max. VCC, no load IN, /IN, Note 6 IN, /IN IN, /IN; see Figure 1a IN,/IN; see Figure 1b VCC-1.6 0 0.1 0.2 40 50 60 1.28 VCC-1.1 Condition Min 2.375 55 Typ Max 3.60 80 VCC VIH -0.1 1.7 Units V mA V V V V V V
LVPECL OUTPUT DC ELECTRICAL CHARACTERISTICS(Note 5)
VCC = 3.3V 10% or 2.5 5%; RL= 50 to VCC-2V; TA= -40C to 85C, unless otherwise stated. Symbol VOH VOL VOUT VDIFF_OUT
Note 1.
Parameter Output HIGH Voltage Output LOW Voltage Output Voltage Swing Differiential Output Voltage Swing
Condition Q0, /Q0, Q1, /Q1 Q0, /Q0, Q1, /Q1 Q0, /Q0, Q1, /Q1; see Figure 1a Q0, /Q0, Q1, /Q1; see Figure 1b
Min VCC-1.145 VCC-1.945 550 1100
Typ
Max VCC-0.895 VCC-1.695
Units V V mV mV
800 1600
Permanent device damage may occur if absolute maximum ratings are exceeded. This is a stress rating only and functional operation is not implied at conditions other than those detailed in the operational sections of this data sheet. Exposure to absolute maximum ratings conditions for extended periods may affect device reliability The data sheet limits are not guaranteed if the device is operated beyond the operating ratings. Thermal performance assumes exposed pad is soldered (or equivalent) to the device's most negative potential on the pcb. Due to the limited drive capability, use for input of the same package only. The circuit is designed to meet the dc specifications shown in the above table after thermal equilibrium has been established. VIH (min) not lower than 1.2V.
Note 2. Note 3. Note 4. Note 5. Note 6.
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Micrel, Inc.
Precision Edge(R) SY58012U
AC ELECTRICAL CHARACTERISTICS(Note 7)
VCC = 2.5V 5% or 3.3V 10%; TA = -40C to +85C; RL = 50 to VCC-2V, unless otherwise stated. Symbol fMAX tpd tCHAN tSKEW tJITTER Parameter Maximum Operating Frequency VOUT 400mV Propagation Delay Channel-to-Channel Skew Part-to-Part Skew Data Clock tr, tf
Note 7. Note 8. Note 9.
Condition NRZ Data Clock
Min
Typ 5
Max
Units Gbps GHz
5 110 170 3 260 15 100 1 10 1 10 35 80 110
VIN 100mV Note 8 Note 9 Note 10 Note 11 Note 12 Note 13 20% to 80% at full output swing
ps ps ps psRMS psPP psRMS psPP ps
Random Jitter (RJ) Deterministic Jitter (DJ) Cycle-to-Cycle Jitter Total Jitter (TJ)
Output Rise/Fall Time
High frequency AC Electricals are guaranteed by design and characterization. Skew is measured between outputs of the same bank under identical transitions. Skew is defined for two parts with identical power supply voltages at the same temperature and with no skew of the edges at the respective inputs.
Note 10. RJ is measured with a K28.7 comma detect character pattern, measured at 10.7Gbps and 2.5Gbps/3.2Gbps. Note 11. DJ is measured at 10.7Gbps and 2.5Gbps/3.2Gbps with both K28.5 and 223-1 PRBS pattern Note 12. Cycle-to-cycle jitter definition: The variation of periods between adjacent cycles, Tn-Tn-1 where T is the time between rising edges of the output signal. Note 13. Total jitter definition: With an ideal clock input of frequency fMAX, no more than one output edge in 1012 output edges will deviate by more than the specified peak-to-peak jitter value.
TIMING DIAGRAM
/IN IN
/Q Q tpd
SINGLE-ENDED AND DIFFERENTIAL SWINGS
VIN, VOUT
Typ. 800mV
VDIFF_IN, VDIFF_OUT Typ. 1.6V
Figure 1a. Single-Ended Voltage Swing
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Figure 1b. Differential Voltage Swing
4
Micrel, Inc.
Precision Edge(R) SY58012U
TYPICAL OPERATING CHARACTERISTICS
VCC = 3.3V, GND = 0, VIN = 100mV, TA = 25C, unless otherwise stated.
Frequency vs. Amplitude
700
10 WITHIN-DEVICE SKEW (ps) 9 8 7 6 5 4 3 2
Within-Device Skew vs. Temperature
800
AMPLITUDE (mV)
600 500 400 300 200 100
1000
2000
3000
4000
5000
6000
7000
8000
FREQUENCY (MHz)
190
Propagation Delay vs. Input Voltage Swing
PROPAGATION DELAY (ps)
9000
0
0
1 0 -40 -20 0 20 40 60 80 100 TEMPERATURE (C)
185 180 175 170 165 160 155 0 200 400 600 800 1000 INPUT VOLTAGE SWING (V)
195 190 185 180 175 170 165 160 155 150 145 140 135 -40 -20 0 20 40 60 80 100 TEMPERATURE (C)
Propagaton Delay vs. Temperature
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PROPAGATION DELAY (ps)
5
Micrel, Inc.
Precision Edge(R) SY58012U
FUNCTIONAL CHARACTERISTICS
VCC = 3.3V, GND = 0, VIN = 100mV, TA = 25C, unless otherwise stated.
200MHz Output
5GHz Output
Output Swing (200mV/div.)
Output Swing (100mV/div.)
TIME (600ps/div.)
TIME (25ps/div.)
5Gbps Output
Output Swing (150mV/div.)
TIME (50ps/div.)
(223-1 PRBS Pattern)
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Micrel, Inc.
Precision Edge(R) SY58012U
INPUT STAGE
VCC
IN 50 VT GND 50 /IN
Figure 2. Simplified Differential Input Buffer
INPUT INTERFACE APPLICATIONS
VCC VCC IN
LVPECL
VCC
VCC
VCC
VCC
IN
LVPECL
IN LVDS /IN
/IN SY58012U 0.01F Rpd VCC NC VT VREF-AC
/IN SY58012U Rpd Rpd VT VREF-AC 0.01F VCC Note: For VCC = 3.3V system, Rpd = 100 For VCC = 2.5V system, Rpd = 50
NC NC
SY58012U VT VREF-AC
Note: For VCC = 2.5V systems, Rpd = 19. For VCC = 3.3V systems, Rpd = 50.
Figure 3a. LVPECL Input Interface
VCC VCC
Figure 3b. AC-Coupled LVPECL Input Interface
VCC VCC
Figure 3c. LVDS Input Interface
IN CML /IN SY58012U NC NC VT VREF-AC
IN CML /IN SY58012U VT VREF-AC 0.1F VCC
Figure 3d. DC-Coupled CML Input Interface
(option: may connect VT to VCC)
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Figure 3e. AC-Coupled CML Input Interface
7
Micrel, Inc.
Precision Edge(R) SY58012U
LVPECL OUTPUT
LVPECL output have very low output impedance (open emitter), and small signal swing which results in low EMI. LVPECL is ideal for driving 50 and 100 controlled
+3.3V*
+3.3V +3.3V R1 130 ZO = 50 V = VCC --1.3V R4 T +3.3V 1k
impedance transmission lines. There are several techniques in terminating the LVPECL output, as shown in Figures 5 through 7.
+3.3V*
ZO = 50 ZO = 50
R1 130
R1 130
+3.3V*
+3.3V
Q
R1 130
/Q
R2 82
R2 82
VT = VCC --2V
R3 1.6k R2 82
VT = VCC --2V
R2 82
Figure 5. Parallel Termination-Thevenin Equivalent
Note 1. Note 2. For +2.5V systems: R1 = 250, R2 = 62.5 For +3.3V systems: R1 = 130, R2 = 82 Note 1. Note 2.
Figure 7. Terminating Unused I/O
Unused output (/Q) must be terminated to balance the output. For +2.5V systems: R1 = 250, R2 = 62.5, R3 = 1.25k, R4 = 1.2k. For +3.3V systems: R1 = 130, R2 = 82, R3 = 1k, R4 = 1.6k. Unused output pairs (Q and /Q) may be left floating.
+3.3V
Z = 50 Z = 50 50 50
+3.3V
Note 3.
source 50 Rb
destination C1 0.01F (optional)
Figure 6. Three-Resistor "Y-Termination"
Note 1. Note 2. Note 3. Power-saving alternative to Thevenin termination. Place termination resistors as close to destination inputs as possible. Rb resistor sets the DC bias voltage, equal to VT. For +2.5V systems Rb = 19. For +3.3V systems Rb = 46 to 50. C1 is an optional bypass capacitor intended to compensate for any tr/tf mismatches.
Note 4.
RELATED MICREL PRODUCTS AND SUPPORT DOCUMENTATION
Part Number SY58011U SY58012U SY58013U Function 7GHz, 1:2 CML Fanout Buffer/Translator With Internal Input Termnations 5GHz, 1:2 LVPECL Fanout Buffer/Translator With Internal Input Termination 6GHz, 1:2 Fanout Buffer/Translator w/400mV LVPECL Outputs and Internal Terminations 16-MLFTM Manufacturing Guidelines Exposed Pad Application Note M-0317 HBW Solutions Data Sheet Link http://www.micrel.com/product-info/products/sy58011u.shtml http://www.micrel.com/product-info/products/sy58012u.shtml http://www.micrel.com/product-info/products/sy58013u.shtml www.amkor.com/products/notes_papers/MLF_AppNote_0902.pdf http://www.micrel.com/product-info/as/solutions.shtml
M9999-051408 hbwhelp@micrel.com or (408) 955-1690
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Micrel, Inc.
Precision Edge(R) SY58012U
16-PIN MicroLeadFrame(R) (MLF-16)
Package EP- Exposed Pad
Die
CompSide Island
Heat Dissipation Heat Dissipation VEE Heavy Copper Plane VEE Heavy Copper Plane
PCB Thermal Consideration for 16-Pin MLF(R) Package (Always solder, or equivalent, the exposed pad to the PCB) Package Notes: Note 1. Package meets Level 2 qualification. Note 2. All parts are dry-packaged before shipment. Note 3. Exposed pads must be soldered to a ground for proper thermal management.
MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131
TEL
USA
+ 1 (408) 944-0800
FAX
+ 1 (408) 474-1000
WEB
http://www.micrel.com
The information furnished by Micrel in this datasheet is believed to be accurate and reliable. However, no responsibility is assumed by Micrel for its use. Micrel reserves the right to change circuitry and specifications at any time without notification to the customer. Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product can reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A Purchaser's use or sale of Micrel Products for use in life support appliances, devices or systems is at Purchaser's own risk and Purchaser agrees to fully indemnify Micrel for any damages resulting from such use or sale. (c) 2005 Micrel, Incorporated. M9999-051408 hbwhelp@micrel.com or (408) 955-1690
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