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| IPD127N06L G OptiMOS(R) Power-Transistor Features * For fast switching converters and sync. rectification * N-channel enhancement - logic level * 175 C operating temperature * Avalanche rated * Pb-free lead plating, RoHS compliant Product Summary V DS R DS(on),max ID 60 12.7 50 V m A PG-TO252-3 Type IPD127N06L G Package Marking PG-TO252-3 127N06L Maximum ratings, at T j=25 C, unless otherwise specified Parameter Continuous drain current Symbol Conditions ID T C=25 C1) T C=100 C Pulsed drain current Avalanche energy, single pulse Reverse diode dv /dt Gate source voltage Power dissipation Operating and storage temperature IEC climatic category; DIN IEC 68-1 1) 2) Value 50 48 200 240 6 20 Unit A I D,pulse E AS dv /dt V GS P tot T j, T stg T C=25 C2) I D=50 A, R GS=25 I D=50 A, V DS=48 V, di /dt =200 A/s, T j,max=175 C mJ kV/s V W C T C=25 C 136 -55 ... 175 55/175/56 Current is limited by bondwire; with an R thJC=1.1 K/W the chip is able to carry 64 A. See figure 3 Rev. 1.2 page 1 2008-07-22 IPD127N06L G Parameter Symbol Conditions min. Thermal characteristics Thermal resistance, junction - case SMD version, device on PCB R thJC R thJA minimal footprint 6 cm2 cooling area3) Electrical characteristics, at T j=25 C, unless otherwise specified Static characteristics Drain-source breakdown voltage Gate threshold voltage Zero gate voltage drain current V (BR)DSS V GS=0 V, I D=1 mA V GS(th) I DSS V DS=V GS, I D=80 A V DS=60 V, V GS=0 V, T j=25 C V DS=60 V, V GS=0 V, T j=125 C Gate-source leakage current Drain-source on-state resistance I GSS R DS(on) V GS=20 V, V DS=0 V V GS=4.5 V, I D=33 A V GS=10 V, I D=50 A Gate resistance Transconductance RG g fs |V DS|>2|I D|R DS(on)max, I D=50 A 60 1.2 1.6 0.01 2 1 A V 1.1 75 50 K/W Values typ. max. Unit 35 1 1 12.5 10.0 1.5 69 100 100 16.7 12.7 S nA m Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm 2 (one layer, 70 m thick) copper area for drain connection. PCB is vertical in still air. 3) Rev. 1.2 page 2 200 8-07-22 IPD127N06L G Parameter Symbol Conditions min. Dynamic characteristics Input capacitance Output capacitance Reverse transfer capacitance Turn-on delay time Rise time Turn-off delay time Fall time Gate Charge Characteristics4) Gate to source charge Gate charge at threshold Gate to drain charge Switching charge Gate charge total Gate plateau voltage Output charge Reverse Diode Diode continous forward current Diode pulse current Diode forward voltage Reverse recovery time Reverse recovery charge 4) Values typ. max. Unit C iss C oss C rss t d(on) tr t d(off) tf V DD=30 V, V GS=10 V, I D=50 A, R G=3.6 V GS=0 V, V DS=30 V, f =1 MHz - 1700 410 110 9 14 39 13 2300 550 165 13 21 58 21 pF ns Q gs Q g(th) Q gd Q sw Qg V plateau Q oss V DD=30 V, V GS=0 V V DD=30 V, I D=50 A, V GS=0 to 10 V - 6 3 17 21 52 3.7 16 9 4 26 31 69 21 nC V IS I S,pulse V SD t rr Q rr T C=25 C V GS=0 V, I F=50 A, T j=25 C V R=30 V, I F=I S, di F/dt =100 A/s - 0.93 52 99 50 200 1.3 65 125 A V ns nC See figure 16 for gate charge parameter definition Rev. 1.2 page 3 2008-07-22 IPD127N06L G 1 Power dissipation P tot=f(T C); V GS6 V 2 Drain current I D=f(T C); V GS10 V 160 140 60 50 120 40 100 P tot [W] 80 60 I D [A] 0 50 100 150 200 30 20 40 10 20 0 0 0 50 100 150 200 T C [C] T C [C] 3 Safe operating area I D=f(V DS); T C=25 C; D =0 parameter: t p 103 1 s limited by on-state resistance 10 s 100 s 1 ms 4 Max. transient thermal impedance Z thJC=f(t p) parameter: D =t p/T 101 10 2 DC 100 101 10 ms Z thJC [K/W] 0.5 I D [A] 0.2 0.1 10-1 100 0.05 0.02 0.01 single pulse 10-1 10 -1 10-2 10 0 10 1 10 2 10-5 10-4 10-3 10-2 10-1 100 V DS [V] t p [s] Rev. 1.2 page 4 2008-07-22 IPD127N06L G 5 Typ. output characteristics I D=f(V DS); T j=25 C parameter: V GS 200 10 V 6 Typ. drain-source on resistance R DS(on)=f(I D); T j=25 C parameter: V GS 50 5.5 V 180 160 140 120 5V 40 4V 3.5 V 3V 100 80 60 40 4.5 V R DS(on) [m] 30 I D [A] 20 4.5 V 5V 5.5 V 10 V 4V 10 3.5 V 20 3V 0 0 0 0 1 2 3 0 0 20 40 60 80 100 V DS [V] I D [A] 7 Typ. transfer characteristics I D=f(V GS); |V DS|>2|I D|R DS(on)max parameter: T j 80 8 Typ. forward transconductance g fs=f(I D); T j=25 C 100 90 80 60 70 60 40 g fs [S] 175 C 25 C I D [A] 50 40 30 20 20 10 0 0 1 2 3 4 0 20 40 60 0 V GS [V] I D [A] Rev. 1.2 page 5 2008-07-22 IPD127N06L G 9 Drain-source on-state resistance R DS(on)=f(T j); I D=50 A; V GS=10 V 10 Typ. gate threshold voltage V GS(th)=f(T j); V GS=V DS parameter: I D 40 3 30 2 R DS(on) [m] V GS(th) [V] 810 A 20 98% 81 A typ 1 10 0 -60 -20 20 60 100 140 180 0 -60 -20 20 60 100 140 180 T j [C] T j [C] 11 Typ. capacitances C =f(V DS); V GS=0 V; f =1 MHz 12 Forward characteristics of reverse diode I F=f(V SD) parameter: T j 10000 103 Ciss 102 175 C 25 C 1000 Coss 50 A C [pF] I F [A] Crss 10 1 100 100 10 0 10 20 30 40 50 10-1 0 0.5 1 1.5 2 V DS [V] V SD [V] Rev. 1.2 page 6 2008-07-22 IPD127N06L G 13 Avalanche characteristics I AS=f(t AV); R GS=25 parameter: T j(start) 100 14 Typ. gate charge V GS=f(Q gate); I D=50 A pulsed parameter: V DD 12 12 V 25 C 100 C 30 V 10 8 150 C 48 V 10 V GS [V] 1 10 100 1000 I AV [A] 6 4 2 1 0 0 10 20 30 40 50 60 t AV [s] Q gate [nC] 15 Drain-source breakdown voltage V BR(DSS)=f(T j); I D=1 mA 16 Gate charge waveforms 75 V GS Qg 70 V BR(DSS) [V] 65 60 V g s(th) 55 Q g (th) Q gs -60 -20 20 60 100 140 180 Q sw Q gate 50 Q gd T j [C] Rev. 1.2 page 7 2008-07-22 IPD127N06L G PG-TO252-3: Outline packaging: Rev. 1.2 page 8 2008-07-22 IPD127N06L G Rev. 1.2 page 9 2008-07-22 |
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