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HANBit
HMF8M16F8VS
FLASH-ROM MODULE 16MByte (8M x 16-Bit) , SMM 80Pin Part No. HMF8M16F8VS GENERAL DESCRIPTION
The HMF8M16F8VS is a high-speed flash read only memory (FROM) module containing 8,388,608 words organized in an x16bit configuration. The module consists of eight 2M x 8 FROM mounted on a 80-pin, MMC connector FR4-printed circuit board. Commands are written to the command register using standard microprocessor write timings. Register contents serve as input to an internal state-machine, which controls the erase and programming circuitry. Write cycles also internally latch addresses and data needed for the programming and erase operations. Reading data out of the device is similar to reading from 12.0V flash or EPROM devices. Output enable (/OE) and write enable (/WE) can set the memory input and output. The host system can detect a program or erase operation is complete by observing the Ready Pin, or reading the DQ7(Data # Polling) and DQ6(Toggle) status bits. When FROM module is disable condition the module is becoming power standby mode, system designer can get low-power design. All module components may be powered from a single +3V DC power supply and all inputs and outputs are LVTTLcompatible.
PIN ASSIGNMENT FEATURES
w Part identification HMF8M16F8VS (Bottom boot block configuration) w Access time: 90, 100, 120ns w High-density 16MByte design w High-reliability, low-power design w Single + 3V to 3.6V power supply w 80-Pin Designed 40-Pin, 0.8mm Fine Pitch Connector P1,P2 w Minimum 100,000 write cycle guarantee per sector w 10-year data retention at 85 oC w Flexible sector architecture w Embedded algorithms w Erase suspend / Erase resume 6 7 8 9 10 11 12 13 - 90 -100 16 120ns access w Packages SMM 80-pin F 19 20 A15 VCC 39 40 DQ0 VCC 19 20 NC VCC 39 40 A1 VCC -120 17 18 A13 A14 37 38 DQ1 DQ8 17 18 NC NC 37 38 A3 A2 A12 36 DQ9 16 NC 36 A4 14 15 100ns access RY_BY* VSS RESET* WE* A19 A8 A9 A10 VSS A11 26 27 28 29 30 31 32 33 34 35 DQ13 VSS DQ5 DQ12 DQ4 DQ11 DQ3 DQ10 VSS DQ2 6 7 8 9 10 11 12 13 14 15 CE5* VSS CE6* CE7* NC NC NC NC VSS NC 26 27 28 29 30 31 32 33 34 35 CE0* VSS A16 A0 A18 A17 A7 A6 VSS A5 PIN 1 2 3 4 5 Symbol VCC NC NC NC NC P1 PIN 21 22 23 24 25 Symbol VCC DQ15 DQ7 DQ14 DQ6 PIN 1 2 3 4 5 Symbol VCC CE1* CE2* CE3* CE4* P2 PIN 21 22 23 24 25 Symbol VCC NC NC BYTE* OE*
OPTIONS w Timing 90ns access
MARKING
FUNCTIONAL BLOCK DIAGRAM
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HMF8M16F8VS
A(0 :19) DQ(0 :15) A(0:19) DQ(0:15) /CE0 /CE /OE /WE /Reset /RY-BY A(0:19) DQ(0:15) /CE /CE4 /OE /WE /Reset /RY-BY
U4
U8
A(0:19) DQ(0:15) /CE1 /CE /OE /WE /Reset /RY-BY
A(0:19) DQ(0:15) /CE /CE5 /OE /WE /Reset /RY-BY
U3
U7
A(0:19) DQ(0:15) /CE2 /CE /OE /WE /Reset /RY-BY
A(0:19) DQ(0:15) /OE /WE /Reset /RY-BY /CE /CE6
U2
U6
A(0:19) DQ(0:15) /CE3 /OE /WE /Reset /Ry-By /CE /OE /WE /Reset /RY-BY
A(0:19) DQ(0:15) /OE /WE /Reset /RY-BY /CE /CE7
U1
U5
TRUTH TABLE
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MODE STANDBY RESET SECTOR PROTECT SECTOR UNPROTECT READ WRITE /CS Vcc0.3V X L L L L /OE X X H H L H /WE X X L L H L RESET Vcc0.3V L VID VID H H
HMF8M16F8VS
DQ HIGH-Z HIGH-Z DIN, DOUT DIN, DOUT DOUT DOUT
Note : X means don't care, WE0* Low byte (D0~7) Write enable, WE1* High byte(D8~15) Write enable.
ABSOLUTE MAXIMUM RATINGS
PARAMETER Voltage on Any Pin Relative to Vss Voltage on Vcc Supply Relative to Vss Output Short Circuit Current Storage Temperature Operating Temperature RATING -0.5V to Vcc +0.5V -0.5V to +4.0V 1,600mA -65oC to +150oC -0oC to +70oC
w Stresses greater than those listed under " Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operating section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
RECOMMENDED OPERATING CONDITIONS
PARAMETER Vcc for regulated Supply Voltage Vcc for full voltage RANGE +2.0V to 3.6V +2.7V to 3.6V
DC AND OPERATING CHARACTERISTICS
PARAMETER Input Leakage Current Output Leakage Current Output High Voltage Output Low Voltage Vcc Active Read Current Vcc Active Write Current Vcc Standby Current Vcc Reset Current Low Vcc Lock-Out Voltage TEST CONDITIONS VIN= VSS to VCC , VCC= VCC max VOUT= VSS to VCC, VCC= VCC max IOH = -2.0mA, Vcc = Vcc min IOL = 4.0mA, Vcc = Vcc min /CE = VIL, ,/OE=VIL, f=5MHz /CE = VIL, /OE=VIH /CE, RESET=VCC0.3V /RESET=Vss0.3V, SYMBOL IL1 IL0 VOH VOL ICC1 ICC2 ICC3 ICC4 VLKO 1.5 MIN -8.0 -8.0 0.85xVcc 0.4 128 240 40 40 MAX +8.0 +8.0 UNITS A A V V mA mA A A V
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ERASE AND PROGRAMMING PERFORMANCE
LIMITS PARAMETER MIN. Block Erase Time TYP. 0.7 MAX. UNIT
HMF8M16F8VS
COMMENTS Excludes 00H programming
15
Sec prior to erasure Excludes system-level overhead Excludes system-level
Byte Programming Time
-
9
270
S
Chip Programming Time
-
18
54
sec overhead
CAPACITANCE
PARAMETER SYMBOL CIN COUT CIN2 PARAMETER TEST SETUP DESCRIPTION Input Capacitance Output Capacitance Control Pin Capacitance VIN = 0 VOUT = 0 VIN = 0 10 10 10 pF pF pF MIN. MAX UNIT
Notes: Test conditions TA = 25 C, f=1.0 MHz.
o
AC CHARACTERISTICS u Read Only Operations Characteristics
PARAMETER CL=100pF SYMBOLS DESCRIPTION -90 JEDEC tAVAV tELQV tGLQV tEHQZ tAXQX STANDARD Min tRC tCE tOE tDF tQH /CE or /OE, Whichever Occurs First Read Cycle Time Chip Enable to Output Delay Chip Enable to Output Delay Chip Enable to Output High-Z Output Hold Time From Addresses, 0 0 0 ns 90 90 35 30 Max Min 100 100 40 30 Max Min 120 120 50 30 Max ns ns ns ns -100 -120 UNIT
TEST CONDITIONS
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TEST CONDITION Output load Output load capacitance, 30 CL (Including jig capacitance) Input rise and full times Input pulse levels Input timing measurement reference levels Output timing measurement reference levels 5 0.0 - 3.0 1.5 1.5 75
HMF8M16F8VS
ALL OTHERS 1TTL gate 100 20 0.45-2.4 0.8, 2.0 0.8, 2.0 pF ns V V V UNIT
3.3V 2.7k
Device Under Test CL
IN3064 or Equivalent
6.2k
Diodes = IN3064 or Equivalent
Note : CL = 100pF including jig capacitance
u Erase/Program Operations
PARAMETER SYMBOLS DESCRIPTION JEDEC tAVAV tAVWL tWLAX tDVWH tWHDX STANDARD Min tWC tAS tAH tDS tDH tOES tGHWL tELWL tWHEH tWLWH
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CL=100pF -90 Max -100 Min 100 0 45 45 0 0 0 0 0 45 Max -120 Min 120 0 50 50 0 0 0 0 0 50
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UNIT
Max ns ns ns ns ns ns ns ns ns ns
Write Cycle Time Address Setup Time Address Hold Time Data Setup Time Data Hold Time Output Enable Setup Time Read Recover Time Before Write /CE Setup Time /CE Hold Time Write Pulse Width
90 0 45 45 0 0 0 0 0 45
tGHWL tCS tCH tWP
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tWHWL tWHWH1 tWHWH2 tWPH tWHWH1 tBERS tVCS tRB tBUSY Write Pulse Width High Byte Programming Operation Block Erase Operation Vcc Setup Time Recovery time from RY/BY Program/Erase Valid to RY/BY Delay 30 9 0.7 50 0 90 30 9 0.7 50 0 90
HMF8M16F8VS
30 9 0.7 50 0 90 ns s sec s ns ns
u Alternate /CE Controlled Erase/Program Operations
PARAMETER SYMBOLS DESCRIPTION JEDEC tAVAV tAVEL tELAX tDVEH tEHDX STANDARD tWC tAS tAH tDS tDH tOES tGHEL tWLEL tEHWH tELEH tEHEL tGHEL tWS tWH tCP tCPH tBUSY tRB Write Cycle Time Address Setup Time Address Hold Time Data Setup Time Data Hold Time Output Enable Setup Time Read Recover Time Before Write /OE High to /WE Low /WE Hold Time /CE Pulse Width /CE Pulse Width High Program/Erase Valid RY//BY Delay Recovery Time from RY//BY Min 90 0 45 45 0 0 0 0 0 45 30 90 0 -90 Max Min 100 0 45 45 0 0 0 0 0 45 30 90 0 CL=100pF -100 Max -120 Min 120 0 50 50 0 0 0 0 0 50 30 90 0 Max ns ns ns ns ns ns ns ns ns ns ns ns ns UNIT
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u READ OPERATIONS TIMING
HMF8M16F8VS
u RESET TIMING
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u PROGRAM OPERATIONS TIMING
HMF8M16F8VS
u CHIP/SECTOR ERASE OPERATION TIMINGS
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u DATA# POLLING TIMES(DURING EMBEDDED ALGORITHMS)
HMF8M16F8VS
u TOGGLE# BIT TIMINGS (DURING EMBEDDED ALGORITHMS)
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u SECTOR PROTECT UNPROTECT TIMEING DIAGRAM
HMF8M16F8VS
u ALTERNATE CE# CONTROLLED WRITE OPERATING TIMINGS
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PACKAGE DIMENSIONS
UNIT: mm (Front-Side)
HMF8M16F8VS
(Rear-Side)
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ORDERING INFORMATION
Component Number 8EA 8EA 8EA
HMF8M16F8VS
Part Number
Density
Org.
Package
Vcc
SPEED
HMF8M16F8VS-90 HMF8M16F8VS-100 HMF8M16F8VS-120
16MByte 16MByte 16MByte
x 16 x 16 x 16
80Pin -SMM 80Pin -SMM 80Pin -SMM
3.3V 3.3V 3.3V
90ns 100ns 120ns
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