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TJA1028 LIN transceiver with integrated voltage regulator Rev. 2 -- 25 February 2011 Product data sheet 1. General description The TJA1028 is a LIN 2.0/2.1/SAE J2602 transceiver with an integrated low-drop voltage regulator. The voltage regulator can deliver up to 70 mA and is available in 3.3 V and 5.0 V variants. TJA1028 facilitates the development of compact nodes in LIN bus systems. To support robust designs, the TJA1028 offers strong ElectroStatic Discharge (ESD) performance and can withstand high voltages on the LIN bus. In order to minimize current consumption, the TJA1028 supports a Sleep mode in which the LIN transceiver and the voltage regulator are powered down while still having wake-up capability via the LIN bus. The TJA1028 comes in an SO8 package, and also in a 3 mm x 3 mm HVSON8 package that reduces the required board space by over 70 %. This feature can prove extremely valuable when board space is limited. 2. Features and benefits LIN 2.0/2.1 compliant SAE J2602 compliant Downward compatible with LIN 1.3 Internal LIN slave termination resistor Voltage regulator offering 5 V or 3.3 V, 70 mA capability 2 % voltage regulator accuracy over specified temperature and supply ranges Voltage regulator output undervoltage detection with reset output Voltage regulator is short-circuit proof to ground Voltage regulator stable with ceramic, tantalum and aluminum electrolyte capacitors Robust ESD performance; 8 kV according to IEC61000-4-2 for pins LIN and VBAT Pins LIN and VBAT protected against transients in the automotive environment (ISO 7637) Very low LIN bus leakage current of < 2 A when battery not connected LIN pin short-circuit proof to battery and ground Transmit data (TXD) dominant time-out function Thermally protected Very low ElectroMagnetic Emission (EME) High ElectroMagnetic Immunity (EMI) Typical Standby mode current of 45 A Typical Sleep mode current of 12 A LIN bus wake-up function Available in SO8 and HVSON8 packages Leadless HVSON8 package with wettable sides NXP Semiconductors TJA1028 LIN transceiver with integrated voltage regulator K-line compatible Pb-free; Restriction of Hazardous Substances (RoHS) and dark green compliant 3. Ordering information Table 1. Ordering information Package Name TJA1028T/xxx/xx[1][2] TJA1028TK/xxx/xx[1][2] SO8 HVSON8 Description plastic small outline package; 8 leads; body width 3.9 mm plastic thermal enhanced very thin small outline package; no leads; 8 terminals; body 3 x 3 x 0.85 mm Version SOT96-1 SOT782-1 Type number [1] [2] TJA1028T/5V0/xx and TJA1028TK/5V0/xx for the versions with the 5 V regulator; TJA1028T/3V3/xx and TJA1028TK/3V3/xx for the versions with the 3.3 V regulator. TJA1028T/xxx/20 and TJA1028TK/xxx/20 for the normal slope versions that support baud rates up to 20 kBd; TJA1028T/xxx/10 and TJA1028TK/xxx/10 for the low slope versions that support baud rates up to 10.4 kBd (SAE J2602). 4. Marking Table 2. Marking codes Marking 1028/51 1028/52 1028/31 1028/32 28/51 28/52 28/31 28/32 Type number TJA1028T/5V0/10 TJA1028T/5V0/20 TJA1028T/3V3/10 TJA1028T/3V3/20 TJA1028TK/5V0/10 TJA1028TK/5V0/20 TJA1028TK/3V3/10 TJA1028TK/3V3/20 TJA1028 All information provided in this document is subject to legal disclaimers. (c) NXP B.V. 2011. All rights reserved. Product data sheet Rev. 2 -- 25 February 2011 2 of 24 NXP Semiconductors TJA1028 LIN transceiver with integrated voltage regulator 5. Block diagram VBAT VOLTAGE REFERENCE VBAT UV DET VCC VREG VCC UV DET EN VBAT OVERTEMP DETECTION GND CONTROL RSTN LIN Rx RXD VCC Tx LIN TXD TIMEOUT TIMER TJA1028 TXD GND 015aaa085 Fig 1. Block diagram TJA1028 All information provided in this document is subject to legal disclaimers. (c) NXP B.V. 2011. All rights reserved. Product data sheet Rev. 2 -- 25 February 2011 3 of 24 NXP Semiconductors TJA1028 LIN transceiver with integrated voltage regulator 6. Pinning information 6.1 Pinning terminal 1 index area VBAT EN VBAT EN GND LIN 1 2 8 7 VCC GND RSTN TXD RXD LIN 4 5 RXD 1 2 8 7 VCC RSTN TXD TJA1028TK 3 6 TJA1028T 3 4 015aaa082 6 5 015aaa244 Transparent top view a. TJA1028T/xxx/xx: SO8 Fig 2. Pin configuration diagrams b. TJA1028TK/xxx/xx: HVSON8 6.2 Pin description Table 3. Symbol VBAT EN GND LIN RXD TXD RSTN VCC [1] Pin description Pin 1 2 3[1] 4 5 6 7 8 Description battery supply for the TJA1028 enable input ground LIN bus line LIN receive data output LIN transmit data input reset output (active LOW) voltage regulator output HVSON8 package die supply ground is connected to both the GND pin and the exposed center pad. The GND pin must be soldered to board ground. For enhanced thermal and electrical performance, it is recommended that the exposed center pad also be soldered to board ground. 7. Functional description The TJA1028 combines the functionality of a LIN transceiver and a voltage regulator in a single chip and offers wake-up by bus activity. The voltage regulator is designed to power the Electronic Control Unit's (ECU) microcontroller and its peripherals. The TJA1028 is the interface between a LIN master/slave protocol controller and the physical bus in a Local Interconnect Network (LIN). It is LIN 2.0/2.1/SAE J2602 compliant and achieves optimum ElectroMagnetic Compatibility (EMC) performance by wave shaping the LIN output. TJA1028 All information provided in this document is subject to legal disclaimers. (c) NXP B.V. 2011. All rights reserved. Product data sheet Rev. 2 -- 25 February 2011 4 of 24 NXP Semiconductors TJA1028 LIN transceiver with integrated voltage regulator The TJA1028T/xxx/20 and TJA1028TK/xxx/20 versions are optimized for a speed of 20 kBd, the maximum specified in the LIN standard. The TJA1028T/xxx/10 and TJA1028TK/xxx/10 versions are optimized for a transmission speed of 10.4 kBd, as specified in SAE J2602. 7.1 Operating modes The TJA1028 supports four operating modes: Normal, Standby, Sleep and Off. The operating modes, and the transitions between modes, are illustrated in Figure 3. AII states VBAT < Vth(det)poff OR Tvj > Tth(act)otp remote wake-up OFF LIN = off RXD = floating RSTN = LOW VBAT > Vth(det)pon AND Tvj < Tth(rel)otp STANDBY LIN = off (RXD signals wake source) EN = 1 AND RSTN = 1 EN = 1 0 AND TXD = 1 AND RSTN = 1 NORMAL(1) LIN = on EN = 1 0 AND(3) EN = 1 TXD = 0 AND RSTN = 1 wake-up(3) event SLEEP LIN = off RXD = VCC(2) RSTN = LOW 015aaa086 Voltage regulator - on Voltage regulator - off (1) In Normal mode, the LIN transmitter is enabled - but if EN and/or RSTN go LOW, the LIN transmitter will be disabled. Remote wake-up signalling will be activated. (2) Until VCC drops below 2 V. (3) If a wake-up event and a go-to-sleep event occur simultaneously, the device will switch directly to Standby mode without initiating a reset. Fig 3. State diagram 7.1.1 Off mode The TJA1028 switches to Off mode from all other modes if the battery supply voltage drops below the power-off detection threshold (Vth(det)poff) or the junction temperature exceeds the overtemperature protection activation threshold (Tth(act)otp). The voltage regulator and the LIN physical layer are disabled in Off mode, and pin RSTN is forced LOW. 7.1.2 Standby mode Standby mode is a low-power mode that guarantees very low current consumption. TJA1028 All information provided in this document is subject to legal disclaimers. (c) NXP B.V. 2011. All rights reserved. Product data sheet Rev. 2 -- 25 February 2011 5 of 24 NXP Semiconductors TJA1028 LIN transceiver with integrated voltage regulator The TJA1028 switches from Off mode to Standby mode as soon as the battery supply voltage rises above the power-on detection threshold (VBAT > Vth(det)pon), provided the junction temperature is below the overtemperature protection release threshold (Tvj < Tth(rel)otp). The TJA1028 switches to Standby mode from Normal mode during the mode select window if TXD is HIGH and EN is LOW (see Section 7.1.5), provided RSTN = 1. A remote wake-up event will trigger a transition to Standby mode from Sleep mode. The remote wake-up event will be signalled by a continuous LOW level on pin RXD. In Standby mode, the voltage regulator is on, the LIN physical layer is disabled and remote wake-up detection is active. The wake-up source is indicated by the level on RXD (LOW indicates a remote wake-up). 7.1.3 Normal mode If the EN pin is pulled HIGH while the TJA1028 is in Standby mode (with RSTN = 1) or Sleep mode, the device will enter Normal mode. The LIN physical layer and the voltage regulator are enabled in Normal mode. 7.1.3.1 The LIN transceiver in Normal mode The LIN transceiver is activated when the TJA1028 enters Normal mode. In Normal mode, the transceiver can transmit and receive data via the LIN bus. The receiver detects data streams on the LIN pin and transfers them to the microcontroller via pin RXD. LIN recessive is represented by a HIGH level on RXD, LIN dominant by a LOW level. The transmit data streams of the protocol controller at the TXD input are converted by the transmitter into bus signals with optimized slew rate and wave shaping to minimize EME. A LOW level at the TXD input is converted to a LIN dominant level while a HIGH level is converted to a LIN recessive level. 7.1.4 Sleep mode Sleep mode features extremely low power consumption. The TJA1028 switches to Sleep mode from Normal mode during the mode select window if TXD and EN are both LOW (see Section 7.1.5), provided RSTN = 1. The voltage regulator and the LIN physical layer are disabled in Sleep mode. Pin RSTN is forced LOW. Remote wake-up detection is active. 7.1.5 Transition from Normal to Sleep or Standby mode When EN is driven LOW in Normal mode, the TJA1028 disables the transmit path. The mode select window opens tmsel(min) after EN goes LOW, and remains open until tmsel(max) after EN goes LOW (see Figure 4). The TXD pin is sampled in the mode select window. A transition to Standby mode is triggered if TXD is HIGH, or to Sleep mode if TXD is LOW. TJA1028 All information provided in this document is subject to legal disclaimers. (c) NXP B.V. 2011. All rights reserved. Product data sheet Rev. 2 -- 25 February 2011 6 of 24 NXP Semiconductors TJA1028 LIN transceiver with integrated voltage regulator To avoid complicated timing in the application, EN and TXD can be pulled LOW at the same time without having any effect on the LIN bus. In order to ensure that the remote wake-up time (twake(busdom)min) is not reset on a transition to Sleep mode, TXD should be pulled LOW at least td(EN-TXD) after EN goes LOW. This is guaranteed by design. The user must ensure the appropriate level is present on pin TXD while the mode select window is open. EN TXD mode select window operating mode Normal Normal withTXD path blocked Sleep or Standby depending on TXD level in mode select window tmsel(min) tmsel(max) 015aaa087 TXD is sampled during the mode select window. The TJA1028 switches to Standby (TXD HIGH) or Sleep (TXD LOW) mode after sampling. Fig 4. Transition from Normal to Sleep/Standby mode 7.2 Power supplies 7.2.1 Battery (pin VBAT) The TJA1028 contains a single supply pin, VBAT. An external diode is needed in series to protect the device against negative voltages. The operating range is from 4.5 V to 28 V. The TJA1028 can handle voltages up to 40 V (max). If the voltage on pin VBAT falls below Vth(det)poff, the TJA1028 switches to Off mode, shutting down the internal logic and the voltage regulator and disabling the LIN transmitter. The TJA1028 exits Off mode as soon as the voltage rises above Vth(det)pon, provided the junction temperature is below Tth(rel)otp. 7.2.2 Voltage regulator (pin VCC) The TJA1028 contains a voltage regulator supplied via pin VBAT, which delivers up to 70 mA. It is designed to supply the microcontroller and its periphery via pin VCC. The output voltage on pin VCC is monitored continuously and a system reset signal is generated (pin RSTN goes LOW) if an undervoltage event is detected (VCC < Vuvd for tdet(uv)(VCC)). 7.3 LIN transceiver The transceiver is the interface between a LIN master/slave protocol controller and the physical bus in a Local Interconnect Network (LIN). It is primarily intended for in-vehicle sub-networks using baud rates from 2.4 kBd up to 20 kBd and is LIN 2.0/LIN 2.1/SAE J2602 compliant. TJA1028 All information provided in this document is subject to legal disclaimers. (c) NXP B.V. 2011. All rights reserved. Product data sheet Rev. 2 -- 25 February 2011 7 of 24 NXP Semiconductors TJA1028 LIN transceiver with integrated voltage regulator 7.4 Remote wake-up A remote wake-up is triggered by a falling edge on pin LIN, followed by LIN remaining LOW for at least twake(busdom)min, followed by a rising edge on pin LIN (see Figure 5). LIN recessive VBAT 0.6VBAT VLIN 0.4VBAT LIN dominant ground Standby/Sleep mode RXD Sleep: floating/Standby: HIGH Standby mode LOW 015aaa088 twake(busdom)min Fig 5. Remote wake-up behavior The remote wake-up request is communicated to the microcontroller in Standby mode by a continuous LOW level on pin RXD. Note that twake(busdom)min is measured in Sleep and Standby modes, and in Normal mode if TXD is HIGH. 7.5 Fail-safe features 7.5.1 General fail-safe features The following general fail-safe features have been implemented: * An internal pull-up towards VCC on pin TXD guarantees a recessive bus level if the pin is left floating by a bad solder joint or floating microcontroller port pin. * The current in the transmitter output stage is limited in order to protect the transmitter against short circuits to pin VBAT. * A loss of power (pins VBAT and GND) has no impact on the bus line or on the microcontroller. There will be no reverse currents from the bus. * The LIN transmitter is automatically disabled when either EN or RSTN is LOW. * After a transition to Normal mode, the LIN transmitter is only enabled if a recessive level is present on pin TXD. 7.5.2 TXD dominant time-out function A TXD dominant time-out timer circuit prevents the bus line being driven to a permanent dominant state (blocking all network communications) if TXD is forced permanently LOW by a hardware or software application failure. The timer is triggered by a negative edge on the TXD pin. If the pin remains LOW for longer than the TXD dominant time-out time (tto(dom)TXD), the transmitter is disabled, driving the bus line to a recessive state. The timer is reset by a positive edge on TXD. TJA1028 All information provided in this document is subject to legal disclaimers. (c) NXP B.V. 2011. All rights reserved. Product data sheet Rev. 2 -- 25 February 2011 8 of 24 NXP Semiconductors TJA1028 LIN transceiver with integrated voltage regulator 7.5.3 Temperature protection The temperature of the IC is monitored in Normal, Standby and Off modes. If the temperature is too high (Tvj > Tth(act)otp), the TJA1028 will switch to Off mode (if in Standby or Normal modes). The voltage regulator and the LIN transmitter will be switched off and the RSTN pin driven LOW. When the temperature falls below the overtemperature protection release threshold (Tvj < Tth(rel)otp), the TJA1028 switches to Standby mode. 8. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol VBAT Vx Parameter battery supply voltage voltage on pin x Conditions DC; continuous DC value pin VCC pins TXD, RXD, RSTN and EN pin LIN with respect to GND VESD electrostatic discharge voltage HBM at pins LIN and VBAT at any other pin IEC 61000-4-2 at pins LIN and VBAT MM at any pin CDM at corner pins at any other pin Vtrt transient voltage on pin VBAT via reverse polarity diode/capacitor; on pin LIN via 1 nF coupling capacitor [1] [2] [3] [4] [5] [6] Human Body Model (HBM): according to AEC-Q100-002 (100 pF, 1.5 k). VCC and VBAT connected to GND, emulating application circuit. ESD performance of pins LIN and VBAT according to IEC 61000-4-2 (150 pF, 330 ) has been verified by an external test house. Machine Model (MM): according to AEC-Q100-003 (200 pF, 0.75 H, 10 ). Charged Device Model (CDM): according to AEC-Q100-011 (field Induced charge; 4 pF). Verified by an external test house to ensure pins can withstand ISO 7637 part 2 automotive transient test pulses 1, 2a, 3a and 3b. [6] [5] [4] [3] [1] [2] Min -0.3 -0.3 -0.3 -40 -8 -2 -8 -250 -750 -500 -150 Max +40 +7 VCC + 0.3 +40 +8 +2 +8 +250 +750 +500 +100 Unit V V V V kV kV kV V V V V TJA1028 All information provided in this document is subject to legal disclaimers. (c) NXP B.V. 2011. All rights reserved. Product data sheet Rev. 2 -- 25 February 2011 9 of 24 NXP Semiconductors TJA1028 LIN transceiver with integrated voltage regulator 9. Thermal characteristics Table 5. Symbol Rth(j-a) Thermal characteristics Parameter thermal resistance from junction to ambient Conditions SO8; single-layer board SO8; four-layer board HVSON8; single-layer board HVSON8; four-layer board [1] [2] According to JEDEC JESD51-2 and JESD51-3 at natural convection on 1s board. According to JEDEC JESD51-2, JESD51-5 and JESD51-7 at natural convection on 2s2p board. Board with two inner copper layers (thickness: 35 m) and thermal via array under the exposed pad connected to the first inner copper layer. [1] [2] [1] [2] Typ 132 93 129 67 Unit K/W K/W K/W K/W 10. Static characteristics Table 6. Static characteristics VBAT = 5.5 V to 28 V; Tvj = -40 C to +150 C; RL(LIN-VBAT) = 500 ; all voltages are defined with respect to ground; positive currents flow into the IC; typical values are given at VBAT = 12 V; unless otherwise specified. Symbol IBAT Parameter battery supply current Conditions Standby mode; VLIN = VBAT Sleep mode; VLIN = VBAT Normal mode; bus recessive; VLIN = VBAT; VRXD = VCC; VRSTN = HIGH Normal mode; bus dominant; VBAT = 12 V; VTXD = 0 V; VRSTN = HIGH Vth(det)pon Vth(det)poff Vhys(det)pon power-on detection threshold voltage power-off detection threshold voltage VBAT = 2 V to 28 V VBAT = 2 V to 28 V Min 3 50 Typ 45 12 850 2.0 Max 59 18 1800 4.5 5.25 4.5 Unit A A A mA V V mV Supply; pin VBAT power-on detection hysteresis VBAT = 2 V to 28 V voltage supply voltage VCC(nom) = 5 V; IVCC = -70 mA to 0 mA VCC(nom) = 3.3 V; VBAT = 4.5 V to 28 V; IVCC = -70 mA to 0 mA Supply; pin VCC VCC 4.9 3.234 -250 4.5 2.97 4.6 3.036 [1] 5 3.3 - 5.1 3.366 -70 4.75 3.135 4.9 3.234 5 V V mA V V V V IOlim Vuvd Vuvr R(VBAT-VCC) output current limit undervoltage detection voltage undervoltage recovery voltage resistance between pin VBAT and pin VCC output capacitance VCC = 0 V to 5.5 V VCC(nom) = 5 V VCC(nom) = 3.3 V VCC(nom) = 5 V VCC(nom) = 3.3 V VCC(nom) = 5 V; VBAT = 4.5 V to 5.5 V; IVCC = -70 mA to -5 mA; regulator in saturation equivalent series resistance < 5 - Co [1] 1.8 10 - F TJA1028 All information provided in this document is subject to legal disclaimers. (c) NXP B.V. 2011. All rights reserved. Product data sheet Rev. 2 -- 25 February 2011 10 of 24 NXP Semiconductors TJA1028 LIN transceiver with integrated voltage regulator Table 6. Static characteristics ...continued VBAT = 5.5 V to 28 V; Tvj = -40 C to +150 C; RL(LIN-VBAT) = 500 ; all voltages are defined with respect to ground; positive currents flow into the IC; typical values are given at VBAT = 12 V; unless otherwise specified. Symbol Vth(sw) Vhys(i) Rpu IOH IOL Parameter switching threshold voltage input hysteresis voltage pull-up resistance HIGH-level output current LOW-level output current Normal mode; VLIN = VBAT; VRXD = VCC - 0.4 V Normal mode; VLIN = GND; VRXD = 0.4 V Conditions VCC = 2.97 V to 5.5 V VCC = 2.97 V to 5.5 V Min 0.3 x VCC 200 5 0.4 Typ 12 Max 0.7 x VCC 25 -0.4 Unit V mV k mA mA LIN transmit data input; pin TXD LIN receive data output; pin RXD Enable input; pin EN Vth(sw) Rpd Rpu IOL VOL VOH switching threshold voltage pull-down resistance pull-up resistance LOW-level output current LOW-level output voltage HIGH-level output voltage VRSTN = VCC - 0.4 V; VCC = 2.97 V to 5.5 V VRSTN = 0.4 V; VCC = 2.97 V to 5.5 V; -40 C < Tvj < 195 C VCC = 2.5 V to 5.5 V; -40 C < Tvj < 195 C -40 C < Tvj < 195 C 0.8 50 3 3.2 0 0.8 x VCC 40 -600 130 2 400 12 40 0.5 VCC + 0.3 100 2 V k k mA V V Reset output; pin RSTN LIN bus line; pin LIN IBUS_LIM IBUS_PAS_rec IBUS_PAS_dom current limitation for driver dominant state receiver recessive input leakage current receiver dominant input leakage current including pull-up resistor loss of ground leakage current loss of battery leakage current receiver recessive voltage receiver dominant voltage receiver center threshold voltage receiver hysteresis threshold voltage capacitance on pin LIN VBAT = VLIN = 18 V; VTXD = 0 V VLIN = 18 V; VBAT = 5.5 V; VTXD = VCC Normal mode; VTXD = VCC; VLIN = 0 V; VBAT = 12 V VBAT = 18 V; VLIN = 0 V VBAT = 0 V; VLIN = 18 V VBAT = 5.5 V to 18 V VBAT = 5.5 V to 18 V VBAT = 5.5 V to 18 V; Vth(cntr)RX = (Vth(rec)RX + Vth(dom)RX) / 2 VBAT = 5.5 V to 18 V; Vth(hys)RX = Vth(rec)RX - Vth(dom)RX with respect to GND [2] - mA A A IL(log) IL(lob) Vrec(RX) Vdom(RX) Vth(cntr)RX Vth(hys)RX CLIN -750 0.6 x VBAT - - +10 2 0.4 x VBAT 0.525 x VBAT 0.175 x VBAT 30 A A V V V V pF 0.475 x 0.5 x VBAT VBAT 0.05 x VBAT 0.15 x VBAT - [2] [1] TJA1028 All information provided in this document is subject to legal disclaimers. (c) NXP B.V. 2011. All rights reserved. Product data sheet Rev. 2 -- 25 February 2011 11 of 24 NXP Semiconductors TJA1028 LIN transceiver with integrated voltage regulator Table 6. Static characteristics ...continued VBAT = 5.5 V to 28 V; Tvj = -40 C to +150 C; RL(LIN-VBAT) = 500 ; all voltages are defined with respect to ground; positive currents flow into the IC; typical values are given at VBAT = 12 V; unless otherwise specified. Symbol VO(dom) Parameter dominant output voltage Conditions Normal mode; VTXD = 0 V; VBAT = 7 V Normal mode; VTXD = 0 V; VBAT = 18 V Rslave slave resistance between pin LIN and VBAT; VLIN = 0 V; VBAT = 12 V Min 20 Typ 30 Max 1.4 2.0 60 Unit V V k Temperature protection Tth(act)otp overtemperature protection activation threshold temperature overtemperature protection release threshold temperature 165 180 195 C Tth(rel)otp 126 138 150 C [1] [2] Not tested in production; guaranteed by design. See Figure 7. TJA1028 All information provided in this document is subject to legal disclaimers. (c) NXP B.V. 2011. All rights reserved. Product data sheet Rev. 2 -- 25 February 2011 12 of 24 NXP Semiconductors TJA1028 LIN transceiver with integrated voltage regulator 11. Dynamic characteristics Table 7. Dynamic characteristics VBAT = 5.5 V to 18 V; Tvj = -40 C to +150 C; RL(LIN-VBAT) = 500 ; all voltages are defined with respect to ground; positive currents flow into the IC; typical values are given at VBAT = 12 V; unless otherwise specified.[1] Symbol Duty cycles 1 duty cycle 1 Vth(rec)RX(max) = 0.744VBAT; Vth(dom)RX(max) = 0.581VBAT; tbit = 50 s; VBAT = 7 V to 18 V Vth(rec)RX(max) = 0.76VBAT; Vth(dom)RX(max) = 0.593VBAT; tbit = 50 s; VBAT = 5.5 V to 7.0 V 2 duty cycle 2 Vth(rec)RX(min) = 0.422VBAT; Vth(domRX)(min) = 0.284VBAT; tbit = 50 s; VBAT = 7.6 V to 18 V Vth(rec)RX(min) = 0.41VBAT; Vth(dom)RX(min) = 0.275VBAT; tbit = 50 s; VBAT = 6.1 V to 7.6 V 3 duty cycle 3 Vth(rec)RX(max) = 0.778VBAT; Vth(dom)RX(max) = 0.616VBAT; tbit = 96 s; VBAT = 7 V to 18 V Vth(rec)RX(max) = 0.797VBAT; Vth(dom)RX(max) = 0.630VBAT; tbit = 96 s; VBAT = 5.5 V to 7 V 4 duty cycle 4 Vth(rec)RX(min) = 0.389VBAT Vth(dom)RX(min) = 0.251VBAT tbit = 96 s VBAT = 7.6 V to 18 V Vth(rec)RX(min) = 0.378VBAT; Vth(dom)RX(min) = 0.242VBAT; tbit = 96 s; VBAT = 6.1 V to 7.6 V Timing characteristics tPD(RX)r tPD(RX)f tPD(RX)sym twake(busdom)min tto(dom)TXD tmsel td(EN-TXD) tdet(uv)(VCC) trst TJA1028 Parameter Conditions [2][3] [4][5] Min Typ Max - Unit 0.396 - [2][3] [4][5] 0.396 - - [2][4] [5][6] - - 0.581 [2][4] [5][6] - - 0.581 [3][4] [5] 0.417 - - [3][4] [5] 0.417 - - [4][5] [6] - - 0.590 [4][5] [6] - - 0.590 rising receiver propagation delay falling receiver propagation delay receiver propagation delay symmetry minimum bus dominant wake-up time TXD dominant time-out time mode select time delay time from EN to TXD undervoltage detection time on pin VCC reset time CRXD = 20 pF CRXD = 20 pF CRXD = 20 pF Sleep mode VTXD = 0 V [7] -2 30 6 3 0 1 2 80 - 6 6 +2 150 20 20 1 15 8 s s s s ms s s s ms CRSTN = 20 pF Reset output; pin RSTN All information provided in this document is subject to legal disclaimers. (c) NXP B.V. 2011. All rights reserved. Product data sheet Rev. 2 -- 25 February 2011 13 of 24 NXP Semiconductors TJA1028 LIN transceiver with integrated voltage regulator [1] [2] [3] [4] [5] [6] [7] All parameters are guaranteed over the virtual junction temperature range by design. Factory testing uses correlated test conditions to cover the specified temperature and power supply voltage ranges. Not applicable to the low slope versions (TJA1028T/xxx/10 and TJA1028TK/xxx/10) of the TJA1028. t bus ( rec ) ( min ) 1, 3 = ------------------------------- . Variable tbus(rec)(min) is illustrated in the LIN timing diagram in Figure 7. 2 x t bit Bus load conditions are: CL = 1 nF and RL = 1 k; CL = 6.8 nF and RL = 660 ; CL = 10 nF and RL = 500 . For VBAT > 18 V, the LIN transmitter might be suppressed. If TXD is HIGH then the LIN transmitter output is recessive. t bus ( rec ) ( max 2, 4 = -------------------------------) . Variable tbus(rec)(max) is illustrated in the LIN timing diagram in Figure 7. 2 x t bit Not tested in production; guaranteed by design. VBAT RXD CRXD TXD GND RLIN TJA1028 LIN CLIN 015aaa198 Fig 6. Timing test circuit for LIN transceiver tbit VTXD tbit tbit tbus(dom)(max) VBAT tbus(rec)(min) Vth(rec)RX(max) LIN bus signal Vth(dom)RX(max) Vth(rec)RX(min) Vth(dom)RX(min) thresholds of receiving node A thresholds of receiving node B tbus(dom)(min) output of receiving node A VRXD tbus(rec)(max) output of receiving node B tPD(RX)f VRXD tPD(RX)r tPD(RX)r tPD(RX)f 015aaa199 Fig 7. TJA1028 LIN transceiver timing diagram All information provided in this document is subject to legal disclaimers. (c) NXP B.V. 2011. All rights reserved. Product data sheet Rev. 2 -- 25 February 2011 14 of 24 NXP Semiconductors TJA1028 LIN transceiver with integrated voltage regulator 12. Test information 12.1 Quality information This product has been qualified in accordance with the Automotive Electronics Council (AEC) standard Q100 - Failure mechanism based stress test qualification for integrated circuits, and is suitable for use in automotive applications. TJA1028 All information provided in this document is subject to legal disclaimers. (c) NXP B.V. 2011. All rights reserved. Product data sheet Rev. 2 -- 25 February 2011 15 of 24 NXP Semiconductors TJA1028 LIN transceiver with integrated voltage regulator 13. Package outline SO8: plastic small outline package; 8 leads; body width 3.9 mm SOT96-1 D E A X c y HE vMA Z 8 5 Q A2 pin 1 index A1 (A 3) Lp L A 1 4 e bp wM detail X 0 2.5 scale 5 mm DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm inches Notes 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. 2. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included. OUTLINE VERSION SOT96-1 REFERENCES IEC 076E03 A max. 1.75 0.069 A1 0.25 0.10 A2 1.45 1.25 A3 0.25 0.01 bp 0.49 0.36 c 0.25 0.19 D (1) 5.0 4.8 0.20 0.19 E (2) 4.0 3.8 0.16 0.15 e 1.27 0.05 HE 6.2 5.8 L 1.05 Lp 1.0 0.4 Q 0.7 0.6 v 0.25 0.01 w 0.25 0.01 y 0.1 0.004 Z (1) 0.7 0.3 0.028 0.012 o 0.010 0.057 0.004 0.049 0.019 0.0100 0.014 0.0075 0.244 0.039 0.028 0.041 0.228 0.016 0.024 8 o 0 JEDEC MS-012 JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-18 Fig 8. TJA1028 Package outline SOT96-1 (SO8) All information provided in this document is subject to legal disclaimers. (c) NXP B.V. 2011. All rights reserved. Product data sheet Rev. 2 -- 25 February 2011 16 of 24 NXP Semiconductors TJA1028 LIN transceiver with integrated voltage regulator HVSON8: plastic thermal enhanced very thin small outline package; no leads; 8 terminals; body 3 x 3 x 0.85 mm SOT782-1 X D B A E A A1 c detail X terminal 1 index area terminal 1 index area 1 L K e1 e b 4 v w CAB C y1 C C y Eh 8 Dh 5 0 Dimensions Unit(1) mm A A1 b c 0.2 D Dh E Eh e 1 scale e1 K 2 mm L v 0.1 w y y1 0.1 max 1.00 0.05 0.35 nom 0.85 0.03 0.30 min 0.80 0.00 0.25 3.10 2.45 3.10 1.65 0.35 0.45 3.00 2.40 3.00 1.60 0.65 1.95 0.30 0.40 2.90 2.35 2.90 1.55 0.25 0.35 0.05 0.05 Note 1. Plastic or metal protrusions of 0.075 maximum per side are not included. Outline version SOT782-1 References IEC --JEDEC MO-229 JEITA --European projection sot782-1_po Issue date 09-08-25 09-08-28 Fig 9. TJA1028 Package outline SOT782-1 (HVSON8) All information provided in this document is subject to legal disclaimers. (c) NXP B.V. 2011. All rights reserved. Product data sheet Rev. 2 -- 25 February 2011 17 of 24 NXP Semiconductors TJA1028 LIN transceiver with integrated voltage regulator 14. Handling information All input and output pins are protected against ElectroStatic Discharge (ESD) under normal handling. When handling ensure that the appropriate precautions are taken as described in JESD625-A or equivalent standards. 15. Soldering of SMD packages This text provides a very brief insight into a complex technology. A more in-depth account of soldering ICs can be found in Application Note AN10365 "Surface mount reflow soldering description". 15.1 Introduction to soldering Soldering is one of the most common methods through which packages are attached to Printed Circuit Boards (PCBs), to form electrical circuits. The soldered joint provides both the mechanical and the electrical connection. There is no single soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and Surface Mount Devices (SMDs) are mixed on one printed wiring board; however, it is not suitable for fine pitch SMDs. Reflow soldering is ideal for the small pitches and high densities that come with increased miniaturization. 15.2 Wave and reflow soldering Wave soldering is a joining technology in which the joints are made by solder coming from a standing wave of liquid solder. The wave soldering process is suitable for the following: * Through-hole components * Leaded or leadless SMDs, which are glued to the surface of the printed circuit board Not all SMDs can be wave soldered. Packages with solder balls, and some leadless packages which have solder lands underneath the body, cannot be wave soldered. Also, leaded SMDs with leads having a pitch smaller than ~0.6 mm cannot be wave soldered, due to an increased probability of bridging. The reflow soldering process involves applying solder paste to a board, followed by component placement and exposure to a temperature profile. Leaded packages, packages with solder balls, and leadless packages are all reflow solderable. Key characteristics in both wave and reflow soldering are: * * * * * * Board specifications, including the board finish, solder masks and vias Package footprints, including solder thieves and orientation The moisture sensitivity level of the packages Package placement Inspection and repair Lead-free soldering versus SnPb soldering 15.3 Wave soldering Key characteristics in wave soldering are: TJA1028 All information provided in this document is subject to legal disclaimers. (c) NXP B.V. 2011. All rights reserved. Product data sheet Rev. 2 -- 25 February 2011 18 of 24 NXP Semiconductors TJA1028 LIN transceiver with integrated voltage regulator * Process issues, such as application of adhesive and flux, clinching of leads, board transport, the solder wave parameters, and the time during which components are exposed to the wave * Solder bath specifications, including temperature and impurities 15.4 Reflow soldering Key characteristics in reflow soldering are: * Lead-free versus SnPb soldering; note that a lead-free reflow process usually leads to higher minimum peak temperatures (see Figure 10) than a SnPb process, thus reducing the process window * Solder paste printing issues including smearing, release, and adjusting the process window for a mix of large and small components on one board * Reflow temperature profile; this profile includes preheat, reflow (in which the board is heated to the peak temperature) and cooling down. It is imperative that the peak temperature is high enough for the solder to make reliable solder joints (a solder paste characteristic). In addition, the peak temperature must be low enough that the packages and/or boards are not damaged. The peak temperature of the package depends on package thickness and volume and is classified in accordance with Table 8 and 9 Table 8. SnPb eutectic process (from J-STD-020C) Package reflow temperature (C) Volume (mm3) < 350 < 2.5 2.5 Table 9. 235 220 Lead-free process (from J-STD-020C) Package reflow temperature (C) Volume (mm3) < 350 < 1.6 1.6 to 2.5 > 2.5 260 260 250 350 to 2000 260 250 245 > 2000 260 245 245 350 220 220 Package thickness (mm) Package thickness (mm) Moisture sensitivity precautions, as indicated on the packing, must be respected at all times. Studies have shown that small packages reach higher temperatures during reflow soldering, see Figure 10. TJA1028 All information provided in this document is subject to legal disclaimers. (c) NXP B.V. 2011. All rights reserved. Product data sheet Rev. 2 -- 25 February 2011 19 of 24 NXP Semiconductors TJA1028 LIN transceiver with integrated voltage regulator temperature maximum peak temperature = MSL limit, damage level minimum peak temperature = minimum soldering temperature peak temperature time 001aac844 MSL: Moisture Sensitivity Level Fig 10. Temperature profiles for large and small components For further information on temperature profiles, refer to Application Note AN10365 "Surface mount reflow soldering description". TJA1028 All information provided in this document is subject to legal disclaimers. (c) NXP B.V. 2011. All rights reserved. Product data sheet Rev. 2 -- 25 February 2011 20 of 24 NXP Semiconductors TJA1028 LIN transceiver with integrated voltage regulator 16. Revision history Table 10. Revision history Release date 20110225 Data sheet status Product data sheet Change notice Supersedes TJA1028 v.1 Document ID TJA1028 v.2 Modifications: * * * * * * * Section 1, Section 2, Section 7: text amended TJA1028TK/xxx/xx versions added Table 3: Table note 1 added Table 4, Table 5, Table 6: parameter values/conditions revised Table 7: parameter added - tdet(uv)(VCC); Table note 1 and Table note 2 revised Section 4, Section 14, Section 15 and Section 16: added Figure 6: revised Product data sheet - TJA1028 v.1 20100921 TJA1028 All information provided in this document is subject to legal disclaimers. (c) NXP B.V. 2011. All rights reserved. Product data sheet Rev. 2 -- 25 February 2011 21 of 24 NXP Semiconductors TJA1028 LIN transceiver with integrated voltage regulator 17. Legal information 17.1 Data sheet status Document status[1][2] Objective [short] data sheet Preliminary [short] data sheet Product [short] data sheet [1] [2] [3] Product status[3] Development Qualification Production Definition This document contains data from the objective specification for product development. This document contains data from the preliminary specification. This document contains the product specification. Please consult the most recently issued document before initiating or completing a design. The term `short data sheet' is explained in section "Definitions". The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 17.2 Definitions Draft -- The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet -- A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. Product specification -- The information and data provided in a Product data sheet shall define the specification of the product as agreed between NXP Semiconductors and its customer, unless NXP Semiconductors and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the NXP Semiconductors product is deemed to offer functions and qualities beyond those described in the Product data sheet. suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer's own risk. Applications -- Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer's sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer's applications and products planned, as well as for the planned application and use of customer's third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer's applications or products, or the application or use by customer's third party customer(s). Customer is responsible for doing all necessary testing for the customer's applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer's third party customer(s). NXP does not accept any liability in this respect. Limiting values -- Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale -- NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer's general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. No offer to sell or license -- Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. 17.3 Disclaimers Limited warranty and liability -- Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors' aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors. Right to make changes -- NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use in automotive applications -- This NXP Semiconductors product has been qualified for use in automotive applications. The product is not designed, authorized or warranted to be TJA1028 All information provided in this document is subject to legal disclaimers. (c) NXP B.V. 2011. All rights reserved. Product data sheet Rev. 2 -- 25 February 2011 22 of 24 NXP Semiconductors TJA1028 LIN transceiver with integrated voltage regulator Export control -- This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities. 17.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 18. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com TJA1028 All information provided in this document is subject to legal disclaimers. (c) NXP B.V. 2011. All rights reserved. Product data sheet Rev. 2 -- 25 February 2011 23 of 24 NXP Semiconductors TJA1028 LIN transceiver with integrated voltage regulator 19. Contents 1 2 3 4 5 6 6.1 6.2 7 7.1 7.1.1 7.1.2 7.1.3 7.1.3.1 7.1.4 7.1.5 7.2 7.2.1 7.2.2 7.3 7.4 7.5 7.5.1 7.5.2 7.5.3 8 9 10 11 12 12.1 13 14 15 15.1 15.2 15.3 15.4 16 17 17.1 17.2 17.3 17.4 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Pinning information . . . . . . . . . . . . . . . . . . . . . . 4 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 Functional description . . . . . . . . . . . . . . . . . . . 4 Operating modes . . . . . . . . . . . . . . . . . . . . . . . 5 Off mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Standby mode. . . . . . . . . . . . . . . . . . . . . . . . . . 5 Normal mode . . . . . . . . . . . . . . . . . . . . . . . . . . 6 The LIN transceiver in Normal mode . . . . . . . . 6 Sleep mode . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Transition from Normal to Sleep or Standby mode. . . . . . . . . . . . . . . . . . . . . . . . . . 6 Power supplies . . . . . . . . . . . . . . . . . . . . . . . . . 7 Battery (pin VBAT) . . . . . . . . . . . . . . . . . . . . . . . 7 Voltage regulator (pin VCC) . . . . . . . . . . . . . . . . 7 LIN transceiver . . . . . . . . . . . . . . . . . . . . . . . . 7 Remote wake-up . . . . . . . . . . . . . . . . . . . . . . . 8 Fail-safe features . . . . . . . . . . . . . . . . . . . . . . . 8 General fail-safe features . . . . . . . . . . . . . . . . . 8 TXD dominant time-out function . . . . . . . . . . . . 8 Temperature protection. . . . . . . . . . . . . . . . . . . 9 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 9 Thermal characteristics . . . . . . . . . . . . . . . . . 10 Static characteristics. . . . . . . . . . . . . . . . . . . . 10 Dynamic characteristics . . . . . . . . . . . . . . . . . 13 Test information . . . . . . . . . . . . . . . . . . . . . . . . 15 Quality information . . . . . . . . . . . . . . . . . . . . . 15 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 16 Handling information. . . . . . . . . . . . . . . . . . . . 18 Soldering of SMD packages . . . . . . . . . . . . . . 18 Introduction to soldering . . . . . . . . . . . . . . . . . 18 Wave and reflow soldering . . . . . . . . . . . . . . . 18 Wave soldering . . . . . . . . . . . . . . . . . . . . . . . . 18 Reflow soldering . . . . . . . . . . . . . . . . . . . . . . . 19 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 21 Legal information. . . . . . . . . . . . . . . . . . . . . . . 22 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 22 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 23 18 19 Contact information . . . . . . . . . . . . . . . . . . . . 23 Contents. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section `Legal information'. (c) NXP B.V. 2011. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 25 February 2011 Document identifier: TJA1028 |
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