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| HV852 High Voltage, Low Noise, Inductorless EL Lamp Driver Features No external components required when using an external EL clock frequency EL frequency can be set by an external resistor Low Noise DC to AC converter Drives up to 5.3nF (approx. 1.5in2 lamp) load Output voltage regulation Enable function General Description The Supertex HV852 is a high voltage, low noise, inductorless EL (electroluminescent) lamp driver. It is designed to drive EL lamps of up to 1.5in2, with capacitive values up to 5.3nF over an input voltage range of 2.4V to 5.0V. The HV852 converts a low voltage DC input to a high voltage AC output across an EL lamp. It uses a charge pump scheme to boost the input voltage eliminating the need for an external inductor, diode, and high voltage capacitor commonly found in conventional topologies. The charge pump circuit discharges its energy into an EL lamp through a high voltage H-bridge. Once the voltage reaches its regulated limit, it is turned off to conserve power. The EL lamp is then discharged to ground and the H-bridge changes state to allow the charge pump to charge the EL lamp in the opposite direction. Applications Cellular phone keypad Watches Small handheld wireless devices MP3 Players Typical Application Circuit + VDD CDD REL VDD REL EN CLKIN VA VB GND CLKEN EL LAMP VDD = ON GND = OFF HV852 EL Lamp frequency set by REL HV852 Ordering Information Package Options Device 8-Lead MSOP 3x3mm body, 1.10mm height (max), 0.65mm pitch Pin Configurations VDD 1 REL 2 EN 3 CLKIN 4 8 VA 7 VB 6 10-Lead DFN 3x3mm body, 0.80mm height (max), 0.50mm pitch VDD 1 REL EN 2 3 4 10 9 8 7 6 VA VB GND GND CLKEN GND CLKIN HV852 HV852MG-G HV852K7-G 5 CLKEN VDD 5 -G indicates package is RoHS compliant (`Green') 8-Lead MSOP (top view) 10-Lead QFN (top view) Note: Pads are at the bottom of the package. Center heat slug is at ground potential. Product Marking Top Marking Absolute Maximum Ratings Parameter VDD, Supply Voltage Operating Temperature Storage Temperature Power Dissipation 8-Lead MSOP Power Dissipation 10-Lead DFN Value -0.5V to 6.5V -25C to +85C -65C to +150C 300mW 1.6W H852 LLLL Bottom Marking L = Lot Number YY = Year Sealed WW = Week Sealed = "Green" Packaging YYWW 8-Lead MSOP Y = Last Digit of Year Sealed W = Code for Week Sealed L = Lot Number = "Green" Packaging Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. Continuous operation of the device at the absolute rating level may affect device reliability. All voltages are referenced to device ground. H852 YWLL 10-Lead DFN Electrical Characteristics (Over recommended operating conditions unless otherwise specified: TA = 25C, VDD = 3.5V) Symbol IDDQ VA or VB VA-VB IDD VA or VB VA-VB fEL trout Parameter Quiescent current Peak output voltage Peak to Peak output voltage Operating current Peak output voltage Peak to Peak output voltage EL lamp frequency Output voltage rise time Min 72 144 72 144 210 - Typ 82 164 15.2 82 164 250 640 Max 200 92 184 30 92 184 300 - Units nA V V mA V V Hz s Conditions EN = 0V No load See Figure 1, VDD = 3.5V, REL = 1.5M, Load = 3.3nF+1K 1.0in2 lamp, 0V to 90% of final value 2 HV852 Logic Inputs Symbol VIL VIH IIL IIH ENrise ENfall Cin Parameter Input logic low voltage Input logic high voltage Min 0 1.75 2.0 Typ - Max 0.5 VDD VDD 1.0 1.0 10 5 10 Units V V V A A ms Conditions --VDD = 2.4 to 4.3V. Temp = -25O to 85OC VDD = 4.3 to 5.0V. Temp = -25O to 85OC ----- Input logic low current Input logic high current Enable input rise time (for delay turn off) Enable input fall time (for delay turn off) Logic input capacitance 0.01 10 - Using external R-C circuit, see Figure 2 s pF --- Recommended Operating Conditions Symbol VDD fEL Cload TA Parameter Input voltage EL lamp frequency EL lamp capacitance Operating Temperature Min 2.4 50 0 -25 Typ - Max 5.0 500 5.3 +85 Units V Hz nF C Conditions --------- Typical Output Waveform Test Conditions: HV852 driving a 1.0in2 EL lamp VDD= 3.6V and REL= 1.5M, VA-VB waveform 3 HV852 Functional Block Diagram VDD EN VDD Capacitor Charge Pump Circuit VA VSENSE Feedback CLKIN CLKEN REL VDD EL Oscillator High Voltage Level Translators VB MOSFET Full Bridge GND Pin Description Name VDD Description Input supply voltage pin. An external resistor to VDD will set the EL lamp frequency. The EL frequency is inversely proportional to the REL resistor value. A 1.5M resistor would provide a nominal lamp frequency of 250Hz. REL When using an external clock to set the EL lamp frequency, the REL pin should be connected to ground. EN CLKIN CLKEN Gnd VB VA Enable input pin. Logic high will turn the device on. An external R-C circuit can be added for a delayed turn off. Logic input pin. An external logic clock applied to this pad can be used to set the EL lamp frequency (see Figure 3). The EL lamp frequency is the external clock frequency divided by 128. This is useful for applications requiring the EL lamp to be synchronized to a system clock. Connect to ground when not in use. Logic input pin. Logic high will cause the EL lamp frequency to be set by the CLKIN input. Logic low will cause the EL lamp frequency to be set by the external REL resistor. IC ground pin. EL lamp driver output pin. The EL lamp is connected across VA and VB terminals. EL lamp driver output pin. The EL lamp is connected across VA and VB terminals. Typical Performance (The following was the observed performance when driving a 1.0in2 green lamp) Load REL VDD 2.4V 3.0V IDD 17.56mA 17.53mA 17.44mA 17.65mA 18.35mA VA-VB 77V 79V 79V 79V 79V fEL 3.3nF+1K 1.5M 3.6V 4.2V 5.0V 245Hz 4 HV852 Figure 1: Typical Application + VDD - CDD REL VDD REL EN CLKIN VA VB GND CLKEN EL Lamp VDD = ON GND = OFF HV852 Note: CDD = 2.2F, 6.3V ceramic capacitor Figure 2: Push Button Turn on with Delay Turn off + VDD Push Button Turn On CDD C REL VDD REL EN VA VB GND CLKEN EL Lamp - R CLKIN HV852 RC time constant will set Turn OFF Delay time Figure 3: Independent Programmable Output Frequency (fEL) + VDD VDD = ON GND = OFF VDD GND fCLK CDD VDD REL EN CLKIN VA VB GND CLKEN VDD EL Lamp HV852 EL Lamp frequency set by an external clock Note: fEL = fCLK/128 5 HV852 10-Lead DFN Package Outline (K7) 3x3mm body, 0.80mm height (max), 0.50mm pitch 10 D D2 10 E Note 1 (Index Area D/2 x E/2) E2 1 b e 1 View B Note 1 (Index Area D/2 x E/2) Top View Bottom View Note 3 A A3 A1 Seating Plane Note 2 L L1 Side View View B Notes: 1. Details of Pin 1 identifier are optional, but must be located within the indicated area. The Pin 1 identifier may be either a mold, or an embedded metal or marked feature. 2. Depending on the method of manufacturing, a maximum of 0.15mm pullback (L1) may be present. 3. The inner tip of the lead may be either rounded or square. Symbol MIN Dimension (mm) NOM MAX A 0.70 0.75 0.80 A1 0.00 0.02 0.05 A3 0.20 REF b 0.18 0.25 0.30 D 2.85 3.00 3.15 D2 2.20 2.70 E 2.85 3.00 3.15 E2 1.40 1.75 e 0.50 BSC L 0.30 0.40 0.50 L1 0.15 0O 14O JEDEC Registration MO-229, Variation WEED-5, Issue C, Aug. 2003. Drawings not to scale. 6 HV852 8-Lead MSOP Package Outline (MG) 3x3mm body, 1.10mm height (max), 0.65mm pitch D 8 1 (x4) E E1 Note 1 (Index Area D1/2 x E1/2) L L2 Gauge Plane 1 L1 Seating Plane Top View A View B View B A A2 Seating Plane A1 e b A Side View View A-A Note 1: A Pin 1 identifier must be located in the index area indicated. The Pin 1 identifier may be either a mold, or an embedded metal or marked feature. Symbol Dimension (mm) MIN NOM MAX A 0.75 1.10 A1 0.00 0.15 A2 0.75 0.85 0.95 b 0.22 0.38 D 2.80 3.00 3.20 E 4.65 4.90 5.15 E1 2.80 3.00 3.20 e 0.65 BSC L 0.40 0.60 0.80 L1 0.95 REF L2 0.25 BSC 0 8 O 1 5O 15O O JEDEC Registration MO-187, Variation AA, Issue E, Dec. 2004. Drawings not to scale. (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to http://www.supertex.com/packaging.html.) Doc.# DSFP-HV852 NR061907 7 |
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