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MCP6401/1R/1U/2/4 1 MHz, 45 A Op Amps Features * * * * * * * Low Quiescent Current: 45 A (typical) Gain Bandwidth Product: 1 MHz (typical) Rail-to-Rail Input and Output Supply Voltage Range: 1.8V to 6.0V Unity Gain Stable Extended Temperature Range: -40C to +125C No Phase Reversal Description The Microchip Technology Inc. MCP6401/1R/1U/2/4 family of operational amplifiers (op amps) has low quiescent current (45 A, typical) and rail-to-rail input and output operation. This family is unity gain stable and has a gain bandwidth product of 1 MHz (typical). These devices operate with a single supply voltage as low as 1.8V. These features make the family of op amps well suited for single-supply, battery-powered applications. The MCP6401/1R/1U/2/4 family is designed with Microchip's advanced CMOS process and offered in single packages. All devices are available in the extended temperature range, with a power supply range of 1.8V to 6.0V. Applications * * * * * * * Portable Equipment Battery Powered System Medical Instrumentation Data Acquisition Equipment Sensor Conditioning Supply Current Sensing Analog Active Filters Package Types MCP6401 SC70-5, SOT-23-5 VOUT 1 VSS 2 VIN+ 3 Design Aids * * * * * * SPICE Macro Models FilterLab(R) Software MindiTM Circuit Designer and Simulator Microchip Advanced Part Selector (MAPS) Analog Demonstration and Evaluation Boards Application Notes MCP6401R SOT-23-5 VOUT 1 VDD 2 VIN+ 3 5 VDD 4 VIN- 5 VSS 4 VIN- MCP6402 SOIC VOUTA 1 VINA- 2 VINA+ 3 8 VDD 7 VOUTB 6 VINB- 5 VINB+ MCP6401U SOT-23-5 VIN+ 1 VSS 2 VIN- 3 Typical Application R2 D2 VIN R1 VOUT MCP6401 D1 5 VDD 4 VOUT VSS 4 MCP6402 2x3 TDFN VOUTA 1 VINA- 2 VINA+ 3 VSS 4 MCP6404 SOIC, TSSOP 8 VDD VOUTA 1 14 VOUTD 13 VIND- 12 VIND+ 11 VSS 10 VINC+ 9 VINC- 8 VOUTC - 7 VOUTB VINA 2 V+ 6 VINB- INA 3 5 V + VDD 4 INB EP 9 VINB+ 5 Precision Half-Wave Rectifier VINB- 6 VOUTB 7 (c) 2010 Microchip Technology Inc. DS22229B-page 1 MCP6401/1R/1U/2/4 NOTES: DS22229B-page 2 (c) 2010 Microchip Technology Inc. MCP6401/1R/1U/2/4 1.0 1.1 ELECTRICAL CHARACTERISTICS Absolute Maximum Ratings Notice: Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. See Section 4.1.2 "Input Voltage Limits" VDD - VSS ........................................................................7.0V Current at Input Pins .....................................................2 mA Analog Inputs (VIN+, VIN-) .......... VSS - 1.0V to VDD + 1.0V All Other Inputs and Outputs ......... VSS - 0.3V to VDD + 0.3V Difference Input Voltage ...................................... |VDD - VSS| Output Short-Circuit Current ................................ Continuous Current at Output and Supply Pins ............................30 mA Storage Temperature ....................................-65C to +150C Maximum Junction Temperature (TJ) .......................... +150C ESD Protection on All Pins (HBM; MM) ............... 4 kV; 300V DC ELECTRICAL SPECIFICATIONS Electrical Characteristics: Unless otherwise indicated, VDD = +1.8V to +6.0V, VSS= GND, TA= +25C, VCM = VDD/2, VOUT VDD/2, VL = VDD/2 and RL = 100 k to VL. (Refer to Figure 1-1). Parameters Input Offset Input Offset Voltage Input Offset Drift with Temperature Power Supply Rejection Ratio Input Bias Current and Impedance Input Bias Current IB -- -- -- Input Offset Current Common Mode Input Impedance Differential Input Impedance Common Mode Common Mode Input Voltage Range Common Mode Rejection Ratio VCMR CMRR VSS-0.2 VSS-0.3 56 63 Open-Loop Gain DC Open-Loop Gain (Large Signal) Output Maximum Output Voltage Swing Output Short-Circuit Current Power Supply Supply Voltage Quiescent Current per Amplifier Note 1: VDD IQ 1.8 20 -- 45 6.0 70 V A IO = 0, VDD = 5.0V VCM = 0.2VDD VOL, VOH ISC VSS+20 -- -- -- 5 15 VDD-20 -- -- mV mA mA VDD = 6.0V, RL = 10 k 0.5V input overdrive VDD = 1.8V VDD = 6.0V AOL 90 110 -- dB VOUT = 0.3V to VDD-0.3V VCM = VSS -- -- 71 78 VDD+0.2 VDD+0.3 -- -- V V dB dB VDD = 1.8V, Note 1 VDD = 6.0V, Note 1 VCM = -0.2V to 2.0V, VDD = 1.8V VCM = -0.3V to 6.3V, VDD = 6.0V IOS ZCM ZDIFF -- -- -- 1.0 30 800 1.0 10 ||6 1013||6 13 Sym Min Typ Max Units Conditions VOS VOS/TA PSRR -4.5 -- 63 -- 2.0 78 +4.5 -- -- 100 -- -- -- -- -- mV VCM = VSS V/C TA= -40C to +125C, VCM = VSS dB pA pA pA pA ||pF ||pF TA = +85C TA = +125C VCM = VSS Figure 2-11 shows how VCMR changes across temperature. (c) 2010 Microchip Technology Inc. DS22229B-page 3 MCP6401/1R/1U/2/4 AC ELECTRICAL SPECIFICATIONS Electrical Characteristics: Unless otherwise indicated, TA = +25C, VDD = +1.8 to +6.0V, VSS = GND, VCM = VDD/2, VOUT VDD/2, VL = VDD/2, RL = 100 k to VL and CL = 60 pF. (Refer to Figure 1-1). Parameters AC Response Gain Bandwidth Product Phase Margin Slew Rate Noise Input Noise Voltage Input Noise Voltage Density Input Noise Current Density Eni eni ini -- -- -- 3.6 28 0.6 -- -- -- Vp-p nV/Hz fA/Hz f = 0.1 Hz to 10 Hz f = 1 kHz f = 1 kHz GBWP PM SR -- -- -- 1 65 0.5 -- -- -- MHz V/s G = +1 V/V Sym Min Typ Max Units Conditions TEMPERATURE SPECIFICATIONS Electrical Characteristics: Unless otherwise indicated, VDD = +1.8V to +6.0V and VSS = GND. Parameters Temperature Ranges Operating Temperature Range Storage Temperature Range Thermal Package Resistances Thermal Resistance, 5L-SC70 Thermal Resistance, 5L-SOT-23 Thermal Resistance, 8L-SOIC Thermal Resistance, 8L-2x3 TDFN Thermal Resistance, 14L-SOIC Thermal Resistance, 14L-TSSOP JA JA JA JA JA JA -- -- -- -- -- -- 331 220.7 149.5 41 95.3 100 -- -- -- -- -- -- C/W C/W C/W C/W C/W C/W TA TA -40 -65 -- -- +125 +150 C C Note 1 Sym Min Typ Max Units Conditions Note 1: The internal junction temperature (TJ) must not exceed the absolute maximum specification of +150C. 1.2 Test Circuits CF 6.8 pF RG 100 k VP VIN+ MCP640x VIN- VM RG 100 k (V/V) (V) (mV) CF 6.8 pF VL RF 100 k RL 100 k VOUT CL 60 pF CB1 100 nF RF 100 k VDD VDD/2 The circuit used for most DC and AC tests is shown in Figure 1-1. This circuit can independently set VCM and VOUT; see Equation 1-1. Note that VCM is not the circuit's Common Mode voltage ((VP + VM)/2), and that VOST includes VOS plus the effects (on the input offset error, VOST) of temperature, CMRR, PSRR and AOL. EQUATION 1-1: V CM = ( V P + V DD 2 ) 2 V OST = VIN- - V IN+ Where: GDM = Differential Mode Gain VCM = Op Amp's Common Mode Input Voltage VOST = Op Amp's Total Input Offset Voltage V OUT = ( VDD 2 ) + ( VP - V M ) + V OST ( 1 + GDM ) G DM = R F R G CB2 1 F FIGURE 1-1: AC and DC Test Circuit for Most Specifications. (c) 2010 Microchip Technology Inc. DS22229B-page 4 MCP6401/1R/1U/2/4 2.0 Note: TYPICAL PERFORMANCE CURVES The graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purposes only. The performance characteristics listed herein are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified operating range (e.g., outside specified power supply range) and therefore outside the warranted range. Note: Unless otherwise indicated, TA = +25C, VDD = +1.8V to +6.0V, VSS = GND, VCM = VDD/2, VOUT VDD/2, VL = VDD/2, RL = 100 k to VL and CL = 60 pF. 24% Percentage of Occurences Input Offset Voltage (V) 1200 1000 800 600 400 200 0 -200 -400 -600 -800 -1000 -0.5 21% 18% 15% 12% 9% 6% 3% 0% -5 1760 Samples VCM = VSS VDD = 1.8V Representative Part TA = TA = TA = TA = +125C +85C +25C -40C 0.5 -0.3 -4 -3 -2 -1 0 1 2 3 Input Offset Voltage (mV) 4 5 FIGURE 2-1: Input Offset Voltage. FIGURE 2-4: Input Offset Voltage vs. Common Mode Input Voltage with VDD = 1.8V. 1000 Input Offset Voltage (V) 45% Percentage of Occurences 40% 35% 30% 25% 20% 15% 10% 5% 0% -10 -8 -6 -4 -2 0 2 4 6 8 Input Offset Voltage Drift (V/C) 10 1760 Samples VCM = VSS TA = -40C to +125C 750 500 250 0 -250 -500 -750 -1000 1.0 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 Output Voltage (V) 6.0 0.0 0.5 1.5 Representative Part VDD = 1.8V VDD = 6.0V FIGURE 2-2: Input Offset Voltage Drift. FIGURE 2-5: Output Voltage. 1000 Input Offset Voltage (V) -0.1 Common Mode Input Voltage (V) Input Offset Voltage vs. 1000 900 800 700 600 500 400 300 200 100 0 -100 -0.5 Input Offset Voltage (V) VDD = 6.0V Representative Part 800 600 400 200 0 -200 -400 -600 -800 TA TA TA TA = +125C = +85C = +25C = -40C Representative Part TA = TA = TA = TA = +125C +85C +25C -40C 6.5 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 Common Mode Input Voltage (V) 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 Power Supply Voltage (V) FIGURE 2-3: Input Offset Voltage vs. Common Mode Input Voltage with VDD = 6.0V. FIGURE 2-6: Input Offset Voltage vs. Power Supply Voltage. (c) 2010 Microchip Technology Inc. DS22229B-page 5 2.3 0.7 1.5 1.7 0.9 1.1 1.3 1.9 2.1 0.1 0.3 MCP6401/1R/1U/2/4 Note: Unless otherwise indicated, TA = +25C, VDD = +1.8V to +6.0V, VSS = GND, VCM = VDD/2, VOUT VDD/2, VL = VDD/2, RL = 100 k to VL and CL = 60 pF. 1,000 Input Noise Voltage Density (nV/Hz) 90 85 CMRR, PSRR (dB) 80 75 70 65 60 55 10 50 0.1 0.1 PSRR (VDD = 1.8V to 6.0V, VCM = V SS) 100 CMRR (V DD = 6.0V, V CM = -0.3V to 6.3V) CMRR (VDD = 1.8V, VCM = -0.2V to 2.0V) 11 100 1000 1010 100 1k Frequency (Hz) 10000 100k 100000 10k -50 -25 0 25 50 75 Ambient Temperature (C) 100 125 FIGURE 2-7: vs. Frequency. 40 35 30 25 20 15 10 5 0 -0.5 f = 1 kHz VDD = 6.0 V Input Noise Voltage Density FIGURE 2-10: Temperature. 0.35 0.30 0.25 0.20 0.15 0.10 0.05 0.00 -0.05 -0.10 -0.15 -0.20 -0.25 -0.30 -0.35 -50 CMRR, PSRR vs. Ambient Common Mode Input Voltage Range Limits (V) Input Noise Voltage Density (nV/Hz) VCMR_H - VDD @ VDD = 6.0V VCMR_H - VDD @ VDD = 1.8V VCMR_L - VSS @ VDD = 1.8V VCMR_L - VSS @ VDD = 6.0V 5.5 6.0 0.0 0.5 6.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 Common Mode Input Voltage (V) -25 0 25 50 75 100 Ambient Temperature (C) 125 FIGURE 2-8: Input Noise Voltage Density vs. Common Mode Input Voltage. 100 90 CMRR, PSRR (dB) 80 70 60 50 40 30 20 10 10 100 100 1k 10k 1000 10000 Frequency (Hz) 100k 1M 100000 1000000 CMRR PSRRPSRR+ Representative Part FIGURE 2-11: Common Mode Input Voltage Range Limits vs. Ambient Temperature. 10000 Input Bias, Offset Current (pA) VDD = 6.0V 1000 Input Bias Current 100 10 Input Offset Current 1 25 35 45 55 65 75 85 95 105 115 125 Ambient Temperature (C) FIGURE 2-9: Frequency. CMRR, PSRR vs. FIGURE 2-12: Input Bias, Offset Current vs. Ambient Temperature. DS22229B-page 6 (c) 2010 Microchip Technology Inc. MCP6401/1R/1U/2/4 Note: Unless otherwise indicated, TA = +25C, VDD = +1.8V to +6.0V, VSS = GND, VCM = VDD/2, VOUT VDD/2, VL = VDD/2, RL = 100 k to VL and CL = 60 pF. 1000 Input Bias Current (pA) 120 Open-Loop Gain (dB) 100 80 60 40 20 0 -20 1.0E-01 0 Open-Loop Gain TA = +125C 100 -60 Open-Loop Phase -90 -120 -150 10 VDD = 6.0V TA = +85C 1 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 Common Mode Input Voltage (V) VDD = 6.0V -180 100 1k 10k 100k 1M 10M Frequency (Hz) 1.0E+02 1.0E+03 1.0E+04 1.0E+05 1.0E+06 1.0E+07 0.1 1.0E+00 1 1.0E+01 10 -210 FIGURE 2-13: Input Bias Current vs. Common Mode Input Voltage. 70 65 60 55 50 45 40 35 30 25 20 -50 -25 0 25 50 75 100 Ambient Temperature (C) 125 FIGURE 2-16: Frequency. 150 145 140 135 130 125 120 115 110 105 100 1.5 Open-Loop Gain, Phase vs. Quiescent Current (A/Amplifier) VDD = 6.0V VDD = 5.0V VDD = 1.8V DC Open-Loop Gain (dB) VCM = 0.2V DD R L = 10 k VSS + 0.3V < V OUT < V DD - 0.3V 2.0 2.5 3.0 3.5 4.0 4.5 5.0 Power Supply Voltage (V) 5.5 6.0 FIGURE 2-14: Quiescent Current vs. Ambient Temperature. 70 Quiescent Current (A) 60 50 40 30 20 10 0 5.0 5.5 6.0 6.5 Power Supply Voltage (V) 7.0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 TA = TA = TA = TA = +125C +85C +25C -40C VCM = 0.2VDD FIGURE 2-17: DC Open-Loop Gain vs. Power Supply Voltage. 150 145 VDD = 6.0V 140 135 130 125 120 VDD = 1.8V 115 110 Large Signal AOL 105 100 0.00 0.05 0.10 0.15 0.20 Output Voltage Headroom VDD - VOH or VOL-VSS (V) DC Open-Loop Gain (dB) 0.25 FIGURE 2-15: Quiescent Current vs. Power Supply Voltage. FIGURE 2-18: DC Open-Loop Gain vs. Output Voltage Headroom. (c) 2010 Microchip Technology Inc. DS22229B-page 7 Open-Loop Phase () -30 MCP6401/1R/1U/2/4 Note: Unless otherwise indicated, TA = +25C, VDD = +1.8V to +6.0V, VSS = GND, VCM = VDD/2, VOUT VDD/2, VL = VDD/2, RL = 100 k to VL and CL = 60 pF. 1.6 Gain Bandwidth Product (MHz) 1.5 1.4 1.3 1.2 1.1 1.0 0.9 0.8 0.7 -50 -25 0 25 50 75 100 Ambient Temperature (C) V DD = 6.0V Phase Margin Gain Bandwidth Product 90 80 75 70 65 60 55 50 45 125 Output Voltage Swing (V P-P) 85 Phase Margin () 10 V DD = 6.0V V DD = 1.8V 1 0.1 100 100 1k 1000 10k 100k 10000 100000 Frequency (Hz) 1M 1000000 FIGURE 2-19: Gain Bandwidth Product, Phase Margin vs. Ambient Temperature. 1.6 Gain Bandwidth Product (MHz) 1.5 1.4 1.3 1.2 1.1 1.0 0.9 0.8 0.7 -50 -25 0 25 50 75 100 Ambient Temperature (C) V DD = 1.8V Phase Margin Gain Bandwidth Product FIGURE 2-22: Frequency. 1000 Output Voltage Headroom (mV) 100 Output Voltage Swing vs. 90 85 75 70 65 60 55 50 45 125 Phase Margin () 80 VDD - VOH @ VDD = 1.8V VOL - VSS @ VDD = 1.8V 10 1 0.1 0.01 10 VDD - VOH @ VDD = 6.0V VOL - VSS @ VDD = 6.0V RL = 10 k 0.1 1 100 1000 Output Current (mA) 10 10000 FIGURE 2-20: Gain Bandwidth Product, Phase Margin vs. Ambient Temperature. 30 FIGURE 2-23: Output Voltage Headroom vs. Output Current. 24 22 20 18 16 14 12 10 8 6 4 2 0 -50 -25 Output Short Circuit Current (mA) Output Voltage Headroom VDD - VOH or VOL - VSS (mV) 25 20 15 10 5 0 0.0 0.5 1.0 6.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 Power Supply Voltage (V) T A = -40C T A = +25C T A = +85C T A = +125C VDD - VOH @ VDD = 6.0V VOL - VSS@ VDD = 6.0V VDD - VOH @ VDD = 1.8V VOL - VSS @ VDD = 1.8V 0 25 50 75 100 Ambient Temperature (C) 125 FIGURE 2-21: Output Short Circuit Current vs. Power Supply Voltage. FIGURE 2-24: Output Voltage Headroom vs. Ambient Temperature. DS22229B-page 8 (c) 2010 Microchip Technology Inc. MCP6401/1R/1U/2/4 Note: Unless otherwise indicated, TA = +25C, VDD = +1.8V to +6.0V, VSS = GND, VCM = VDD/2, VOUT VDD/2, VL = VDD/2, RL = 100 k to VL and CL = 60 pF. 0.9 0.8 Slew Rate (V/s) 0.7 0.6 0.5 0.4 0.3 0.2 0.1 -50 -25 0 25 50 75 Ambient Temperature (C) 100 125 Falling Edge, VDD = 1.8V Rising Edge, VDD = 1.8V Falling Edge, VDD = 6.0V Rising Edge, V DD = 6.0V 6.0 5.5 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.0 Output Voltage (V) VDD = 6.0V G = +1 V/V Time (20 s/div) FIGURE 2-25: Temperature. Slew Rate vs. Ambient FIGURE 2-28: Pulse Response. 6.0 5.5 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.0 Large Signal Non-Inverting Output Voltage (20 mv/div) Output Voltage (V) VDD = 6.0V G = -1 V/V VDD = 6.0V G = +1 V/V Time (2 s/div) Time (20 s/div) FIGURE 2-26: Pulse Response. Small Signal Non-Inverting FIGURE 2-29: Response. 7.0 Large Signal Inverting Pulse Output Voltage (20 mv/div) Input, Output Voltages (V) 6.0 5.0 4.0 3.0 2.0 1.0 0.0 -1.0 V DD = 6.0V G = +2 V/V VIN VOUT VDD = 6.0V G = -1 V/V Time (2 s/div) Time (0.1 ms/div) FIGURE 2-27: Response. Small Signal Inverting Pulse FIGURE 2-30: The MCP6401/1R/1U/2/4 Shows No Phase Reversal. (c) 2010 Microchip Technology Inc. DS22229B-page 9 MCP6401/1R/1U/2/4 Note: Unless otherwise indicated, TA = +25C, VDD = +1.8V to +6.0V, VSS = GND, VCM = VDD/2, VOUT VDD/2, VL = VDD/2, RL = 100 k to VL and CL = 60 pF. Channel to Channel Separation (dB) 10000 Closed Loop Output Impedance () 150 140 130 120 110 100 90 80 100 1000 100 GN: 101 V/V 11 V/V 1 V/V 10 Input Referred 1 1.0E+01 10 1.0E+02 100 1.0E+04 1k 10k Frequency (Hz) 1.0E+03 1.0E+05 100k 1.0E+06 1M 100 1000 10000 1k 10k Frequency (Hz) 100000 100k FIGURE 2-31: Closed Loop Output Impedance vs. Frequency. 1.E-03 1m 1.E-04 100 1.E-05 10 1.E-06 1 -IIN (A) 1.E-07 100n 1.E-08 10n 1.E-09 1n 1.E-10 100p 1.E-11 10p FIGURE 2-33: Channel-to-Channel Separation vs. Frequency (MCP6402/4 only). TA = TA = TA = TA = -40C +25C +85C +125C 1.E-12 1p -1.0 -0.9 -0.8 -0.7 -0.6 -0.5 -0.4 -0.3 -0.2 -0.1 0.0 VIN (V) FIGURE 2-32: Measured Input Current vs. Input Voltage (below VSS). DS22229B-page 10 (c) 2010 Microchip Technology Inc. MCP6401/1R/1U/2/4 3.0 PIN DESCRIPTIONS Descriptions of the pins are listed in Table 3-1. TABLE 3-1: SC70-5, SOT-23-5 1 4 3 5 -- -- -- -- -- -- 2 -- -- -- -- PIN FUNCTION TABLE MCP6402 SOIC 1 2 3 8 5 6 7 -- -- -- 4 -- -- -- -- 2x3 TDFN 1 2 3 8 5 6 7 -- -- -- 4 -- -- -- 9 MCP6404 SOIC, TSSOP 1 2 3 4 5 6 7 8 9 10 11 12 13 14 -- Symbol Description MCP6401 MCP6401R MCP6401U SOT-23-5 1 4 3 2 -- -- -- -- -- -- 5 -- -- -- -- SOT-23-5 4 3 1 5 -- -- -- -- -- -- 2 -- -- -- -- VOUT, VOUTA Analog Output (op amp A) VIN-, VINA- Inverting Input (op amp A) VIN+, VINA+ Non-inverting Input (op amp A) VDD VINB+ VINB- VOUTB VOUTC VINC- VINC+ VSS VIND+ VIND- VOUTD EP Positive Power Supply Non-inverting Input (op amp B) Inverting Input (op amp B) Analog Output (op amp B) Analog Output (op amp C) Inverting Input (op amp C) Non-inverting Input (op amp C) Negative Power Supply Non-inverting Input (op amp D) Inverting Input (op amp D) Analog Output (op amp D) Exposed Thermal Pad (EP); must be connected to VSS. 3.1 Analog Output (VOUT) 3.3 Power Supply Pin (VDD, VSS) The output pin is low-impedance voltage source. 3.2 Analog Inputs (VIN+, VIN-) The non-inverting and inverting inputs are highimpedance CMOS inputs with low bias currents. The positive power supply (VDD) is 1.8V to 6.0V higher than the negative power supply (VSS). For normal operation, the other pins are at voltages between VSS and VDD. Typically, these parts are used in a single (positive) supply configuration. In this case, VSS is connected to ground and VDD is connected to the supply. VDD will need bypass capacitors. (c) 2010 Microchip Technology Inc. DS22229B-page 11 MCP6401/1R/1U/2/4 NOTES: DS22229B-page 12 (c) 2010 Microchip Technology Inc. MCP6401/1R/1U/2/4 4.0 APPLICATION INFORMATION VDD D1 V1 MCP640x V2 D2 The MCP6401/1R/1U/2/4 family of op amps is manufactured using Microchip's state-of-the-art CMOS process and is specifically designed for low-power, high precision applications. U1 VOUT 4.1 4.1.1 Rail-to-Rail Input PHASE REVERSAL The MCP6401/1R/1U/2/4 op amps are designed to prevent phase reversal when the input pins exceed the supply voltages. Figure 2-30 shows the input voltage exceeding the supply voltage with no phase reversal. FIGURE 4-2: Inputs. Protecting the Analog 4.1.2 INPUT VOLTAGE LIMITS In order to prevent damage and/or improper operation of these amplifiers, the circuit must limit the voltages at the input pins (see Section 1.1 "Absolute Maximum Ratings "). The ESD protection on the inputs can be depicted as shown in Figure 4-1. This structure was chosen to protect the input transistors against many (but not all) over-voltage conditions, and to minimize the input bias current (IB). VDD Bond Pad A significant amount of current can flow out of the inputs when the Common Mode voltage (VCM) is below ground (VSS); See Figure 2-32. 4.1.3 INPUT CURRENT LIMITS In order to prevent damage and/or improper operation of these amplifiers, the circuit must limit the currents into the input pins (see Section 1.1 "Absolute Maximum Ratings "). Figure 4-3 shows one approach to protecting these inputs. The resistors R1 and R2 limit the possible currents in or out of the input pins (and the ESD diodes, D1 and D2). The diode currents will go through either VDD or VSS. VDD D1 V1 R1 MCP640x V2 R2 VSS - min(V1, V2) 2 mA max(V1,V2) - VDD 2 mA D2 VIN+ Bond Pad Input Stage Bond V - IN Pad U1 VOUT VSS Bond Pad FIGURE 4-1: Structures. Simplified Analog Input ESD min(R1,R2) > min(R1,R2) > The input ESD diodes clamp the inputs when they try to go more than one diode drop below VSS. They also clamp any voltages that go well above VDD; their breakdown voltage is high enough to allow normal operation, but not low enough to protect against slow over-voltage (beyond VDD) events. Very fast ESD events (that meet the spec) are limited so that damage does not occur. In some applications, it may be necessary to prevent excessive voltages from reaching the op amp inputs; Figure 4-2 shows one approach to protecting these inputs. FIGURE 4-3: Inputs. 4.1.4 Protecting the Analog NORMAL OPERATION The input stage of the MCP6401/1R/1U/2/4 op amps uses two differential input stages in parallel. One operates at a low Common Mode input voltage (VCM), while the other operates at a high VCM. With this topology, the device operates with a VCM up to 300 mV above VDD and 300 mV below VSS. (See Figure 2-11). The input offset voltage is measured at VCM = VSS - 0.3V and VDD + 0.3V to ensure proper operation. The transition between the input stages occurs when VCM is near VDD - 1.1V (See Figures 2-3 and 2-4). For the best distortion performance and gain linearity, with non-inverting gains, avoid this region of operation. (c) 2010 Microchip Technology Inc. DS22229B-page 13 MCP6401/1R/1U/2/4 4.2 Rail-to-Rail Output The output voltage range of the MCP6401/1R/1U/2/4 op amps is VSS + 20 mV (minimum) and VDD - 20 mV (maximum) when RL = 10 k is connected to VDD/2 and VDD = 6.0V. Refer to Figures 2-23 and 2-24 for more information. After selecting RISO for your circuit, double-check the resulting frequency response peaking and step response overshoot. Modify RISO's value until the response is reasonable. Bench evaluation and simulations with the MCP6401/1R/1U/2/4 SPICE macro model are very helpful. 4.3 Capacitive Loads 4.4 Supply Bypass Driving large capacitive loads can cause stability problems for voltage feedback op amps. As the load capacitance increases, the feedback loop's phase margin decreases and the closed-loop bandwidth is reduced. This produces gain peaking in the frequency response, with overshoot and ringing in the step response. While a unity-gain buffer (G = +1 V/V) is the most sensitive to capacitive loads, all gains show the same general behavior. When driving large capacitive loads with these op amps (e.g., > 100 pF when G = +1 V/V), a small series resistor at the output (RISO in Figure 4-4) improves the feedback loop's phase margin (stability) by making the output load resistive at higher frequencies. The bandwidth will be generally lower than the bandwidth with no capacitance load. With this family of operational amplifiers, the power supply pin (VDD for single-supply) should have a local bypass capacitor (i.e., 0.01 F to 0.1 F) within 2 mm for good high frequency performance. It can use a bulk capacitor (i.e., 1 F or larger) within 100 mm to provide large, slow currents. This bulk capacitor can be shared with other analog parts. 4.5 Unused Op Amps An unused op amp in a quad package (MCP6404) should be configured as shown in Figure 4-6. These circuits prevent the output from toggling and causing crosstalk. Circuits A sets the op amp at its minimum noise gain. The resistor divider produces any desired reference voltage within the output voltage range of the op amp; the op amp buffers that reference voltage. Circuit B uses the minimum number of components and operates as a comparator, but it may draw more current. 1/4 MCP6404 (A) VDD R1 R2 VDD VREF 1/4 MCP6404 (B) VDD - MCP640x VIN + RISO VOUT CL FIGURE 4-4: Output Resistor, RISO Stabilizes Large Capacitive Loads. Figure 4-5 gives recommended RISO values for different capacitive loads and gains. The x-axis is the normalized load capacitance (CL/GN), where GN is the circuit's noise gain. For non-inverting gains, GN and the Signal Gain are equal. For inverting gains, GN is 1+|Signal Gain| (e.g., -1 V/V gives GN = +2 V/V). 10000 () VDD = 6.0 V RL = 10 k R2 VREF = V DD * -----------------R1 + R 2 FIGURE 4-6: Unused Op Amps. 4.6 PCB Surface Leakage ISO 1000 100 10 GN: 1 V/V 2 V/V 5 V/V 1 10p 100p 1n 10n 0.1 1 1.E-11 1.E-10 1.E-09 1.E-08 1.E-07 1.E-06 Normalized Load Capacitance; CL/GN (F) In applications where low input bias current is critical, Printed Circuit Board (PCB) surface leakage effects need to be considered. Surface leakage is caused by humidity, dust or other contamination on the board. Under low humidity conditions, a typical resistance between nearby traces is 1012. A 5V difference would cause 5 pA of current to flow; which is greater than the MCP6401/1R/1U/2/4 family's bias current at +25C (1.0 pA, typical). FIGURE 4-5: Recommended RISO Values for Capacitive Loads. Recommended R DS22229B-page 14 (c) 2010 Microchip Technology Inc. MCP6401/1R/1U/2/4 The easiest way to reduce surface leakage is to use a guard ring around sensitive pins (or traces). The guard ring is biased at the same voltage as the sensitive pin. An example of this type of layout is shown in Figure 4-7. Figure 4-8 shows a precision half-wave rectifier and its transfer characteristic. The rectifier's input impedance is determined by the input resistor R1. To avoid loading effect, it must be driven from a low impedance source. When VIN is greater than zero, D1 is OFF, D2 is ON, and VOUT is zero. When VIN is less than zero, D1 is ON, D2 is OFF, and VOUT is the VIN with an amplification of -R2/ R1. The rectifier circuit shown in Figure 4-8 has the benefit that the op amp never goes in saturation, so the only thing affecting its frequency response is the amplification and the gain bandwidth product. . Guard Ring VIN- VIN+ VSS R2 FIGURE 4-7: for Inverting Gain. 1. Example Guard Ring Layout D2 VIN R1 VOUT MCP6401 D1 2. Non-inverting Gain and Unity-Gain Buffer: a) Connect the non-inverting pin (VIN+) to the input with a wire that does not touch the PCB surface. b) Connect the guard ring to the inverting input pin (VIN-). This biases the guard ring to the Common Mode input voltage. Inverting Gain and Transimpedance Gain Amplifiers (convert current to voltage, such as photo detectors): a) Connect the guard ring to the non-inverting input pin (VIN+). This biases the guard ring to the same reference voltage as the op amp (e.g., VDD/2 or ground). b) Connect the inverting pin (VIN-) to the input with a wire that does not touch the PCB surface. Precision Half-Wave Rectifier VOUT -R2/R1 VIN Transfer Characteristic 4.7 4.7.1 Application Circuits PRECISION HALF-WAVE RECTIFIER FIGURE 4-8: Rectifier. Precision Half-Wave The precision half-wave rectifier, which is also known as a super diode, is a configuration obtained with an operational amplifier in order to have a circuit behaving like an ideal diode and rectifier. It effectively cancels the forward voltage drop of the diode so that very low level signals can still be rectified with minimal error. This can be useful for high-precision signal processing. The MCP6401/1R/1U/2/4 op amps have high input impedance, low input bias current and rail-to-rail input/ output, which makes this device suitable for precision rectifier applications. (c) 2010 Microchip Technology Inc. DS22229B-page 15 MCP6401/1R/1U/2/4 4.7.2 BATTERY CURRENT SENSING 4.7.3 INSTRUMENTATION AMPLIFIER The MCP6401/1R/1U/2/4 op amps' Common Mode Input Range, which goes 0.3V beyond both supply rails, supports their use in high-side and low-side battery current sensing applications. The low quiescent current (45 A, typical) helps prolong battery life, and the rail-to-rail output supports detection of low currents. Figure 4-9 shows a high side battery current sensor circuit. The 10 resistor is sized to minimize power losses. The battery current (IDD) through the 10 resistor causes its top terminal to be more negative than the bottom terminal. This keeps the Common Mode input voltage of the op amp below VDD, which is within its allowed range. The output of the op amp will also be below VDD, which is within its Maximum Output Voltage Swing specification. IDD 1.8V to 6.0V 10 100 k VDD MCP6401 1 M V DD - VOUT I DD = ----------------------------------------( 10 V/V ) ( 10 ) The MCP6401/1R/1U/2/4 op amps are well suited for conditioning sensor signals in battery-powered applications. Figure 4-10 shows a two op amp instrumentation amplifier, using the MCP6402, that works well for applications requiring rejection of Common Mode noise at higher gains. The reference voltage (VREF) is supplied by a low impedance source. In single supply applications, VREF is typically VDD/2. RG VREF R1 R2 R2 R1 VOUT V2 1/2 MCP6402 1/2 MCP6402 V1 R 1 2R1 V OUT = ( V 1 - V2 ) 1 + ----- + -------- + V REF R2 RG To load VOUT FIGURE 4-10: Two Op Amp Instrumentation Amplifier. FIGURE 4-9: Supply Current Sensing. DS22229B-page 16 (c) 2010 Microchip Technology Inc. MCP6401/1R/1U/2/4 5.0 DESIGN AIDS 5.4 Microchip provides the basic design tools needed for the MCP6401/1R/1U/2/4 family of op amps. Microchip Advanced Part Selector (MAPS) 5.1 SPICE Macro Model The latest SPICE macro model for the MCP6401/1R/ 1U/2/4 op amp is available on the Microchip web site at www.microchip.com. The model was written and tested in official Orcad (Cadence) owned PSPICE. For the other simulators, it may require translation. The model covers a wide aspect of the op amp's electrical specifications. Not only does the model cover voltage, current, and resistance of the op amp, but it also covers the temperature and noise effects on the behavior of the op amp. The model has not been verified outside of the specification range listed in the op amp data sheet. The model behaviors under these conditions cannot be guaranteed that it will match the actual op amp performance. Moreover, the model is intended to be an initial design tool. Bench testing is a very important part of any design and cannot be replaced with simulations. Also, simulation results using this macro model need to be validated by comparing them to the data sheet specifications and characteristic curves. MAPS is a software tool that helps semiconductor professionals efficiently identify Microchip devices that fit a particular design requirement. Available at no cost from the Microchip website at www.microchip.com/ maps, the MAPS is an overall selection tool for Microchip's product portfolio that includes Analog, Memory, MCUs and DSCs. Using this tool you can define a filter to sort features for a parametric search of devices and export side-by-side technical comparison reports. Helpful links are also provided for Datasheets, Purchase, and Sampling of Microchip parts. 5.5 Analog Demonstration and Evaluation Boards Microchip offers a broad spectrum of Analog Demonstration and Evaluation Boards that are designed to help you achieve faster time to market. For a complete listing of these boards and their corresponding user's guides and technical information, visit the Microchip web site at www.microchip.com/ analogtools. Some boards that are especially useful are: MCP6XXX Amplifier Evaluation Board 1 MCP6XXX Amplifier Evaluation Board 2 MCP6XXX Amplifier Evaluation Board 3 MCP6XXX Amplifier Evaluation Board 4 Active Filter Demo Board Kit 5/6-Pin SOT-23 Evaluation Board, P/N VSUPEV2 8-Pin SOIC/MSOP/TSSOP/DIP Evaluation Board, P/N SOIC8EV * 14-Pin SOIC/TSSOP/DIP Evaluation Board, P/N SOIC14EV * * * * * * * 5.2 FilterLab(R) Software Microchip's FilterLab(R) software is an innovative software tool that simplifies analog active filter (using op amps) design. Available at no cost from the Microchip web site at www.microchip.com/filterlab, the FilterLab design tool provides full schematic diagrams of the filter circuit with component values. It also outputs the filter circuit in SPICE format, which can be used with the macro model to simulate actual filter performance. 5.3 MindiTM Circuit Designer and Simulator Microchip's MindiTM Circuit Designer and Simulator aids in the design of various circuits useful for active filter, amplifier and power-management applications. It is a free online circuit designer and simulator available from the Microchip web site at www.microchip.com/ mindi. This interactive circuit designer and simulator enables designers to quickly generate circuit diagrams, and simulate circuits. Circuits developed using the Mindi Circuit Designer and Simulator can be downloaded to a personal computer or workstation. (c) 2010 Microchip Technology Inc. DS22229B-page 17 MCP6401/1R/1U/2/4 5.6 Application Notes The following Microchip Analog Design Note and Application Notes are available on the Microchip web site at www.microchip.com/appnotes and are recommended as supplemental reference resources. * ADN003: "Select the Right Operational Amplifier for your Filtering Circuits", DS21821 * AN722: "Operational Amplifier Topologies and DC Specifications", DS00722 * AN723: "Operational Amplifier AC Specifications and Applications", DS00723 * AN884: "Driving Capacitive Loads With Op Amps", DS00884 * AN990: "Analog Sensor Conditioning Circuits - An Overview", DS00990 * AN1177: "Op Amp Precision Design: DC Errors", DS01177 * AN1228: "Op Amp Precision Design: Random Noise", DS01228 * AN1297: "Microchip's Op Amp SPICE Macro Models", DS01297 These application notes and others are listed in the design guide: * "Signal Chain Design Guide", DS21825 DS22229B-page 18 (c) 2010 Microchip Technology Inc. MCP6401/1R/1U/2/4 6.0 6.1 PACKAGING INFORMATION Package Marking Information 5-Lead SC70 (MCP6401 only) Example: XXNN BL25 5-Lead SOT-23 Example: Part Number Code NLNN NMNN NPNN XXNN MCP6401T-E/OT MCP6401RT-E/OT MCP6401UT-E/OT NL25 8-Lead TDFN (2 x 3) XXX YWW NN Example: AAW 025 25 8-Lead SOIC (150 mil) XXXXXXXX XXXXYYWW NNN Example: MCP6402E e3 SN^^1025 256 Legend: XX...X Y YY WW NNN e3 * Note: Customer-specific information Year code (last digit of calendar year) Year code (last 2 digits of calendar year) Week code (week of January 1 is week `01') Alphanumeric traceability code Pb-free JEDEC designator for Matte Tin (Sn) This package is Pb-free. The Pb-free JEDEC designator ( e3 ) can be found on the outer packaging for this package. In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information. (c) 2010 Microchip Technology Inc. DS22229B-page 19 MCP6401/1R/1U/2/4 Package Marking Information (Continued) 14-Lead SOIC (150 mil) (MCP6404) Example: XXXXXXXXXX XXXXXXXXXX YYWWNNN MCP6404 e3 E/SL^^ 1025256 14-Lead TSSOP (MCP6404) Example: XXXXXX YYWW NNN 6404E/ST 1025 256 Legend: XX...X Y YY WW NNN e3 * Note: Customer-specific information Year code (last digit of calendar year) Year code (last 2 digits of calendar year) Week code (week of January 1 is week `01') Alphanumeric traceability code Pb-free JEDEC designator for Matte Tin (Sn) This package is Pb-free. The Pb-free JEDEC designator ( e3 ) can be found on the outer packaging for this package. In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information. DS22229B-page 20 (c) 2010 Microchip Technology Inc. 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DS22229B-page 23 MCP6401/1R/1U/2/4 /HDG 3ODVWLF 6PDOO 2XWOLQH 61 1DUURZ 1RWH PP %RG\ >62,&@ )RU WKH PRVW FXUUHQW SDFNDJH GUDZLQJV SOHDVH VHH WKH 0LFURFKLS 3DFNDJLQJ 6SHFLILFDWLRQ ORFDWHG DW KWWS ZZZ PLFURFKLS FRP SDFNDJLQJ D e N E E1 NOTE 1 1 2 3 b h c h A A2 A1 L L1 8QLWV 'LPHQVLRQ /LPLWV 1XPEHU RI 3LQV 3LWFK 2YHUDOO +HLJKW 0ROGHG 3DFNDJH 7KLFNQHVV 6WDQGRII 2YHUDOO :LGWK 0ROGHG 3DFNDJH :LGWK 2YHUDOO /HQJWK &KDPIHU RSWLRQDO )RRW /HQJWK )RRWSULQW )RRW $QJOH /HDG 7KLFNQHVV /HDG :LGWK 0ROG 'UDIW $QJOH 7RS 0ROG 'UDIW $QJOH %RWWRP 1 H $ $ $ ( ( ' K / / I F E D E 0,1 0,//,0(7(56 120 %6& %6& %6& %6& 5() 0$; 1RWHV 3LQ YLVXDO LQGH[ IHDWXUH PD\ YDU\ EXW PXVW EH ORFDWHG ZLWKLQ WKH KDWFKHG DUHD 6LJQLILFDQW &KDUDFWHULVWLF 'LPHQVLRQV ' DQG ( GR QRW LQFOXGH PROG IODVK RU SURWUXVLRQV 0ROG IODVK RU SURWUXVLRQV VKDOO QRW H[FHHG 'LPHQVLRQLQJ DQG WROHUDQFLQJ SHU $60( < 0 %6& %DVLF 'LPHQVLRQ 7KHRUHWLFDOO\ H[DFW YDOXH VKRZQ ZLWKRXW WROHUDQFHV 5() 5HIHUHQFH 'LPHQVLRQ XVXDOO\ ZLWKRXW WROHUDQFH IRU LQIRUPDWLRQ SXUSRVHV RQO\ PP SHU VLGH 0LFURFKLS 7HFKQRORJ\ 'UDZLQJ & % DS22229B-page 24 (c) 2010 Microchip Technology Inc. MCP6401/1R/1U/2/4 /HDG 3ODVWLF 6PDOO 2XWOLQH 61 1DUURZ 1RWH PP %RG\ >62,&@ )RU WKH PRVW FXUUHQW SDFNDJH GUDZLQJV SOHDVH VHH WKH 0LFURFKLS 3DFNDJLQJ 6SHFLILFDWLRQ ORFDWHG DW KWWS ZZZ PLFURFKLS FRP SDFNDJLQJ (c) 2010 Microchip Technology Inc. DS22229B-page 25 MCP6401/1R/1U/2/4 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging DS22229B-page 26 (c) 2010 Microchip Technology Inc. MCP6401/1R/1U/2/4 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging (c) 2010 Microchip Technology Inc. DS22229B-page 27 MCP6401/1R/1U/2/4 /HDG 3ODVWLF 'XDO )ODW 1R /HDG 3DFNDJH 01 [ [ 1RWH PP %RG\ >7')1@ )RU WKH PRVW FXUUHQW SDFNDJH GUDZLQJV SOHDVH VHH WKH 0LFURFKLS 3DFNDJLQJ 6SHFLILFDWLRQ ORFDWHG DW KWWS ZZZ PLFURFKLS FRP SDFNDJLQJ DS22229B-page 28 (c) 2010 Microchip Technology Inc. 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DS22229B-page 29 MCP6401/1R/1U/2/4 1RWH )RU WKH PRVW FXUUHQW SDFNDJH GUDZLQJV SOHDVH VHH WKH 0LFURFKLS 3DFNDJLQJ 6SHFLILFDWLRQ ORFDWHG DW KWWS ZZZ PLFURFKLS FRP SDFNDJLQJ DS22229B-page 30 (c) 2010 Microchip Technology Inc. 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DS22229B-page 31 MCP6401/1R/1U/2/4 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging DS22229B-page 32 (c) 2010 Microchip Technology Inc. MCP6401/1R/1U/2/4 APPENDIX A: REVISION HISTORY Revision B (June 2010) The following is the list of modifications: Added the MCP6402 and MCP6404 package information. 2. Updated the ESD protection value on all pins in Section 1.1 "Absolute Maximum Ratings ". 3. Added Figure 2-33. 4. Updated Table 3-1. 5. Updated Section 4.1.2 "Input Voltage Limits". 6. Added Section 4.1.3 "Input Current Limits". 7. Added Section 4.5 "Unused Op Amps". 8. Updated Section 5.5 "Analog Demonstration and Evaluation Boards". 9. Updated the package markings information and drawings. 10. Updated the Product Identification System page. 1. Revision A (December 2009) * Original Release of this Document. (c) 2010 Microchip Technology Inc. DS22229B-page 33 MCP6401/1R/1U/2/4 NOTES: DS22229B-page 34 (c) 2010 Microchip Technology Inc. MCP6401/1R/1U/2/4 PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office. PART NO. Device -X Temperature Range /XX Package Examples: a) b) Single Op Amp (Tape and Reel) (SC70, SOT-23) Single Op Amp (Tape and Reel) (SOT-23) Single Op Amp (Tape and Reel) (SOT-23) Dual Op Amp Dual Op Amp (Tape and Reel) (SOIC, 2x3 TDFN) Quad Op Amp Quad Op Amp (Tape and Reel) (SOIC, TSSOP) MCP6401T-E/LT: MCP6401T-E/OT: MCP6401RT-E/OT: MCP6401UT-E/OT: MCP6402-E/SN: MCP6402T-E/SN: MCP6402T-E/MNY: MCP6404-E/SL: MCP6404T-E/SL: MCP6404-E/ST: MCP6404T-E/ST: Device: MCP6401T: MCP6401RT: MCP6401UT: MCP6402: MCP6402T: MCP6404: MCP6404T: c) d) e) f) g) h) i) j) k) Tape and Reel, 5LD SC70 pkg Tape and Reel, 5LD SOT-23 pkg Tape and Reel, 5LD SOT-23 pkg Tape and Reel, 5LD SOT-23 pkg 8LD SOIC pkg Tape and Reel, 8LD SOIC pkg Tape and Reel, 8LD 2x3 TDFN pkg 14LD SOIC pkg Tape and Reel, 14LD SOIC pkg 14LD TSSOP pkg Tape and Reel, 14LD TSSOP pkg. Temperature Range: E = -40C to +125C Package: LT = OT = SN = MNY* = SL = ST = Plastic Package (SC70), 5-lead Plastic Small Outline Transistor (SOT-23), 5-lead Plastic SOIC, (3.90 mm body), 8-lead Plastic Dual Flat, No Lead, (2x3 TDFN), 8-lead Plastic SOIC (3.90 mm body), 14-lead Plastic TSSOP (4.4mm body), 14-lead * Y = Nickel palladium gold manufacturing designator. Only available on the TDFN package. (c) 2010 Microchip Technology Inc. DS22229B-page 35 MCP6401/1R/1U/2/4 NOTES: DS22229B-page 36 (c) 2010 Microchip Technology Inc. Note the following details of the code protection feature on Microchip devices: * * Microchip products meet the specification contained in their particular Microchip Data Sheet. Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip's Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property. Microchip is willing to work with the customer who is concerned about the integrity of their code. Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as "unbreakable." * * * Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip's code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act. Information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. MICROCHIP MAKES NO REPRESENTATIONS OR WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION, INCLUDING BUT NOT LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE, MERCHANTABILITY OR FITNESS FOR PURPOSE. Microchip disclaims all liability arising from this information and its use. Use of Microchip devices in life support and/or safety applications is entirely at the buyer's risk, and the buyer agrees to defend, indemnify and hold harmless Microchip from any and all damages, claims, suits, or expenses resulting from such use. No licenses are conveyed, implicitly or otherwise, under any Microchip intellectual property rights. Trademarks The Microchip name and logo, the Microchip logo, dsPIC, KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro, PICSTART, rfPIC and UNI/O are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. FilterLab, Hampshire, HI-TECH C, Linear Active Thermistor, MXDEV, MXLAB, SEEVAL and The Embedded Control Solutions Company are registered trademarks of Microchip Technology Incorporated in the U.S.A. Analog-for-the-Digital Age, Application Maestro, CodeGuard, dsPICDEM, dsPICDEM.net, dsPICworks, dsSPEAK, ECAN, ECONOMONITOR, FanSense, HI-TIDE, In-Circuit Serial Programming, ICSP, Mindi, MiWi, MPASM, MPLAB Certified logo, MPLIB, MPLINK, mTouch, Octopus, Omniscient Code Generation, PICC, PICC-18, PICDEM, PICDEM.net, PICkit, PICtail, PIC32 logo, REAL ICE, rfLAB, Select Mode, Total Endurance, TSHARC, UniWinDriver, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. (c) 2010, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. Printed on recycled paper. ISBN: 978-1-60932-338-7 Microchip received ISO/TS-16949:2002 certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona; Gresham, Oregon and design centers in California and India. The Company's quality system processes and procedures are for its PIC(R) MCUs and dsPIC(R) DSCs, KEELOQ(R) code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip's quality system for the design and manufacture of development systems is ISO 9001:2000 certified. (c) 2010 Microchip Technology Inc. DS22229B-page 37 WORLDWIDE SALES AND SERVICE AMERICAS Corporate Office 2355 West Chandler Blvd. Chandler, AZ 85224-6199 Tel: 480-792-7200 Fax: 480-792-7277 Technical Support: http://support.microchip.com Web Address: www.microchip.com Atlanta Duluth, GA Tel: 678-957-9614 Fax: 678-957-1455 Boston Westborough, MA Tel: 774-760-0087 Fax: 774-760-0088 Chicago Itasca, IL Tel: 630-285-0071 Fax: 630-285-0075 Cleveland Independence, OH Tel: 216-447-0464 Fax: 216-447-0643 Dallas Addison, TX Tel: 972-818-7423 Fax: 972-818-2924 Detroit Farmington Hills, MI Tel: 248-538-2250 Fax: 248-538-2260 Kokomo Kokomo, IN Tel: 765-864-8360 Fax: 765-864-8387 Los Angeles Mission Viejo, CA Tel: 949-462-9523 Fax: 949-462-9608 Santa Clara Santa Clara, CA Tel: 408-961-6444 Fax: 408-961-6445 Toronto Mississauga, Ontario, Canada Tel: 905-673-0699 Fax: 905-673-6509 ASIA/PACIFIC Asia Pacific Office Suites 3707-14, 37th Floor Tower 6, The Gateway Harbour City, Kowloon Hong Kong Tel: 852-2401-1200 Fax: 852-2401-3431 Australia - Sydney Tel: 61-2-9868-6733 Fax: 61-2-9868-6755 China - Beijing Tel: 86-10-8528-2100 Fax: 86-10-8528-2104 China - Chengdu Tel: 86-28-8665-5511 Fax: 86-28-8665-7889 China - Chongqing Tel: 86-23-8980-9588 Fax: 86-23-8980-9500 China - Hong Kong SAR Tel: 852-2401-1200 Fax: 852-2401-3431 China - Nanjing Tel: 86-25-8473-2460 Fax: 86-25-8473-2470 China - Qingdao Tel: 86-532-8502-7355 Fax: 86-532-8502-7205 China - Shanghai Tel: 86-21-5407-5533 Fax: 86-21-5407-5066 China - Shenyang Tel: 86-24-2334-2829 Fax: 86-24-2334-2393 China - Shenzhen Tel: 86-755-8203-2660 Fax: 86-755-8203-1760 China - Wuhan Tel: 86-27-5980-5300 Fax: 86-27-5980-5118 China - Xian Tel: 86-29-8833-7252 Fax: 86-29-8833-7256 China - Xiamen Tel: 86-592-2388138 Fax: 86-592-2388130 China - Zhuhai Tel: 86-756-3210040 Fax: 86-756-3210049 ASIA/PACIFIC India - Bangalore Tel: 91-80-3090-4444 Fax: 91-80-3090-4123 India - New Delhi Tel: 91-11-4160-8631 Fax: 91-11-4160-8632 India - Pune Tel: 91-20-2566-1512 Fax: 91-20-2566-1513 Japan - Yokohama Tel: 81-45-471- 6166 Fax: 81-45-471-6122 Korea - Daegu Tel: 82-53-744-4301 Fax: 82-53-744-4302 Korea - Seoul Tel: 82-2-554-7200 Fax: 82-2-558-5932 or 82-2-558-5934 Malaysia - Kuala Lumpur Tel: 60-3-6201-9857 Fax: 60-3-6201-9859 Malaysia - Penang Tel: 60-4-227-8870 Fax: 60-4-227-4068 Philippines - Manila Tel: 63-2-634-9065 Fax: 63-2-634-9069 Singapore Tel: 65-6334-8870 Fax: 65-6334-8850 Taiwan - Hsin Chu Tel: 886-3-6578-300 Fax: 886-3-6578-370 Taiwan - Kaohsiung Tel: 886-7-536-4818 Fax: 886-7-536-4803 Taiwan - Taipei Tel: 886-2-2500-6610 Fax: 886-2-2508-0102 Thailand - Bangkok Tel: 66-2-694-1351 Fax: 66-2-694-1350 EUROPE Austria - Wels Tel: 43-7242-2244-39 Fax: 43-7242-2244-393 Denmark - Copenhagen Tel: 45-4450-2828 Fax: 45-4485-2829 France - Paris Tel: 33-1-69-53-63-20 Fax: 33-1-69-30-90-79 Germany - Munich Tel: 49-89-627-144-0 Fax: 49-89-627-144-44 Italy - Milan Tel: 39-0331-742611 Fax: 39-0331-466781 Netherlands - Drunen Tel: 31-416-690399 Fax: 31-416-690340 Spain - Madrid Tel: 34-91-708-08-90 Fax: 34-91-708-08-91 UK - Wokingham Tel: 44-118-921-5869 Fax: 44-118-921-5820 01/05/10 DS22229B-page 38 (c) 2010 Microchip Technology Inc. |
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