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21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 PI90LV019 Single Bus LVDS Transceiver Features * * * * * * Balanced Output Impedance Light Bus Loading: 5pF typical Glitch-free power up/down (Driver Disabled) High Signaling Rate Capability: >500 Mbps Driver: - 350mV Differential Swing into: - 100-ohm load (PI90LV019) Receiver: - Accepts 50mV (min.) Differential Swing with up to 2.0V ground potential difference - Propagation Delay of 3.3ns typ. - Low Voltage TTL (LVTTL) Outputs - Open, Short, and Terminated Fail Safe Bus terminal ESD exceeds 9kV Industrial Temperature Operation (-40C to +85C) Packaging: (Pb-free & Green available) 14-lead SOIC (W) and 14-lead TSSOP (L) Description The PI90LV019, differential line driver and receiver (transceiver), is compliant to IEEE1596.3 SCI and ANSI/TIA/ EIA-644LVDS standards. The logic interface provides maximum flexibility resulting from four separate lines that are provided: DIN, DE, RE, and ROUT. These devices also feature flow through which allows easy PCB routing for short stubs between the bus pins and the connector. The driver translates between TTL levels (single-ended) to Low Voltage Differential Signaling levels. This allows for high-speed operation, while consuming minimal power with reduced EMI. In addition the differential signaling provides common mode noise rejection of 1V. * * * Block Diagram Pin Configuration DIN DE RE D0+ D0- DE DIN NC ROUT NC 1 2 14 13 VCC NC DO+ DO- RI+ RI- RE 3 14-Pin 12 4 L, W 11 5 6 7 10 9 8 ROUT RI+ RI- NC GND 06-0018 1 PS8614C 03/06/06 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 PI90LV019 Single Bus LVDS Transceiver Absolute Maximum Ratings(1,2) Supply Voltage (VCC) ............................................................ 3.6V Enable Input Voltage (DE, RE) .................... -0.3V to (VCC +0.3V) Driver Input Voltage (DIN) .......................... -0.3V to (VCC +0.3V) Receiver Output Voltage (ROUT) ................ -0.3V to (VCC +0.3V) Bus Pin Voltage (DO/RI) ...................................... -0.3V to +3.9V Driver Short Circuit .................................................... Continuous ESD (HBM 1.5kohms, 100pF) ............................................... >9kV Maximum Package Power Dissipation at 20C SOIC ............................................................................. 1025mW Derate SOIC Package ................................................. 8.2mW/C Storage Temperature Range ............................... -65C to +150C Lead Temperature Range (Soldering, 4s) ........................... +260C Recommended Operating Conditions Supply Voltage (VCC) Receiver Input Voltage Operating Free-Air Temperature Min. 3.0 0.0 -40 Max. 3.6 2.9 +85 Units V V C Note: Stresses greater than those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. Table 1. Functional Mode M ode Se le cte d Driver Mode Receiver Mode 3- State Mode Full Duplex Mode DE H L L H RE H L H L Table 2. Transmitter Mode Inputs DE H H H L DI L H 2 > & > 0.8 X DO+ L H X Z Outputs DO- H L X Z Table 3. Receiver Mode Inputs RE L L L H (RI+) - (RI-) L (< -100mV) H (> +100mV) 100mV > & > -100mV X Outputs L H X Z Pin Name DIN Table 4. Device Pin Description Pin Inputs / # Outputs 2 I I/O O I I NA NA De s cription TTL Driver Input LVDS Driver Outputs/ LVDS Receiver Inputs TTL Receiver Output Receiver Enable TTL Input (Active Low) Driver Enable TTL Input (Active High) Ground Power Supply DORI 6,7 ROUT RE DE GND VCC 3 5 1 4 8 06-0018 2 PS8614C 03/06/06 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 PI90LV019 Single Bus LVDS Transceiver DC Electrical Characteristics(2,3) TA = -40C to +85C, unless otherwise noted. VCC = 3.3V 0.3V(2,3) Symbol VOD VOD VOS VOS IOZD IOXD IOSD VOH VOL IOS VTH VTL IIN VIH VIL IIH IIL VCL ICC ICCL Parame te r Output Differential Voltage VOD Magnitude Change Offset Voltage Offset Magnitude Change High Impedance Leakage Power- Off Leakage Output Short Circuit Current Voltage Output High Voltage Output Low Output Short Circuit Current Input Threshold High Input Threshold Low Input Current Minimum Input High Voltage Minimum Input Low Voltage Input High Current Input Low Current Input Diode Clamp Voltage No Load Driver Enabled Loaded driver enabled Conditions Pin M in. 250 Typ. 350 6 1.25 5 1 1 -6 3.3 3.3 0. 1 M ax. Units 450 60 1.7 60 +10 +10 -4 Diffe re ntial Drive r Characte ris tics RL = 100- ohms, (LV) Figure 1 mV V mV A mA DO+ DO- 1 -10 -10 -10 2.9 VOUT = VCC or GND, DE = 0V VOUT = 3.6V or GND, VCC = 0V VOUT = 0V, DE = VCC VID = +100mV Inputs Open IOL = 2.0mA, VID = -100mV VOUT = 0V RI+ RI- LV IOH = -400A ROUT Diffe re ntial Re ce ive r Characte ris tics 2.9 -75 -100 -10 2.0 VIN = VCC or 2.4V VIN = GND or 0.4V ICLAMP = -18mA DIN = VCC or GND DE = VCC = RE LV VCC DIN, DE, RE GND 1 1 -1.5 -0.7 4.0 8.0 1 10 VCC 0.8 +10 +10 V 0.4 -20 +100 mA mV A -34 VIN = +2.4V, or 0V VCC = 3.6V or 0V De vice Characte ris tics V A V RL = 100 ohms (all channels) DIN = VCC or GND (all inputs) LV DE = VCC, RE = GND DIN = VCC or GND, DE = GND, RE = VCC LV 20 2.2 30 8 .0 mA ICCZ No Load driver disabled CDoutput Capacitance CRinput Capacitance DO+, DO- RI+, RI- 5 5 pF Notes: 1. "Absolute Maximum Ratings" are those values beyond which the safety of the device cannot be guaranteed. They are not meant to imply that the devices should be operated at these limits. The table of "Electrical Characteristics" specifies conditions of device operation. 2. All currents into device pins are positive, all currents out of device pins are negative. All voltages are referenced to ground except: VOD, VID, VTH, and VTL, unless otherwise specified. 3. All typicals are given for VCC = +3.3V and TA = +25C unless otherwise stated. Notes continued on next page... 06-0018 3 PS8614C 03/06/06 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 PI90LV019 Single Bus LVDS Transceiver Notes (continued): 4. ESD Rating: HBM (15k-ohms, 100pF) > 2.0kV EAT (0-ohm, 200pF) >300V. 5. CL includes probe and fixture capacitance. 6. Generator waveforms for all tests unless otherwise specified: f = 1MHz, ZO = 50-ohms, tr, tf 6.0ns (0% - 100%) on control pins and 1.0ns for RI inputs. 7. For receiver disable delays, the switch is set to VCC for tPZL, and tPLZ and to GND for tPZH and tPHZ. AC Electrical Characteristics Symbol tPHLD tPLHD tSKD tTLH tTHL tPHZ tPLZ tPZH tPZL tPHLD tPLHD tSKD tr tf tPHZ tPLZ tPZH tPZL TA = -40C to +85C, VCC = 3.3V 0.3V(6) Parame te r Differential Propagation Delay High to Low Differential Propagation Delay Low to High Differential Skew ItPHLD - tPLHDI Transition Time Low to High Transition Time High to Low Disable Time High to Z Disable Time Low to Z Enable Time Z to High Enable Time Z to Low Differential Propagation Delay High to Low Differential Propagation Delay Low to High Differential Skew ItPHLD - tPLHDI Rise Time Fall Time Disable Time High to Z Disable Time Low to Z Enable Time Z to High Enable Time Z to Low RL = 500- ohms CL = 10pF Figures 8 & 9 3.0 3.0 3.0 3.0 CL = 10pF VID = 200mV Figures 6 & 7 RL = 100- ohms (LV) CL = 10pF (Figures 2 & 3) Conditions RL = 100- ohms (LV) CL = 10pF (Figures 2 & 3) M in. 2.0 1.0 0.2 0.2 1.5 2.5 4.0 3.5 1.3 1.3 Typ. 4. 0 5. 6 0.4 0.7 0.8 4.0 5.3 6. 0 6.0 2.1 2.1 0.5 0.8 0.8 4. 0 4. 5 6.0 6.0 M a x. 6.5 7.0 1. 0 3. 0 3. 0 8.0 9. 0 8. 0 8. 0 3.0 3.0 2. 0 1.4 1. 4 6.0 6.0 8. 0 8. 0 ns ns Units Drive r Timing Re quire me nts Re ce ive r Timing Re quire me nts 06-0018 4 PS8614C 03/06/06 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 PI90LV019 Single Bus LVDS Transceiver Test Circuits and Timing Waveforms DO+ RL/2 2V 0.8V S1 RL/2 Driver Enabled DIN VOS VOD DO- Figure 1. Differential Driver DC Test Circuit CL DO+ Pulse Generator 50-ohm DIN RL DO- Driver Enabled CL Figure 2. Differential Driver Propagation Delay and Transition Time Test Circuit 3V DIN 0V DOUT+,DOUT1.5V tPHLD 0V 0V (Differential) 1.5V tPLHD 0V DO- 80% (DO+) - (DO-) 0V 20% tTLH tDIFF = (DO+) - (DO-) 80% 0V 20% tTHL DO+ Figure 3. Driver Propagation Delay and Transition Time Waveforms 06-0018 5 PS8614C 03/06/06 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 PI90LV019 Single Bus LVDS Transceiver Test Circuits and Timing Waveforms (continued) DO+ CL 2.0 0.8 RL/2 Pulse Generator DE 50-ohm CL DIN +1.2V DO- RL/2 Figure 4. Driver Three-State Delay Test Circuit 3V DE 0V tPHZ DO - (DI=L) VOH DO + (DI=H) tPLZ DO - (DI=H) DO + (DI=L) VOH 50% VOL tPZL 50% 1.2V tPZH 50% 50% 1.2V 1.5V 1.5V Figure 5. Driver Three-State Delay Waveforms Figure 6. Receiver Propagation Delay and Transistion Time Test Circuit RI- 0V (Differential) RI+ tPLH 80% 1.5V VO 20% tTLH tTHL tPHL 80% 1.5V 20% VID = 200mV (1.2V CM) +1.1V +1.3V Figure 7. Receiver Propagation Delay and Transistion Time Waveforms 06-0018 6 PS8614C 03/06/06 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 PI90LV019 Single Bus LVDS Transceiver Test Circuits and Timing Waveforms (continued) RI+ RI- + R - CL Pulse Generator RE VCC 50-ohm 50-ohm Figure 8. Receiver 3-State Delay Test Circuit 3V RE 0V tPHZ VOH VOH -0.5 ROUT tPLZ VOH VOL VOL +0.5 50% VOL tPZL VCC 50% GND tPZH VOH 1.5V 1.5V Figure 9. Receiver 3-State Delay Waveforms Typical Bus Application Configurations DO+ DIN DO- DE RE DO- DE RE DO+ DIN + ROUT RI+ 100-ohms RI+ + ROUT - RI- RI- - PI90LV019 PI90LV019 Figure 10. Bidirectional Half-Duplex Point-to-Point Applications DO+ DIN DO- DE RE RI+ ROUT RI- RE DE + ROUT RI+ DO+ DIN - RI- DO- PI90LV019 PI90LV019 Figure 11. Full-Duplex Point-to-Point Application 06-0018 7 PS8614C 03/06/06 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 PI90LV019 Single Bus LVDS Transceiver 14-Pin SOIC Package 14 .149 .157 3.78 3.99 0-8 .0099 .0196 0.25 x 45 0.50 .0075 .0098 0.41 1.27 .2284 .2440 5.80 6.20 .016 .050 0.19 0.25 1 .336 .344 8.55 8.75 .0155 .026 0.393 0.660 REF .053 .068 1.35 1.75 SEATING PLANE X.XX DENOTES DIMENSIONS X.XX IN MILLIMETERS .050 BSC 1.27 .013 .020 0.330 0.508 .0040 0.10 .0098 0.25 14-Pin TSSOP Package 14 0.004 0.09 0.008 0.20 0.169 0.177 4.3 4.5 0.45 0.75 0.018 0.030 1 0.193 0.201 4.90 5.10 0.240 0.264 6.1 6.7 0.047 1.20 max. SEATING PLANE 0.0256 typical 0.65 0.007 0.012 0.19 0.30 0.002 0.05 0.006 0.15 06-0018 8 PS8614C 03/06/06 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 PI90LV019 Single Bus LVDS Transceiver Ordering Information Orde r Numbe r PI90LV019W PI90LV019WE PI90LV019L PI90LV019LE Pins - Package 14 - SOIC 14 - SOIC, Pb- free & Green 14 - TSSOP 14 - TSSOP, Pb- free & Green Te mpe rature -40C to 85C -40C to 85C -40C to 85C -40C to 85C Pericom Semiconductor Corporation * www.pericom.com 06-0018 9 PS8614C 03/06/06 |
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