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| Elektronische Bauelemente Enhancement Mode Power Mos.FET RoHS Compliant Product N Channel 6.9A, 30V,RDS(ON) 28m[ P Channel -6.3A, -30V,RDS(ON) 36m[ SSG4503 SOP-8 Description 0.40 0.90 0.19 0.25 The SSG4503 provide the designer with the best combination of fast switching, ruggedized device design, low on-resistance and cost-effectiveness. The SOP-8 package is universally preferred for all commercial industrial surface mount application and suited for low voltage applications such as DC/DC converters. 0.35 0.49 1.27Typ. 45 6.20 5.80 0.25 o 0.375 REF 3.80 4.00 4.80 5.00 0.10~0.25 Features * Simple Drive Requirement * Lower On-Resistance 0 o 8 o 1.35 1.75 Dimensions in millimeters D1 8 D1 7 D2 6 D2 5 D1 D2 * Fast Switching Performance Date Code 4503SS G1 G2 1 S1 2 G1 3 S2 4 G2 S1 S2 Absolute Maximum Ratings Parameter Drain-Source Voltage Gate-Source Voltage Continuous Drain Current Continuous Drain Current Pulsed Drain Current 1 3 3 Symbol VDS VGS ID@TA=25 C ID@TA=70 C IDM PD@TA=25 C o o o Ratings 30 20 6.9 5.5 30 2.0 0.016 Unit -30 20 -6.3 -5 -30 V V A A A W W/ C o o T otal Power Dissipation Linear Derating Factor Operating Junction and Storage Temperature Range Tj, Tstg -55~+150 C Thermal Data Parameter Thermal Resistance Junction-ambient 3 Symbol Max. Rthj-a Ratings 62.5 o Unit C /W http://www.SeCoSGmbH.com/ Any changing of specification will not be informed individual 01-Jun-2002 Rev. A Page 1 of 7 Elektronische Bauelemente Enhancement Mode Power Mos.FET N Channel 6.9A, 30V,RDS(ON) 28m[ P Channel -6.3A, -30V,RDS(ON) 36m[ SSG4503 Electrical Characteristics N Channel( Tj=25 C Parameter Drain-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Gate Threshold Voltage Gate-Source Leakage Current Drain-Source Leakage Current (Tj=25oC) Drain-Source Leakage Current (Tj=70 C ) Static Drain-Source On-Resistance 2 o o Unless otherwise specified) Typ. _ Symbol BVDSS BVDS/ Tj VGS(th) IGSS IDSS Min. 30 _ Max. _ _ Unit V V/oC V nA uA uA m[ Test Condition VGS=0V, ID=250uA Reference to 25 C, ID=1mA VDS=VGS, ID=250uA VGS= 20V VDS=30V,VGS=0 VDS=24V,VGS=0 VGS=10V, ID=6A VGS=4.5V, ID=4A ID=6 A VDS=24V VGS=4.5V o 0.005 _ _ _ _ _ _ 1.0 _ _ _ _ 3.0 100 1 25 28 42 15 _ _ RDS(ON) Qg Qgs Qgd Td(ON) Tr Td(Off) Tf Ciss Coss Crss Gfs _ _ _ _ _ _ _ _ _ _ _ Total Gate Charge 2 Gate-Source Charge Gate-Drain ("Miller") Charge Turn-on Delay Time2 Rise Time Turn-off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance Forward Transconductance 9 2 6 8 7 19 6 610 160 120 5.7 nC _ _ _ _ VDD=15V ID=1 A nS VGS=10 V RG=3.3 [ RD=15 [ 970 _ _ pF VGS=0V VDS=25V f=1.0MHz VDS=10V, ID=6 A _ _ S Source-Drain Diode Parameter Forward On Voltage 2 Symbol VSD Trr Qrr Min. _ _ _ Typ. _ Max. 1.2 _ _ Unit V Test Condition IS=6 A, VGS=0V.Tj=25 oC IS=6A,V GS=0V dl/dt=100A/us Reverse Recovery Time Reverse Recovery Charge 18 11 nS nC Notes: 1.Pulse width limited by Max. junction temperature. 2.Pulse widthO 300us, dutycycleO2%. 3.Surface mounted on 1 inch2 copper pad of FR4 board;135 C/W when mounted on min. copper pad. http://www.SeCoSGmbH.com/ Any changing of specification will not be informed individual 01-Jun-2002 Rev. A Page 2 of 7 Elektronische Bauelemente Enhancement Mode Power Mos.FET o N Channel 6.9A, 30V,RDS(ON) 28m[ P Channel -6.3A, -30V,RDS(ON) 36m[ SSG4503 Electrical Characteristics P-Channel( Tj=25 C Unless otherwise specified) Parameter Drain-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Gate Threshold Voltage Gate-Source Leakage Current Drain-Source Leakage Current (Tj=25 C) Drain-Source Leakage Current (Tj=70oC) Static Drain-Source On-Resistance 2 o Symbol BVDSS BVDS/ Tj VGS(th) IGSS IDSS Min. -30 _ Typ. _ Max. _ _ Unit V V/ oC V nA uA uA m[ Test Condition VGS=0V, ID=-250uA Reference to 25oC, ID=-1mA VDS=VGS, ID=-250uA VGS= 20V VDS=-30V,VGS=0 VDS=-24V,VGS=0 VGS=-10V, ID=-6A VGS=-4.5V, ID=-4A ID=-6A VDS=-24V VGS=-4.5V -0.004 _ _ _ _ _ _ -1.0 _ _ _ _ -3.0 100 -1 -25 36 55 24 _ _ RDS(ON) Qg Qgs Qgd Td(ON) Tr Td(Off) Tf Ciss Coss Crss Gfs _ _ _ _ _ _ _ _ _ _ _ Total Gate Charge 2 Gate-Source Charge Gate-Drain ("Miller") Charge Turn-on Delay Time 2 Rise Time Turn-off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance Forward Transconductance 15 3 9 12 8 42 34 960 300 220 5.8 nC _ _ _ _ VDS=-15V ID=-1A nS VGS=-10V RG=3.3[ RD=15 [ 1540 _ _ pF VGS=0V VDS=-25V f=1.0MHz _ _ S VDS=-10V, ID=-6A Source-Drain Diode Parameter Forward On Voltage 2 Symbol VSD Trr Qrr Min. _ _ _ Typ. _ Max. -1.2 _ _ Unit V Test Condition IS=-6A, VGS=0V.Tj=25 oC IS=-6A,VGS=0V dl/dt=100A/us Reverse Recovery Time Reverse Recovery Charge 24 18 nS nC Notes: 1.Pulse width limited by Max. junction temperature. 2.Pulse widthO 300us, dutycycleO2%. 3.Surface mounted on 1 inch2 copper pad of FR4 board;135 C/W when mounted on min. copper pad. http://www.SeCoSGmbH.com/ Any changing of specification will not be informed individual 01-Jun-2002 Rev. A Page 3 of 7 Elektronische Bauelemente Enhancement Mode Power Mos.FET N Channel 6.9A, 30V,RDS(ON) 28m[ P Channel -6.3A, -30V,RDS(ON) 36m[ SSG4503 Characteristics Curve N-Channel Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics Fig 3. On-Resistance v.s. Gate Voltage Fig 4. Normalized On-Resistance v.s. Junction Temperature http://www.SeCoSGmbH.com/ Fig 5. Forward Characteristics of Reverse Diode Fig 6. Gate Threshold Voltage v.s. Junction Temperature Any changing of specification will not be informed individual 01-Jun-2002 Rev. A Page 4 of 7 Elektronische Bauelemente Enhancement Mode Power Mos.FET N Channel 6.9A, 30V,RDS(ON) 28m[ P Channel -6.3A, -30V,RDS(ON) 36m[ SSG4503 N-Channel Fig 7. Gate Charge Characteristics Fig 8. Typical Capacitance Characteristics Fig 9. Maximum Safe Operating Area Fig 10. Effective Transient Thermal Impedance Fig 11. Switching Time Waveform http://www.SeCoSGmbH.com/ Fig 12. Gate Charge Waveform Any changing of specification will not be informed individual 01-Jun-2002 Rev. A Page 5 of 7 Elektronische Bauelemente Enhancement Mode Power Mos.FET N Channel 6.9A, 30V,RDS(ON) 28m[ P Channel -6.3A, -30V,RDS(ON) 36m[ SSG4503 P-Channel GND Description Typically a large storage capacitor is connected from this pin to ground to insure that the input 1.3V or open= output enable. NC tage does not sag below the minimum dropout voltage during the load V higher than Vout in order for the device to Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics Fig 3. On-Resistance v.s. Gate Voltage Fig 4. Normalized On-Resistance v.s. Junction Temperature http://www.SeCoSGmbH.com/ Fig 5. Forward Characteristics of Reverse Diode Fig 6. Gate Threshold Voltage v.s. Junction Temperature Any changing of specification will not be informed individual 01-Jun-2002 Rev. A Page 6 of 7 Elektronische Bauelemente Enhancement Mode Power Mos.FET N Channel 6.9A, 30V,RDS(ON) 28m[ P Channel -6.3A, -30V,RDS(ON) 36m[ SSG4503 P-Channel Fig 7. Gate Charge Characteristics Fig 8. Typical Capacitance Characteristics Fig 9. Maximum Safe Operating Area Fig 10. Effective Transient Thermal Impedance Fig 11. Switching Time Waveform Fig 12. Gate Charge Waveform h tp://www.SeCoSGmbH.com/ Any changing of specification will not be informed individual 01-Jun-2002 Rev.A Page 7 of 7 |
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