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| SEMICONDUCTOR TECHNICAL DATA APPLICATION I/O ESD protection for mobile handsets, notebook, PDAs, etc. EMI filtering for data ports in cell phones, PDAs, notebook computers EMI filtering for LCD, camera and chip-to-chip data lines A PF1005UDF8B ESD/EMI Filter C 1 E 4 FEATURES EMI/RFI filtering ESD Protection to IEC 61000-4-2 Level 4 Low insertion loss Good attenuation of high frequency signals Low clamping voltage Low operating and leakage current Four elements in one package J GND PAD H 8 Pin 1 B F D5 TOP VIEW BOTTOM VIEW K L SIDE VIEW DESCRIPTION PF1005UDF8B is an EMI filter array with electrostatic discharge (ESD) protection, which integrates four pi filters (C-R-C). These parts include ESD protection diodes on every pin, providing a very high level of protection for sensitive electronic components that may be subjected to electrostatic discharge. The PF1005UDF8B provides the recommended line termination while implementing a low pass filter to limit EMI levels and providing ESD protection which exceeds IEC 61000-4-2 level 4 standard. The UDFN package is a very effective PCB space occupation and a very thin package (0.4mm Pitch, 0.5mm height) 1,8 : Filter channel 1 2,7 : Filter channel 2 3,6 : Filter channel 3 4,5 : Filter channel 4 DIM A B C D E F G H J K L MILLIMETERS _ 1.70 + 0.10 _ 1.35 + 0.10 _ 1.20 + 0.10 _ 0.20 + 0.05 0.40 _ 0.40 + 0.10 _ 0.25 + 0.10 0.20 Min _ 0.50 + 0.05 0.127 0.02+0.03/-0.02 UDFN-8B MARKING Type Name CHARACTERISTIC DC Power Per Resistor Power Dissipation Junction Temperature Storage Temperature * Total Package Power Dissipation SYMBOL PR *PD Tj Tstg RATING 100 400 150 -55 150 UNIT mW 0A MAXIMUM RATING (Ta=25E ) T1 Lot No. RECOMMENEDED FOOTPRINT (dimensions in mm) 0.40 0.30 EQUIVALENT CIRCUIT 1.66 0.55 FILTERn* 100 FILTERn* GND 0.25 5pF 5pF 0.70 GND ELECTRICAL CHARACTERISTICS (Ta=25E ) CHARACTERISTIC Reverse Stand-Off Voltage Reverse Breakdown Voltage Reverse Leakage Current Cutoff Frequency Channel Resistance Line Capacitance SYMBOL VRWM VBR IR fc-3dB RLINE CLINE It=1mA VRWM=3.3V VLine=0V, ZSOURCE=50U , ZLOAD=50U Between Input and Output VLine=0V DC, 1MHz, Between I/O Pins and GND VLine=2.5V, 1MHz, Between I/O Pins and GND TEST CONDITION MIN. 6 80 12 8 TYP. 300 100 15 10 MAX. 5 1.0 120 18 12 UNIT V V i A MHz U pF 2009. 5. 22 Revision No : 0 G 1/2 PF1005UDF8B S21 - FREQUENCY 0 0 -30 -60 -90 -120 -150 ANALOG CROSSTALK INSERTION LOSS (dB) -10 -20 -30 -40 1 10 100 1000 6000 CROSSTALK (dB) 1 10 100 1000 6000 FREQUENCY (MHz) FREQUENCY (MHz) DIODE CAPACITANCE vs. INPUT VOLTAGE NORMALIZED CAPACITANCE 2.0 110 108 RLine - TEMPERATURE RESISTANCE R () 1.5 106 104 102 100 98 96 94 92 90 -40 1.0 0.5 0.0 0 1 2 3 4 5 -20 0 20 40 60 80 DIODE VOLTAGE (V) AMBIENT TEMPERATURE Ta ( C ) 2009. 5. 22 Revision No : 0 2/2 |
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