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SS6730 150mA Low-Noise, Low-Dropout Linear Regulator FEATURES Output tolerance of 2%. Output voltage of 1.8V to 3.3V with 0.1V increments. Active-low shutdown control. Very low quiescent current. Very low dropout voltage. Miniature package (SOT-23-5 & SOT-23-6W) Short-circuit and thermal protection. Very low noise. DESCRIPTION The SS6730 is a low noise, low dropout linear regulator, housed in a small SOT -23-5 o r SOT-23-6W package. The device is in the "ON" state when the SHDN pin is set to a logic-high level. An internal P -MOSFET pass transistor is used to achieve a low dropout voltage of 90mV at 50mA load current. It offers a high precision output voltage of 2%. The very low quiescent current and low dropout voltage make this device ideal APPLICATIONS Cellular Telephones. Pagers. Personal Communication Equipment. Cordless Telephones. Portable Instrumentation. Portable Consumer Equipment. Radio Control Systems. Low Voltage Systems. Battery Powered Systems. for battery powered applications. The internal reverse bias protection eliminates the requirement for a reverse voltage protection diode. The high ripple rejection and low noise provide enhanced An performance for critical can be applications. external capacitor connected to the noise bypass pin to reduce the output noise level. TYP ICAL APPLICATION CIRCUIT VIN VIN CIN 1F + GND VOUT + COUT 1F VOUT SHDN BP CBP SS6730 V SHDN 0.1F Low Noise Low Dropout Linear Regulator 1/26/2004 Rev.2.02 www.SiliconStandard.com 1 of 11 SS6730 ORDERING INFORMATION SS6730-XX CXXX Packing type TR: Tape and reel Package type V: SOT-23-5 Q: SOT-23-6W Output voltage 18: 1.8V . . . 285: 2.85V . . 33: 3.3V The output voltage is available in 0.1V increments. Example: SS6730-18CVTR 1.8V version, in SOT-23-5 package shipped on tape and reel. SOT-23-5 (CV) TOP VIEW 1: VIN 2: GND 3: SHDN 4: BP 5: VOUT SOT-23-6W (CQ) TOP VIEW 1: SHDN 2: GND 3: BP 4: VOUT 5: GND 6: VIN 5 4 PIN CONFIGURATION 1 2 3 6 5 4 1 2 3 ABSOLUTE MAXIMUM RATINGS Supply Voltage .................... ... ... ... ... ... ... ... ... ... ... ... ..... ... ... ... ... ... ... ....................12V .... ... ... ... ... ... ... ... ... ... ... ... ... ... ... ... ... ... ... .....-40C~85C ................... ... ... ... ... ... ... ... ... ... ... ... ... ... .........-65C~150C ..... ... ... ... ... ... ... ... ... ... ... ... ... ... ... ... ... ... ... ... ... ..............12V .... ... ... ... ... ... ... ... ... ... ... .... ... ... ... ... ... ... ... ... ..............5V SOT-23-5 ... ....... ... ... ..... ... ... ..... ... ... ..130C /W Operating Temperature Range Storage Temperature Range Shutdown Terminal Voltage Noise Bypass Terminal Voltage Thermal Resistance (Junction to Case) Thermal Resistance Junction to Ambient SOT-23-5 ... ....... ... ..... ... ... ... ..... ... ... ..220C /W (Assume no ambient airflow, no heatsink) 1/26/2004 Rev.2.02 www.SiliconStandard.com 2 of 11 SS6730 ELECTRICAL CHARACTERISTICS (CIN=1F , COUT =10F, TJ=25 C, unless otherwise specified) PARAMETER Quiescent Current Standby Current GND Pin Current Continuous Output Current Output Current Limit Output Voltage Tolerance Temperature Coefficient Line Regulation VIN = VOUT(TYP) + 1V to VOUT(TYP) + 6V Load Regulation VIN = 5V , IOUT = 0.1~150mA IOUT = 50 mA Dropout Voltage (1) IOUT = 100 mA VOUT2.5V IOUT = 150 mA Dropout Voltage (2) Noise Bypass Terminal Voltage Output Noise CBP = 0.1F , f = 1KHz VIN = 5V IOUT=150 mA VOUT <2.5V VDROP2 VREF n 1.23 0.46 VDROP1 TEST CONDITIONS IOUT = 0mA, VIN = 3.6~12V VIN = 3.6~8V , output OFF IOUT = 0.1~150mA VIN = VOUT + 1V VIN = VOUT + 1V , VOUT = 0V VIN = VOUT + 1V , no load SYMBOL IQ ISTBY IGND IOUT IIL VOUT TC VLIR VLOR 150 -2 50 2 220 2 150 7 55 MIN. TYP. 55 MAX. 80 0.1 80 150 UNIT A A A mA mA % ppm/C mV 7 90 140 200 25 160 230 350 700 mV mV mV mV mV V V Hz SHUTDOWN TERMINAL SPECIFICATIONS Shutdown Pin Current Shutdown Pin Voltage (ON) Output ON (ON) V SHDN Shutdown Pin Voltage (OFF) Output OFF CBP = 0.1F , COUT = 1F, IOUT=30mA (OFF) t 300 0.6 V I SHDN V SHDN 1.6 V 0.1 A Shutdown Exit Delay Time THERMAL PROTECTION Thermal Shutdown Temperature S TSD 155 C 1/26/2004 Rev.2.02 www.SiliconStandard.com 3 of 11 SS6730 TYPICAL PERFORMANCE CHARACTERISTICS IOUT=1mA,CBP=0.1F COUT=10F IOUT=1mA,CBP =0.1 F COUT=1F VOUT 50mV/DIV VOUT 50mV/DIV VOUT+3V VOUT+1V VIN 2V/DIV VOUT+1V VOUT +3V VIN 2V/DIV TIME (100 S/DIV) Time (100 S/DIV) Fig. 1 Line Transient Response Fig. 2 Line Transient Response IOUT=1mA,CBP =1F COUT=1F IOUT=1mA,CB P=1F COUT=10F VOUT 50mV/DIV VOUT 50mV/DIV VOUT+3V VOUT+1V VIN 2V/DIV VOUT+3V VOUT+1V VIN 2V/DIV Time (100S/DIV) Time (100 S/DIV) Fig. 3 Line Transient Response Fig. 4 Line Transient Response I OUT =30mA,C BP=0.01F C OUT =3.3F V OUT 2V/DIV IOUT=30mA,CBP=0.1F COUT=3.3 F VOUT 2V/DIV VSHDN 2V/DIV VSHDN 2V/DIV Time (250S/DIV) Time (250 S/DIV) Fig. 5 Shutdown Exit Delay Fig. 6 Shutdown Exit Delay 1/26/2004 Rev.2.02 www.SiliconStandard.com 4 of 12 SS6730 TYPICAL PERFORMANCE CHARACTERISTICS (Continued) IOUT=10mA,C BP=0.1F COUT =10F VOUT 2V/DIV IOUT=10mA,CBP =0.1 F COUT=1F VOUT 2V/DIV VSHDN 2V/DIV VSHDN 2V/DIV Time (250 S/DIV) TIME (250 S/DIV) Fig. 7 Shutdown Exit Delay Fig. 8 Shutdown Exit Delay CB P=0.1 F COUT=1F CBP =0.1 F COUT=10F VOUT 20mV/DIV VOUT 20mV/DIV IOUT=60mA IOUT=0mA IOUT I OUT =0mA IOUT=60mA I OUT Time (1mS/DIV) TIME (1mS/DIV) Fig. 9 Load Transient Response Fig. 10 Load Transient Response CB P=0.1 F COUT=1F VOUT 20mV/DIV C BP =0.1 F C OUT=10F VOUT 20mV/DIV IOUT=90mA I OUT=90mA I OUT =0mA I OUT I OUT=0mA I OUT Time (1mS/DIV) Time (1mS/DIV) Fig. 11 Load Transient Response Fig. 12 Load Transient Response 1/26/2004 Rev.2.02 www.SiliconStandard.com 5 of 12 SS6730 TYPICAL PERFORMANCE CHARACTERISTICS (Continued) 250 70 IOUT =50mA 200 VOUT=3.0V 60 50 IOUT=0mA VDROP (mV) 150 IGND (uA) 0 50 100 150 40 30 20 100 50 10 0 0 0 1 2 3 4 5 6 IOUT (mA) VIN (V) Fig. 13 Dropout Voltage vs. Output Current Fig. 14 Ground Current vs. Input Voltage (VOUT=3.0V) 80 70 60 70 68 66 64 IOUT=90mA IGND (mA) IQ (A) 50 40 30 20 IOUT =0mA 62 60 58 56 54 IOUT =60mA IOUT =30mA 10 0 0 52 2 4 6 8 10 12 14 16 50 -40 -20 0 20 40 60 80 100 120 140 160 VIN (V) TA (C) Fig. 15 Quiescent Current (ON Mode) vs. Input Voltage Fig. 16 Ground Current vs. Temperature 2.0 400 1.5 Output ON IOUT (mA) 300 VSHDN (V) 1.0 200 0.5 VOUT is connected to GND 100 Output OFF 0.0 -40 0 0 40 80 120 0 2 4 6 8 TA (C) V IN (V) Fig. 17 Shutdown Voltage vs. Temperature Fig. 18 Short Circuit Current vs. Input Voltage 1/26/2004 Rev.2.02 www.SiliconStandard.com 6 of 12 SS6730 TYPICAL PERFORMANCE CHARACTERISTICS (Continued) 70 IGND (A) 65 60 55 0 50 100 150 IOUT (mA) Fig. 19 Ground Current vs. Output Current BLOCK DIAGRAM VIN Current Limiting BP VREF 1.23V Power Shutdown + Error Amp. Thermal Limiting VOUT SHDN GND 1/26/2004 Rev.2.02 www.SiliconStandard.com 7 of 12 SS6730 PIN DESCRIPTIONS SOT-23-5 PIN 1 : VIN SOT-23-6W Power supply input pin. Bypass with a 1F capacitor to GND PIN 2 : GND Ground functions of a pin. as large This a pin also To the PIN 3 : BP heatsink. pad or PIN 1 : PIN 2 : SHDN GND - - Active-low shutdown input pin. Ground functions of a pin. as large This a pin also To the heatsink. pad or maximize power dissipation, use circuit-board ground plane is recommended. - Noise bypass pin. An external bypass capacitor connected to the BP pin reduces noise at the output. PIN 4 : PIN 5 : VOUT GND - Output pin. Sources up to 150 mA. Ground functions of a pin. as large This a pin also To the heatsink. pad or maximize power dissipation, use circuit-board ground plane is recommended. PIN 3 : SHDN - Active-low shutdown input pin. PIN 4 : BP - Noise bypass pin. An external bypass capacitor connected to the BP pin reduces noise at the output. PIN 5 : VOUT - Output pin. Sources up to 150 mA. maximize power dissipation, use circuit-board ground plane is recommended. PIN 6 : VIN Power supply input pin. Bypass with a 1F capacitor to GND. DETAILED DESCRIPTION OF TECHNICAL TERMS OUTPUT VOLTAGE (V OUT) The SS6730 provides factory-set output voltages from 1.8V to 3.3V, in 100mV increments. The output voltage is specified with VIN = VOUT (TYP) + 1V and IOUT = 0mA which the output voltage drops 100mV below the value measured with a 1V difference. CONTINUOUS OUTPUT CURRENT (IOUT) Normal rated output current. This is limited by package power dissipation. DROPOUT VOLTAGE (VDROP) The dropout voltage is defined as the difference between the input voltage and output voltage at which point the regulator starts to fall out of regulation. Below this value, the output voltage will fall as the input voltage is reduced. It depends on the load current and junction temperature. The dropout voltage is specified at LINE REGULATION Line regulation is the ability of the regulator to maintain a constant output voltage as the input voltage changes. The line regulation is specified as the input voltage is changed from VIN = VOUT + 1 V to VIN = VOUT + 6 V and IOUT = 1mA. 1/26/2004 Rev.2.02 www.SiliconStandard.com 8 of 12 SS6730 LOAD REGULATION Load regulation is the ability of the regulator to maintain a constant output voltage as the load current changes. To minimize temperature effects, it is a pulsed measurement with the input voltage set to VIN = VOUT + 1 V. The load regulation is specified under the output current step of 0.1mA to 150mA. CURRENT LIMIT (I IL) The SS6730 includes a current limiter, to monitor and control the maximum output current to be 300mA typically if the output is shorted to ground. This can protect the device from being damaged. THERMAL PROTECTION The thermal sensor protects the device when the QUIESCENT CURRENT (I Q ) The quiescent current is the current flowing through the ground pin under no load. junction temperature exceeds TJ = +155C. It signals the shutdown logic, turning off the pass transistor and allowing the IC to cool. After the IC's junction temperature cools by 15C, the GROUND CURRENT (I GND) Ground current is the current flowing through the ground pin under loading. thermal sensor will turn on the pass transistor again. Thermal protection is designed to protect the device in the event of fault conditions. For STANDBY CURRENT (I STBY) Standby current is the current flowing into the regulator when the output is shutdown by setting V SHDN = 0V, VIN = 8 V. continuous operation do not exceed the absolute maximum junction-temperature rating of TJ = 150C, or damage may occur to the device. APPLICATION INFORMATION INPUT-OUTPUT CAPACITORS Linear regulators to require maintain input and output The capacitors stability. 1F(tantalum) and be rated for the actual ambient operating temperature range. Note: It is very important to check the selected manufacturers' electrical characteristics recommended minimum value of input capacitor is 0.22F. The output capacitor should be selected within the Equivalent Series Resistance (ESR) range shown in the graphs below for stability. Because a ceramic capacitor's ESR is lower and its electrical ESR) vary characteristics widely over (capacitance and ESR) over temperature. NOISE BYPASS CAPACITOR Use a 0.1F bypass capacitor at BP pin for low output voltage noise. Increasing the capacitance up to 1F will decrease the output noise. However, values above 1F and provide are no not (capacitance and temperature, a tantalum output capacitor is recommended, especially for heavier loads. In general, the capacitor should be at least performance recommended. advantage 1/26/2004 Rev.2.02 www.SiliconStandard.com 9 of 12 SS6730 POWER DISSIPATION The maximum dissipation of the SS6730 depends on the thermal resistance of the case and circuit board, the temperature difference between the die junction and ambient air, and the rate of air flow. The rate of temperature rise is greatly affected by the mounting pad where TJ -TA is the temperature difference between the die junction and the surrounding air, RJB is the thermal resistance of the package, and R BA is the thermal resistance through the PCB, copper traces, and other materials to the surrounding air. As a general rule, the lower the temperature, the better the reliability of the device, so the PCB mounting pad should provide maximum thermal conductivity to maintain low device temperature. The GND pin performs the dual function of providing an electrical connection to ground and channeling heat away. Therefore, connecting the GND pin to ground with a large pad or ground plane would increase the power dissipation and reduce the device temperature. 100 configuration on the PCB, the board material, and the ambient temperature. When the IC mounting with good thermal conductivity is used, the junction will be low even if the power dissipation is great. The power dissipation across the device is P = IOUT (V IN -VOUT). The maximum power dissipation is: PMAX = (TJ - TA) (R?JB + R? BA) 100 COUT=1F 10 10 COUT=2.2 F ESR() 1 ESR () STABLE REGION 1 Stable Region 0.1 0.1 0.01 50 100 Fig. 20 Max Power Dissipation, COUT=1F 100 100 IOUT (mA) 150 0.01 50 Fig. 21 Max Power Dissipation, COUT=2.2 F IOUT (mA) 100 150 10 COUT=3.3F ESR( ) COUT =10F 10 ESR() 1 1 Stable Region 0.1 0.1 Stable Region 0.01 50 100 150 0.01 50 100 150 Fig. 22 Max Power Dissipation, C OUT =3.3F IOUT (mA) Fig. 23 Max Power Dissipation, C OUT=10F IOUT (mA) 1/26/2004 Rev.2.02 www.SiliconStandard.com 10 of 12 SS6730 PHYSICAL DIMENSIONS SOT-23-5 (unit: mm) D C L HE SYMBOL A A1 A2 b C MIN 1.00 -- 0.70 0.35 0.10 2.70 1.40 MAX 1.30 0.10 0.90 0.50 0.25 3.10 1.80 e 1 D E e A2 A 1.90 (TYP) 2.60 0.37 1 3.00 -- 9 A1 b H L 1 SOT-23-5 Marking Part No. SS6730-18CV SS6730-19CV SS6730-20CV SS6730-21CV SS6730-22CV SS6730-23CV SS6730-24CV SS6730-25CV SS6730-26CV Marking EC18 EC19 EC20 EC21 EC22 EC23 EC24 EC25 EC26 Part No. SS6730-27CV SS6730-28CV SS6730-285CV SS6730-29CV SS6730-30CV SS6730-31CV SS6730-32CV SS6730-33CV Marking EC27 EC28 EC2J EC29 EC30 EC31 EC32 EC33 1/26/2004 Rev.2.02 www.SiliconStandard.com 11 of 12 SS6730 SOT-23-6W (unit: mm) D C L HE SYMBOL A A1 A2 b C MIN 1.00 -- 0.70 0.35 0.10 2.70 1.60 MAX 1.30 0.10 0.90 0.50 0.25 3.10 2.00 e 1 D E e A2 A 1.90 (TYP) 2.60 0.37 1 3.00 -- 9 A1 b H L 1 SOT-23-6W Marking Part No. SS6730-18CQ SS6730-19CQ SS6730-20CQ SS6730-21CQ SS6730-22CQ SS6730-23CQ SS6730-24CQ SS6730-25CQ SS6730-26CQ Marking EB18 EB19 EB20 EB21 EB22 EB23 EB24 EB25 EB26 Part No. SS6730-27CQ SS6730-28CQ SS6730-285CQ SS6730-29CQ SS6730-30CQ SS6730-31CQ SS6730-32CQ SS6730-33CQ Marking EB27 EB28 EB2J EB29 EB30 EB31 EB32 EB33 Information furnished by Silicon Standard Corporation is believed to be accurate and reliable. However, Silicon Standard Corporation makes no guarantee or warranty, express or implied, as to the reliability, accuracy, timeliness or completeness of such information and assumes no responsibility for its use, or for infringement of any patent or other intellectual property rights of third parties that may result from its use. Silicon Standard reserves the right to make changes as it deems necessary to any products described herein for any reason, including without limitation enhancement in reliability, functionality or design. No license is granted, whether expressly or by implication, in relation to the use of any products described herein or to the use of any information provided herein, under any patent or other intellectual property rights of Silicon Standard Corporation or any third parties. 1/26/2004 Rev.2.02 www.SiliconStandard.com 12 of 12 |
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