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Ordering number : ENA0966B
LV5604T
Overview
Bi-CMOS LSI
Eight-Channel Switching Regulator Controller
The LV5604T is a eight-channel switching regulator controller.
Features
* Low-voltage (3V) operation * Reference voltage precision : 1% * Independent standby functions for each of the eight channels * Is capable of driving MOS transistors * Synchronous rectification : channel 1 and channel 2 * Supports inverting step-up operation.
Specifications
Maximum Ratings at Ta = 25C
Parameter Maximum supply voltage Allowable power dissipation Operating temperature Storage temperature Symbol VCC max Pd max Topr Tstg Conditions Ratings 16 1 -30 to +85 -55 to +125 Unit V W C C
Recommended Operating Conditions at Ta = 25C
Parameter Supply voltage Supply voltage Timing resistor Timing capacitor Triangle wave frequency Symbol VCC VBIAS RT CT fOSC Conditions Ratings 3 to 15 3 to 15 7 to 30 100 to 1000 0.1 to 1.3 Unit V V k pF MHz
Any and all SANYO Semiconductor Co.,Ltd. products described or contained herein are, with regard to "standard application", intended for the use as general electronics equipment (home appliances, AV equipment, communication device, office equipment, industrial equipment etc.). The products mentioned herein shall not be intended for use for any "special application" (medical equipment whose purpose is to sustain life, aerospace instrument, nuclear control device, burning appliances, transportation machine, traffic signal system, safety equipment etc.) that shall require extremely high level of reliability and can directly threaten human lives in case of failure or malfunction of the product or may cause harm to human bodies, nor shall they grant any guarantee thereof. If you should intend to use our products for applications outside the standard applications of our customer who is considering such use and/or outside the scope of our intended standard applications, please consult with us prior to the intended use. If there is no consultation or inquiry before the intended use, our customer shall be solely responsible for the use. Specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer's products or equipment. To verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer's products or equipment.
O0108 MS 20080918-S00002 / D1207 MS 20071113-S00006 / O3107 MS PC 20071022-S00010 No.A0966-1/12
LV5604T
Electrical Characteristics at Ta = 25C, VCC = VBIAS = 3.6V, SCP = 0V
Parameter Error amplifier 1 IN+ pin internal bias voltage VB Value added to the error amplifier offset at the error amplifier + side Output low voltage Output high voltage Error amplifier 2 IN5-RE pin offset voltage Output low voltage Output high voltage Protection circuit Threshold voltage SCP pin current Short circuit detection signal pin Software start block (ch1 to ch8) Soft start current Soft start resistance Fixed duty Maximum on duty 1 Maximum on duty 2 Maximum on duty 3 Output block 1 to 6 OUT pin high side on resistance OUT pin high side on resistance Triangle wave oscillator block Current setting pin voltage Output current Output current ratio Oscillation frequency Reference voltage block Reference voltage Line regulation Control circuit On state voltage OFF state voltage Pin input current Standby circuit On voltage Off voltage Pin input current All circuits VCC current consumption Standby mode current consumption ICC IOFF IN1- to IN8- = 1V VSTBY = VCTL = 0V IOFF = ICC + IBIAS 6 7.5 1 mA A VON STBY VOFF STBY IIN STBY VSTBY = 2V 2.0 0.6 60 V V A VON CTL VOFF CTL IIN CTL VCTL = 2V 2.0 0.6 60 V V A VREF VLN REF VCC = 3V to 15V 1.230 10 V mV VT RT IOH CT IO CT fOSC1 CT pin, ISOURCE/ISINK RT = 10k, CT = 270pF 390 RT = 10k 0.57 220 2.5 490 570 kHz V A ROUT SOUR ROUT SINK IO = 10mA IO = 10mA 25 10 ch1 to ch4 ch5 ch6 to ch8 Duty MAX 1 to 4 Duty MAX 5 Duty MAX 6 to 8 Out monitor, IN- = 0V Out monitor, IN- = 0V Out monitor, IN- = 0V 100 80 80 85 85 90 90 % % % ch1 to ch8 ch1 to ch8 ISF RSF CSOFT1 to 8 = 0V 3.2 160 4 200 4.8 240 A k VSCP ISCP VSCPOUT Open collector ISCPOUT = 100A 1.1 1.25 4 0.2 1.4 V A V VOF VLow FB5RE VHi FB5RE IN5- RE = 2.0V, IFB = 20A FB5RE ; H, IFB = 500A 1.95 -6 6 0.2 mV V V ch1 to ch8 ch1 to ch8 VLow FB VHi FB voltage IN- = 2.0V, IFB = 20A IN- = 0V IFB1 = -20A 2.0 0.2 V V 0.509 0.515 0.521 V Symbol Conditions min Ratings typ max Unit
No.A0966-2/12
LV5604T
Package Dimensions
unit : mm (typ) 3289
1.2
Pd max -- Ta
Specified board : 50.0x50.0x1.6mm3 glass epoxy
9.0 7.0 48 49 33 32
Allowable power dissipation, Pd max - W
1
0.5
0.8
0.6
7.0
9.0
0.4
0.40
64 1 0.4 (0.5) 0.16 16
17 0.125
0.2
0 - 30 - 20
0
20
40
60
80
100
Ambient temperature, Ta - C
1.2max 0.1
(1.0)
SANYO : TQFP64J(7X7)
Pin Assignment
GND_P1(VS1) GND_P2(VS2) CLK_OUT
48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
OUT1N
OUT2N
SYNC1
OUT1
OUT2
OUT3
OUT4
OUT5
OUT6
OUT7
OUT8
(NC)
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 SYNC2 VBIAS1 STBY1 STBY2 STBY3 STBY4 CSOFT1 CSOFT2 CSOFT3 1 2 3 4 5 6 7 8 9 CLK_IN VBIAS2 VCC STBY8 STBY7 STBY6 STBY5 CSOFT8 CSOFT7 CSOFT6 CSOFT5 CTL SEL_CH8 FB8 IN8FB7
CSOFT4 10 SCP 11 SCP_OUT 12 IN1- 13 FB1 14 IN2- 15 FB2 16
CT
FB3
FB4
RT
FB5
VREF
IN3-
IN4-
IN5-
IN6-
FB6
(NC)
FB5RE
IN5+RE
GND_S
IN5-RE
IN7-
LV5604T
Top view
No.A0966-3/12
LV5604T
Block Diagram and Sample Application Circuit
CTL VREF FB1A IN1FB1 CSOFT1 CTL
(NC) (NC)
SCP_OUT
SCP SCP
Signal system power supply VCC
Pre-output stage power supply VBIAS1
VBAT
+ + -
+
OUT1
Step-down
FB1A
(DOWN)
OUT1N
SYNC1 L: Synchronous rectification H: Diode rectification
VO1 3.3V/100mA
FB2A IN2FB2 CSOFT2
SYNC1
Step-down
+ + -
+
OUT2
FB2A
(DOWN)
OUT2N
SYNC2 L: Synchronous rectification H: Diode rectification
VO2 3.3V/100mA
FB3A IN3FB3 CSOFT3
SYNC2 FB3A
Step-down
+ + -
+
OUT3
(DOWN)
FB4A IN4FB4 FB5A CSOFT4 IN5-RE IN5+RE FB5RE IN5FB5 CSOFT5 GND_P(VS1)
+ + -
+
OUT4
FB4A
Step-down
(DOWN)
VO2 3.3V/100mA
+
VBIAS2 FB5A OUT5 VO3 -4V/100mA Inversion (INVENT)
+ + -
+
FB6A IN6FB6 CSOFT6 ON/OFF setting FB7A
FB6A
+ + -
+ -
OUT6 Step-up (UP)
FB7A IN7FB7 CSOFT7 SEL_CH8 MODE Step-down; Connect to VBIAS Step-up; Connect to GND2 IN8FB8 CSOFT8 CLK CLK_OUT STBY GND_P(VS2) STBY8 STBY7 STBY6 STBY5 STBY4 STBY3 STBY2 STBY1 OSC CLK_IN RT CT GND_S ON/OFF setting SEL_CH8 FB8A OUT8 ON/OFF setting Step-up (UP)
+ + -
+ -
OUT7 Step-up (UP)
FB8A
+ + -
+ -
Channel 8 step-up/step-down is selected by SEL_CH8
No.A0966-4/12
LV5604T
Pin Function
Block ch1 (Step-down) Pin No. 3 13 14 61 62 7 ch2 (Step-down) 4 15 16 60 59 8 ch3 (Step-down) 5 17 18 9 57 ch4 (Step-down) 6 19 20 10 56 ch5 (Inversion) 42 28 29 27 25 26 38 55 ch6 (Step-up) 43 30 31 39 53 ch7 (Step-up) 44 32 33 40 52 ch8 (Step-down) (Step-up) 45 34 35 41 51 Pin Name STBY1 IN1FB1 OUT1 OUT1N CSOFT1 STBY2 IN2FB2 OUT2 OUT2N CSOFT2 STBY3 IN3FB3 CSOFT3 OUT3 STBY4 IN4FB4 CSOFT4 OUT4 STBY5 IN5-RE IN5+RE FB5RE IN5FB5 CSOFT5 OUT5 STBY6 IN6FB6 CSOFT6 OUT6 STBY7 IN7FB7 CSOFT7 OUT7 STBY8 IN8FB8 CSOFT8 OUT8 Standby input. H/ch1 ; ON, L/ch1 ; OFF Error amplifier Inverting input Error amplifier output Output. External transistor P-channel gate connect Output. External transistor N-channel gate connection Soft start setting capacitor connection. Connect to GND through a capacitor. Standby input. H/ch2 ; ON, L/ch2 ; OFF Error amplifier Inverting input Error amplifier output Output. External transistor P-channel gate connection Output. External transistor N-channel gate connection Soft start setting capacitor connection. Connect to GND through a capacitor. Standby input. H/ch3 ; ON, L/ch3 ; OFF Error amplifier Inverting input Error amplifier output Soft start setting capacitor connection. Connect to GND through a capacitor. Output. External transistor P-channel gate connection Standby input. H/ch4 ; ON, L/ch4 ; OFF Error amplifier Inverting input Error amplifier output Soft start setting capacitor connection. Connect to GND through a capacitor. Output. External transistor P-channel gate connection Standby input. H/ch5 ; ON, L/ch5 ; OFF Inversion step-up error amplifier, - (Inverting) input Inversion step-up error amplifier, + (noninverting) input Inversion step-up error amplifier output Error amplifier Inverting input Error amplifier output Soft start setting capacitor connection. Connect to GND through a capacitor. Output. External transistor P-channel gate connection Standby input. H/ch6 ; ON, L/ch6 ; OFF Error amplifier Inverting input Error amplifier output Soft start setting capacitor connection. Connect to GND through a capacitor. Output. External transistor N-channel gate connection Standby input. H/ch7 ; ON, L/ch7 ; OFF Error amplifier Inverting input Error amplifier output Soft start setting capacitor connection. Connect to GND through a capacitor. Output. External transistor N-channel gate connection Standby input. H/ch8 ; ON, L/ch8 ; OFF Error amplifier Inverting input Error amplifier output Soft start setting capacitor connection. Connect to GND through a capacitor. Output. External transistor (Step-up / N-channel, Step-down / P-channel) gate connection Functions
Continued on next page.
No.A0966-5/12
LV5604T
Continued from preceding page.
Block MODE Pin No. 64 1 36 POWER 46 2 47 24 58 54 23 CONTROL 37 11 12 OSC 21 22 48 49 OTHER 63 50 Pin Name SYNC1 SYNC2 SEL_CH8 VCC VBIAS1 VBIAS2 GND_S GND_P1 (VS1) GND_P2 (VS2) VREF CTL SCP SCP_OUT CT RT CLKIN CLKOUT (NC) (NC) Functions Synchronous rectification/diode rectification switching, L : synchronous rectification H : diode rectification Synchronous rectification/diode rectification switching, L : synchronous rectification H : diode rectification Channel 8 step-up/step-down switching, L (GND) : step-up H (VBIAS2) : step-down Power supply input (signal system) Power supply input (ch1 to ch4, pre-output stage) Power supply input (ch5 to ch8, pre-output stage) Ground (signal system) Ground (ch1 to ch4, pre-output stage) Ground (ch5 to ch8, pre-output stage) Reference voltage output Power supply control Connection pin for the delay time setting capacitor of short circuit detection circuit Short circuit detection circuit output Triangle wave oscillation frequency setting capacitor connection Triangle wave oscillation frequency setting resistor connection External clock input Clock output No connection No connection
No.A0966-6/12
LV5604T
Equivalent Circuits
Pin No. 37 3 4 5 6 42 43 44 45 13 15 17 19 25 30 32 34 Pin Name CTL STBY1 STBY2 STBY3 STBY4 STBY5 STBY6 STBY7 STBY8 IN1IN2IN3IN4IN5IN6IN7IN8Error amplifier inverting input. The regulator output is divided by a resistor and connected to IN*Description CTL : Controls operation of all channels. STBY* : Independently controls operation of the corresponding channel. Operation is high active. High : Circuit operation ON Low : Circuit operation OFF Equivalent Circuit
CTL/STBY* 120k
30k
VREG (Internal constant voltage) IN*500
5k
5k GND_S
14 16 18 20 26 31 33 35
FB1 FB2 FB3 FB4 FB5 FB6 FB7 FB8
Error amplifier output. These pins, in combination with IN*-, configure the error amplifier filters
VREG (Internal constant voltage) 20 FB* 500
GND_S
29 28 IN5+RE IN5-RE Inversion step-up (Channel 5) error amplifier input. These pins, in combination with FB5R, configure the operational amplifier (independent)
VREG (Internal constant voltage) IN5-RE 500 500 IN5+RE
5k
5k GND_S
27
FB5RE
Inversion step-up (Channel5) error amplifier output. This pin, in combination with IN5+RE and IN5-RE, configures the operational amplifier (independent).
VREG (Internal constant voltage) FB5RE
GND_S
7 8 9 10 38 39 40 41 CSOFT1 CSOFT2 CSOFT3 CSOFT4 CSOFT5 CSOFT6 CSOFT7 CSOFT8 Soft start. Connect to GND via a capacitor to set the soft start time.
VREG (Internal constant voltage) 500 10k CSOFT*
200k GND_S
Continued on next page.
No.A0966-7/12
LV5604T
Continued from preceding page.
Pin No. 61 62 60 59 57 56 55 53 52 51 22 Pin Name OUT1 OUT1N OUT2 OUT2N OUT3 OUT4 OUT5 OUT6 OUT7 OUT8 RT Connect to GND through a resistor. This pin, together with CT, sets the oscillation frequency. Output. Connect external FET. Description Equivalent Circuit
VBIAS*
VOUT* VOUT*N GND_P*(VS*)
VREG (Internal constant voltage) 500 RT 500 GND_S
21
CT
Connect to GND through a capacitor. This pin, together with RT, sets the oscillation frequency.
VREG (Internal constant voltage)
CT
GND_S
11 SCP Connect to GND via a capacitor to set the short circuit detection circuit delay time.
VREG (Internal constant voltage)
1.5k SCP 13k
GND_S
12 SCP_OUT Short circuit detection circuit output. When SCP exceeds the threshold voltage, the open collector goes OFF and this pin goes High.
SCP_OUT
VREG (Internal constant voltage)
GND_S
Continued on next page.
No.A0966-8/12
LV5604T
Continued from preceding page.
Pin No. 23 Pin Name VREF Description Internal constant voltage circuit output. Connect a stabilizing capacitor. Equivalent Circuit
VREG (Internal constant voltage) VREF
14.8k
GND_S
48 CLK_IN External clock input. Apply an external clock of the internal oscillation frequency or higher.
VREG (Internal constant voltage) CLKIN 300
GND_S
49 CLK_OUT Clock output. This outputs the internal or external clock frequency pulse.
VREG (Internal constant voltage) 300 CLKOUT 300
GND_S
64 1 SYNC1 SYNC2 Channel 1 and channel 2 synchronous/diode rectification switching. Low : Synchronous rectification High : Diode rectification Switching operates independently for the corresponding channel.
VREG (Internal constant voltage) SYNC* 120k SYNC* L : Synchronous rectification H : Diode rectification
30k GND_S
36 SEL_CH8 Channel 8 step-up/step-down switching. High : Sets step-down Low : Sets step-up
VBIAS2
SEL_CH8
GND_P2 (VS2) Channel 8 step-up/step-down switching H (VBIAS2) : step-down, L (GND) : step-up
Continued on next page.
No.A0966-9/12
LV5604T
Continued from preceding page.
Pin No. 46 Pin Name VCC VBIAS1 VBIAS2 GND_S Description Signal system power supply Equivalent Circuit
VCC
2 47 24
Power system power supply (Output stage) Signal system GND
VBIAS* GND_S GND_P*(VS*) (NC)
58 54 50 63
GND_P1 (VS1) Output stage GND GND_P2 (VS2) (Output stage GND) (NC) (NC) Use prohibited (Not connected pins)
Notes (1) Channel 8 step-up/step-down selection function The channel 8 step-up or step-down converter selection is made by the SEL_8CH pin connection. Step-up/step-down is selected by SEL_CH8, but this selection cannot be switched during use, and is fixed to either step-up or step-down in the design stage. In addition, unlike other channels, channel 8 is not connected internally to a pull-up/pull-down resistor, so an external resistor must be connected instead. (Mode selection using SEL_CH8)
Selected mode Step-down (DOWN converter) Step-up (UP converter) SEL_CH8 connection VBIAS2 GND_P2 (VS2) OUT8 resistor connection Connect to VBIAS2 via a resistor (between the PchTr gate and VBIAS2) Connect to GND_P2 (VS2) via a resistor (between the NchTr gate and GND_P2 (VS2))
(2) Soft start time setting method The soft start time is set with the capacitor connected between CSOFT* and GND_S. This IC has an independent soft start function for each channel, so a capacitor must be connected for each channel to set the soft start (time). (Description of soft start operation)
CSOFT* [V] CSOFT* voltage VB ( = 0.515 [V] (TYP)) VREG (Internal constant voltage)
(Outline of soft start pin)
T [s] 200k Soft start time (Tsoft [s]) CSOFT pin charging starts The output voltage reaches the set voltage (Output voltage constant) VB (0.515 [V])
CSOFT* GND_S
(3) Setting the oscillation frequency The internal oscillation frequency is set by the resistor connected to the RT pin and the capacitor connected to the CT pin. The waveform generated on CT is a triangular wave with the charging/discharging waveform determined by RT and CT. 1 fOSC = CT x RT [Hz] The actual internal oscillation frequency deviates from the calculated value due to overshoot, undershoot and other factors, so the frequency should be confirmed in an actual set.
No.A0966-10/12
LV5604T
(4) External input CLK function (CLK_IN) Switching operation can be synchronized with external clock input (CLK_IN) by using the CLK_IN pin. * External clock (CLK_IN) frequency and input level When using external clock (CLK_IN) input, input a frequency equal to the internal oscillation frequency +20% or more to CLK_IN. In addition, the CLK_IN configuration is shown in the figure "CLK_IN (input) equivalent circuit (outline)" below. The 0.8V reference voltage and CLK_IN are compared to determine the edges, so input a signal of 0.8V or more (VCC voltage or less) as the external clock (CLK_IN). * External/internal clock switching Set the CTL pin Low before switching between the external clock and the internal clock. * Maximum ON duty The maximum ON duty (Duty_MAX*) of channel 1 to channel 4 is the 85% (typ.) setting. When using the external clock (CLK_IN), the maximum ON duty (Duty_MAX*) becomes smaller, so care must be taken for the set output voltage. (CLK_IN (input) equivalent circuit (outline))
CLK_IN 0.8V
(5) SCP function * Description of operation When FB1 to FB8 go High due to the load being shorted or other reason, charging to the SCP pin starts, and if output does not recover during the set time Tscp, the protective circuit (SCP) operates. When the protection circuit (SCP) operates, all channel outputs are turned OFF. When not using the protection function (SCP), the SCP pin must be shorted to GND_S with a line that is as short as possible. When the SCP function operates and SCP_OUT goes High, all outputs are latched OFF. This latched state is canceled by setting the CTL pin Low or by turning the power supply off. * SCP_OUT The SCP_OUT pin functions to notify an external microcontroller or other component of the SCP (short circuit protection) and CTL status. The output configuration is an open drain output, and a pull-up resistor is used. When not used, leave this pin open. * Switching time The SCP_OUT switching time is set by the capacitor connected to the SCP pin. (SCP charging operation)
SCP [V] 1.25 [V] (TYP) Charging with Iscp = 4 [A] CTL SCP T [s] SCP_OUT SCP operation Threshold voltage 1.25 (TYP)
(SCP and SCP_OUT operation)
tscp Output short circuit
No.A0966-11/12
LV5604T
SANYO Semiconductor Co.,Ltd. assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein. SANYO Semiconductor Co.,Ltd. strives to supply high-quality high-reliability products, however, any and all semiconductor products fail or malfunction with some probability. It is possible that these probabilistic failures or malfunction could give rise to accidents or events that could endanger human lives, trouble that could give rise to smoke or fire, or accidents that could cause damage to other property. When designing equipment, adopt safety measures so that these kinds of accidents or events cannot occur. Such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design. In the event that any or all SANYO Semiconductor Co.,Ltd. products described or contained herein are controlled under any of applicable local export control laws and regulations, such products may require the export license from the authorities concerned in accordance with the above law. No part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any information storage or retrieval system, or otherwise, without the prior written consent of SANYO Semiconductor Co.,Ltd. Any and all information described or contained herein are subject to change without notice due to product/technology improvement, etc. When designing equipment, refer to the "Delivery Specification" for the SANYO Semiconductor Co.,Ltd. product that you intend to use. Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production. Upon using the technical information or products described herein, neither warranty nor license shall be granted with regard to intellectual property rights or any other rights of SANYO Semiconductor Co.,Ltd. or any third party. SANYO Semiconductor Co.,Ltd. shall not be liable for any claim or suits with regard to a third party's intellctual property rights which has resulted from the use of the technical information and products mentioned above.
This catalog provides information as of October, 2008. Specifications and information herein are subject to change without notice. PS No.A0966-12/12

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