![]() |
|
If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
Datasheet File OCR Text: |
4.5 RON, 4-/8-Channel 5 V,+12 V, +5 V, and +3.3 V Multiplexers ADG1608/ADG1609 FEATURES 4.5 typical on resistance 1 on-resistance flatness Up to 470 mA continuous current 3.3 V to 8 V dual-supply operation 3.3 V to 16 V single-supply operation No VL supply required 3 V logic-compatible inputs Rail-to-rail operation 16-lead TSSOP and 16-lead, 3 mm x 3 mm LFCSP FUNCTIONAL BLOCK DIAGRAMS ADG1608 S1 D S8 1-OF-8 DECODER 08318-001 APPLICATIONS Communication systems Medical systems Audio signal routing Video signal routing Automatic test equipment Data acquisition systems Battery-powered systems Sample-and-hold systems Relay replacements A0 A1 A2 EN Figure 1. ADG1609 S1A DA S4A S1B DB S4B 1-OF-4 DECODER 08318-002 A0 A1 EN Figure 2. GENERAL DESCRIPTION The ADG1608/ADG1609 are monolithic CMOS analog multiplexers comprising eight single channels and four differential channels, respectively. The ADG1608 switches one of eight inputs to a common output, as determined by the 3-bit binary address lines, A0, A1, and A2. The ADG1609 switches one of four differential inputs to a common differential output, as determined by the 2-bit binary address lines, A0 and A1. An EN input on both devices is used to enable or disable the device. When disabled, all channels are switched off. Each switch conducts equally well in both directions when on and has an input signal range that extends to the supplies. In the off condition, signal levels up to the supplies are blocked. All switches exhibit break-before-make switching action. Inherent in the design is low charge injection for minimum transients when switching the digital inputs. The low on resistance of these switches make them ideal solutions for data acquisition and gain switching applications where low on resistance and distortion is critical. The on-resistance profile is very flat over the full analog input range, ensuring excellent linearity and low distortion when switching audio signals. CMOS construction ensures ultralow power dissipation, making the parts ideally suited for portable and batterypowered instruments. PRODUCT HIGHLIGHTS 1. 2. 3. 4. 5. 6. 8 maximum on resistance over temperature. Minimum distortion: THD + N = 0.04% 3 V logic-compatible digital inputs: VINH = 2.0 V, VINL = 0.8 V. No VL logic power supply required. Ultralow power dissipation: <8 nW. 16-lead TSSOP and 16-lead, 3 mm x 3 mm LFCSP. Rev. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 (c)2009 Analog Devices, Inc. All rights reserved. ADG1608/ADG1609 TABLE OF CONTENTS Features .............................................................................................. 1 Applications ....................................................................................... 1 Functional Block Diagrams ............................................................. 1 General Description ......................................................................... 1 Product Highlights ........................................................................... 1 Revision History ............................................................................... 2 Specifications..................................................................................... 3 5 V Dual Supply ......................................................................... 3 12 V Single Supply ........................................................................ 4 5 V Single Supply .......................................................................... 4 3.3 V Single Supply ....................................................................... 6 Continuous Current per Channel, S or D ..................................7 Absolute Maximum Ratings ............................................................8 ESD Caution...................................................................................8 Pin Configurations and Function Descriptions ............................9 Typical Performance Characteristics ........................................... 11 Test Circuits ..................................................................................... 14 Terminology .................................................................................... 17 Outline Dimensions ....................................................................... 18 Ordering Guide .......................................................................... 18 REVISION HISTORY 7/09--Revision 0: Initial Version Rev. 0 | Page 2 of 20 ADG1608/ADG1609 SPECIFICATIONS 5 V DUAL SUPPLY VDD = +5 V 10%, VSS = -5 V 10%, GND = 0 V, unless otherwise noted. Table 1. Parameter ANALOG SWITCH Analog Signal Range On Resistance (RON) On-Resistance Match Between Channels (RON) On-Resistance Flatness (RFLAT(ON)) LEAKAGE CURRENTS Source Off Leakage, IS (Off) Drain Off Leakage, ID (Off) ADG1608 ADG1609 Channel On Leakage, ID, IS (On) DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current, IINL or IINH Digital Input Capacitance, CIN DYNAMIC CHARACTERISTICS 1 Transition Time, tTRANSITION tON (EN) tOFF (EN) Break-Before-Make Time Delay, tD Charge Injection Off Isolation Channel-to-Channel Crosstalk Total Harmonic Distortion + Noise (THD + N) -3 dB Bandwidth ADG1608 ADG1609 CS (Off) CD (Off) ADG1608 ADG1609 CD, CS (On) ADG1608 ADG1609 POWER REQUIREMENTS IDD VDD/VSS 1 25C -40C to +85C -40C to +125C VDD to VSS Unit V typ max typ max typ max nA typ Test Conditions/Comments 4.5 5 0.12 0.25 1 1.3 0.02 0.1 0.03 0.15 0.15 0.03 0.15 7 0.3 1.7 8 0.35 2 VS = 4.5 V, IS = -10 mA; see Figure 25 VDD = 4.5 V, VSS = 4.5 V VS = 4.5 V, IS = -10 mA VS = 4.5 V, IS = -10 mA VDD = +5.5 V, VSS = -5.5 V VS = 4.5 V, VD = 4.5 V; see Figure 26 VS = 4.5 V, VD = 4.5 V; see Figure 26 0.5 2 1 2 3 14 7 14 2.0 0.8 nA max nA typ nA max nA max nA typ nA max V min V max nA typ A max pF typ ns typ ns max ns typ ns max ns typ ns max ns typ ns min pC typ dB typ dB typ % typ MHz typ MHz typ pF typ pF typ pF typ pF typ pF typ A typ A max V min/max VS = VD = 4.5 V; see Figure 27 1 0.1 4 150 182 106 132 113 144 47 24 -64 -64 0.04 40 71 20 120 61 153 85 0.001 1.0 3.3/8 VIN = VGND or VDD 230 150 178 258 160 202 30 RL = 300 , CL = 35 pF VS = 2.5 V; see Figure 28 RL = 300 , CL = 35 pF VS = 2.5 V; see Figure 30 RL = 300 , CL = 35 pF VS = 2.5 V; see Figure 30 RL = 300 , CL = 35 pF VS1 = VS2 = 2.5 V; see Figure 29 VS = 0 V, RS = 0 , CL = 1 nF; see Figure 31 RL = 50 , CL = 5 pF, f = 1 MHz; see Figure 32 RL = 50 , CL = 5 pF, f = 1 MHz; see Figure 34 RL = 110 , VS = 5 V p-p, f = 20 Hz to 20 kHz; see Figure 35 RL = 50 , CL = 5 pF; see Figure 33 VS = 0 V, f = 1 MHz VS = 0 V, f = 1 MHz VS = 0 V, f = 1 MHz VS = 0 V, f = 1 MHz VS = 0 V, f = 1 MHz VDD = +5.5 V, VSS = -5.5 V Digital inputs = 0 V or VDD Guaranteed by design, but not subject to production test. Rev. 0 | Page 3 of 20 ADG1608/ADG1609 12 V SINGLE SUPPLY VDD = 12 V 10%, VSS = 0 V, GND = 0 V, unless otherwise noted. Table 2. Parameter ANALOG SWITCH Analog Signal Range On Resistance (RON) On-Resistance Match Between Channels (RON) On-Resistance Flatness (RFLAT(ON)) LEAKAGE CURRENTS Source Off Leakage, IS (Off) Drain Off Leakage, ID (Off) ADG1608 ADG1609 Channel On Leakage, ID, IS (On) DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current, IINL or IINH Digital Input Capacitance, CIN DYNAMIC CHARACTERISTICS1 Transition Time, tTRANSITION tON (EN) tOFF (EN) Break-Before-Make Time Delay, tD Charge Injection Off Isolation Channel-to-Channel Crosstalk Total Harmonic Distortion + Noise (THD + N) -3 dB Bandwidth ADG1608 ADG1609 CS (Off) CD (Off) ADG1608 ADG1609 CD, CS (On) ADG1608 ADG1609 POWER REQUIREMENTS IDD ADG1608 ADG1609 VDD 1 25C -40C to +85C -40C to +125C 0 V to VDD Unit V typ max typ max typ max nA typ nA max nA typ nA max nA max nA typ nA max V min V max nA typ A max pF typ ns typ ns max ns typ ns max ns typ ns max ns typ ns min pC typ dB typ dB typ % typ MHz typ MHz typ pF typ pF typ pF typ pF typ pF typ A typ A max A typ A max A typ A max V min/max Test Conditions/Comments 4 4.5 0.12 0.25 0.9 1.2 0.02 0.1 0.03 0.15 0.15 0.03 0.15 6.5 0.3 1.6 7.5 0.35 1.9 VS = 0 V to 10 V, IS = -10 mA; see Figure 25 VDD = 10.8 V, VSS = 0 V VS = 10 V, IS = -10 mA VS = 0 V to 10 V, IS = -10 mA VDD = 13.2 V, VSS = 0 V VS = 1 V/10 V, VD = 10 V/1 V; see Figure 26 VS = 1 V/10 V, VD = 10 V/1 V; see Figure 26 0.5 2 1 2 3 14 7 14 2.0 0.8 VS = VD = 1 V or 10 V; see Figure 27 1 0.1 4 113 141 80 94 77 93 47 29 -64 -64 0.04 40 78 19 117 59 149 84 0.001 1.0 300 480 225 360 3.3/16 VIN = VGND or VDD 172 101 117 196 110 140 30 RL = 300 , CL = 35 pF VS = 8 V; see Figure 28 RL = 300 , CL = 35 pF VS = 8 V; see Figure 30 RL = 300 , CL = 35 pF VS = 8 V; see Figure 30 RL = 300 , CL = 35 pF VS1 = VS2 = 8 V; see Figure 29 VS = 6 V, RS = 0 , CL = 1 nF; see Figure 31 RL = 50 , CL = 5 pF, f = 1 MHz; see Figure 32 RL = 50 , CL = 5 pF, f = 1 MHz; see Figure 34 RL = 110 , VS = 5 V p-p, f = 20 Hz to 20 kHz; see Figure 35 RL = 50 , CL = 5 pF; see Figure 33 VS = 6 V, f = 1 MHz VS = 6 V, f = 1 MHz VS = 6 V, f = 1 MHz VS = 6 V, f = 1 MHz VS = 6 V, f = 1 MHz VDD = 12 V Digital inputs = 0 V or VDD Digital inputs = 5 V Digital inputs = 5 V Guaranteed by design, but not subject to production test. Rev. 0 | Page 4 of 20 ADG1608/ADG1609 5 V SINGLE SUPPLY VDD = 5 V 10%, VSS = 0 V, GND = 0 V, unless otherwise noted. Table 3. Parameter ANALOG SWITCH Analog Signal Range On Resistance (RON) On-Resistance Match Between Channels (RON) On-Resistance Flatness (RFLAT(ON)) LEAKAGE CURRENTS Source Off Leakage, IS (Off) Drain Off Leakage, ID (Off) ADG1608 ADG1609 Channel On Leakage, ID, IS (On) DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current, IINL or IINH Digital Input Capacitance, CIN DYNAMIC CHARACTERISTICS 1 Transition Time, tTRANSITION tON (EN) tOFF (EN) Break-Before-Make Time Delay, tD Charge Injection Off Isolation Channel-to-Channel Crosstalk Total Harmonic Distortion + Noise (THD + N) -3 dB Bandwidth ADG1608 ADG1609 CS (Off) CD (Off) ADG1608 ADG1609 CD, CS (On) ADG1608 ADG1609 POWER REQUIREMENTS IDD VDD 1 25C -40Cto +85C -40C to +125C 0 V to VDD Unit V typ max typ max typ max nA typ nA max nA typ nA max nA max nA typ nA max V min V max nA typ A max pF typ ns typ ns max ns typ ns max ns typ ns max ns typ ns min pC typ dB typ dB typ % typ MHz typ MHz typ pF typ pF typ pF typ Test Conditions/Comments 8.5 10 0.15 0.3 1.7 2.3 0.01 0.1 0.01 0.15 0.15 0.01 0.15 12.5 0.35 2.7 14 0.4 3 VS = 0 V to 4.5 V, IS = -10 mA; see Figure 25 VDD = 4.5 V, VSS = 0 V VS = 0 V to 4.5 V, IS = -10 mA VS = 0 V to 4.5 V, IS = -10 mA VDD = 5.5 V, VSS = 0 V VS = 1 V/4.5 V, VD = 4.5 V/1 V; see Figure 26 VS = 1 V/4.5 V, VD = 4.5 V/1 V; see Figure 26 0.5 2 1 2 3 14 7 14 2.0 0.8 VS = VD = 1 V or 4.5 V; see Figure 27 1 0.1 4 193 251 115 152 140 184 66 11 -64 -64 0.3 37 72 22 136 68 168 94 0.001 1.0 3.3/16 VIN = VGND or VDD 301 171 225 339 184 259 37 RL = 300 , CL = 35 pF VS = 2.5 V; see Figure 28 RL = 300 , CL = 35 pF VS = 2.5 V; see Figure 30 RL = 300 , CL = 35 pF VS = 2.5 V; see Figure 30 RL = 300 , CL = 35 pF VS1 = VS2 = 2.5 V; see Figure 29 VS = 2.5 V, RS = 0 , CL = 1 nF; see Figure 31 RL = 50 , CL = 5 pF, f = 100 kHz; see Figure 32 RL = 50 , CL = 5 pF, f = 100 kHz; see Figure 34 RL = 110 , f = 20 Hz to 20 kHz, VS = 3.5 V p-p; see Figure 35 RL = 50 , CL = 5 pF; see Figure 33 VS = 2.5 V, f = 1 MHz VS = 2.5 V, f = 1 MHz VS = 2.5 V, f = 1 MHz pF typ pF typ A typ A max V min/max VDD = 5.5 V Digital inputs = 0 V or VDD Guaranteed by design, but not subject to production test. Rev. 0 | Page 5 of 20 ADG1608/ADG1609 3.3 V SINGLE SUPPLY VDD = 3.3 V, VSS = 0 V, GND = 0 V, unless otherwise noted. Table 4. Parameter ANALOG SWITCH Analog Signal Range On Resistance (RON) On-Resistance Match Between Channels (RON) On-Resistance Flatness (RFLAT(ON)) LEAKAGE CURRENTS Source Off Leakage, IS (Off) Drain Off Leakage, ID (Off) ADG1608 ADG1609 Channel On Leakage, ID, IS (On) DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current, IINL or IINH Digital Input Capacitance, CIN DYNAMIC CHARACTERISTICS 1 Transition Time, tTRANSITION tON (EN) tOFF (EN) Break-Before-Make Time Delay, tD Charge Injection Off Isolation Channel-to-Channel Crosstalk Total Harmonic Distortion + Noise (THD + N) -3 dB Bandwidth ADG1608 ADG1609 CS (Off) CD (Off) ADG1608 ADG1609 CD, CS (On) ADG1608 ADG1609 POWER REQUIREMENTS IDD VDD 1 25C -40C to +85C -40C to +125C 0 V to VDD 16.5 0.3 6.5 Unit V typ typ typ nA typ nA max nA typ nA max nA max nA typ nA max V min V max nA typ A max pF typ ns typ ns max ns typ ns max ns typ ns max ns typ ns min pC typ dB typ dB typ % typ MHz typ MHz typ pF typ pF typ pF typ Test Conditions/Comments 13.5 0.25 5 0.01 0.1 0.01 0.15 0.15 0.01 0.15 15 0.28 5.5 VS = 0 V to VDD, IS = -10 mA; see Figure 25, VDD = 3.3 V, VSS = 0 V VS = 0 V to VDD, IS = -10 mA VS = 0 V to VDD, IS = -10 mA VDD = 3.6 V, VSS = 0 V VS = 0.6 V/3 V, VD = 3 V/0.6 V; see Figure 26 VS = 0.6 V/3 V, VD = 3 V/0.6 V; see Figure 26 0.5 2 1 2 3 14 7 14 2.0 0.8 VS = VD = 0.6 V or 3 V; see Figure 27 1 0.1 4 312 437 216 309 236 316 104 6 -64 -64 0.5 34 72 23 145 72 173 95 0.001 1.0 3.3/16 VIN = VGND or VDD 498 331 367 542 344 411 48 RL = 300 , CL = 35 pF VS = 1.5 V; see Figure 28 RL = 300 , CL = 35 pF VS = 1.5 V; see Figure 30 RL = 300 , CL = 35 pF VS = 1.5 V; see Figure 30 RL = 300 , CL = 35 pF VS1 = VS2 = 1.5 V; see Figure 29 VS = 1.5 V, RS = 0 , CL = 1 nF; see Figure 31 RL = 50 , CL = 5 pF, f = 100 kHz; see Figure 32 RL = 50 , CL = 5 pF, f = 100 kHz; see Figure 34 RL = 110 , f = 20 Hz to 20 kHz, VS = 2 V p-p; see Figure 35 RL = 50 , CL = 5 pF; see Figure 33 VS = 1.5 V, f = 1 MHz VS = 1.5 V, f = 1 MHz VS = 1.5 V, f = 1 MHz pF typ pF typ A typ A max V min/max VDD = 3.6 V Digital inputs = 0 V or VDD Guaranteed by design, but not subject to production test. Rev. 0 | Page 6 of 20 ADG1608/ADG1609 CONTINUOUS CURRENT PER CHANNEL, S OR D Table 5. ADG1608 Parameter CONTINUOUS CURRENT, S OR D VDD = +5 V, VSS = -5 V TSSOP (JA = 112.6C/W) LFCSP (JA = 48.7C/W) VDD = 12 V, VSS = 0 V TSSOP (JA = 112.6C/W) LFCSP (JA = 48.7C/W) VDD = 5 V, VSS = 0 V TSSOP (JA = 112.6C/W) LFCSP (JA = 48.7C/W) VDD = 3.3 V, VSS = 0 V TSSOP (JA = 112.6C/W) LFCSP (JA = 48.7C/W) 25C 85C 125C Unit 290 470 213 346 157 252 126 206 180 255 129 185 101 150 87 129 100 120 73 84 63 77 56 73.5 mA max mA max mA max mA max mA max mA max mA max mA max Table 6. ADG1609 Parameter CONTINUOUS CURRENT, S OR D VDD = +5 V, VSS = -5 V TSSOP (JA = 112.6C/W) LFCSP (JA = 48.7C/W) VDD = 12 V, VSS = 0 V TSSOP (JA = 112.6C/W) LFCSP (JA = 48.7C/W) VDD = 5 V, VSS = 0 V TSSOP (JA = 112.6C/W) LFCSP (JA = 48.7C/W) VDD = 3.3 V, VSS = 0 V TSSOP (JA = 112.6C/W) LFCSP (JA = 48.7C/W) 25C 85C 125C Unit 147 245 157 255 115 189 94 154 98 147 101 150 80 119 66 101 63 77 63 77 52 70 45 63 mA max mA max mA max mA max mA max mA max mA max mA max Rev. 0 | Page 7 of 20 ADG1608/ADG1609 ABSOLUTE MAXIMUM RATINGS TA = 25C, unless otherwise noted. Table 7. Parameter VDD to VSS VDD to GND VSS to GND Analog Inputs 1 Digital Inputs1 Peak Current, S or D Continuous Current, S or D 2 Operating Temperature Range Industrial (Y Version) Storage Temperature Range Junction Temperature 16-Lead TSSOP, JA Thermal Impedance, 0 Airflow (4-Layer Board) 16-Lead LFCSP, JA Thermal Impedance, 0 Airflow (4-Layer Board) Reflow Soldering Peak Temperature, Pb free 1 Rating 18 V -0.3 V to +18 V +0.3 V to -18 V VSS - 0.3 V to VDD + 0.3 V or 30 mA, whichever occurs first GND - 0.3 V to VDD + 0.3 V or 30 mA, whichever occurs first 710 mA (pulsed at 1 ms, 10% duty cycle maximum) Data + 15% -40C to +125C -65C to +150C 150C 112.6C/W Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ESD CAUTION 48.7C/W 260C 2 Overvoltages at IN, S, or D are clamped by internal diodes. Current should be limited to the maximum ratings given. See Table 5 and Table 6. Rev. 0 | Page 8 of 20 ADG1608/ADG1609 PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS 16 EN 15 A0 14 A1 13 A2 VSS 1 S1 2 A0 1 EN 2 VSS 3 S1 4 16 15 14 PIN 1 INDICATOR 12 GND 11 VDD 10 S5 9 S6 A1 A2 S2 3 S3 4 TOP VIEW (Not to Scale) ADG1608 ADG1608 TOP VIEW (Not to Scale) 13 12 11 10 9 VDD S5 S6 S7 S8 08318-003 S2 5 S3 6 S4 7 D8 Figure 3. ADG1608 Pin Configuration (TSSOP) Figure 4. ADG1608 Pin Configuration (LFCSP) Table 8. ADG1608 Pin Function Descriptions Pin No. TSSOP LFCSP 1 15 2 16 3 4 5 6 7 8 9 10 11 12 13 14 15 16 N/A 1 2 3 4 5 6 7 8 9 10 11 12 13 14 EP Mnemonic A0 EN VSS S1 S2 S3 S4 D S8 S7 S6 S5 VDD GND A2 A1 EP Description Logic Control Input. Active High Digital Input. When this pin is low, the device is disabled and all switches are off. When this pin is high, Ax logic inputs determine on switches. Most Negative Power Supply Potential. In single-supply applications, this pin can be connected to ground. Source Terminal 1. Can be an input or an output. Source Terminal 2. Can be an input or an output. Source Terminal 3. Can be an input or an output. Source Terminal 4. Can be an input or an output. Drain Terminal. Can be an input or an output. Source Terminal 8. Can be an input or an output. Source Terminal 7. Can be an input or an output. Source Terminal 6. Can be an input or an output. Source Terminal 5. Can be an input or an output. Most Positive Power Supply Potential. Ground (0 V) Reference. Logic Control Input. Logic Control Input. Exposed Pad. The exposed pad is connected internally. For increased reliability of the solder joints and maximum thermal capability, it is recommended that the pad be soldered to the substrate, VSS. Table 9. ADG1608 Truth Table A2 X1 0 0 0 0 1 1 1 1 1 A1 X1 0 0 1 1 0 0 1 1 A0 X1 0 1 0 1 0 1 0 1 EN 0 1 1 1 1 1 1 1 1 On Switch None 1 2 3 4 5 6 7 8 X = don't care. Rev. 0 | Page 9 of 20 08318-004 NOTES 1. THE EXPOSED PAD IS CONNECTED INTERNALLY. FOR INCREASED RELIABILITY OF THE SOLDER JOINTS AND MAXIMUM THERMAL CAPABILITY, IT IS RECOMMENDED THAT THE PAD BE SOLDERED TO THE SUBSTRATE, VSS. S7 8 S8 7 S4 5 D6 GND ADG1608/ADG1609 16 EN 15 A0 13 GND 14 A1 VSS 1 S1A 2 A0 1 EN 2 VSS 3 S1A 4 S2A 5 S3A 6 S4A 7 DA 8 16 15 14 PIN 1 INDICATOR 12 VDD 11 S1B 10 S2B 9 S3B A1 GND S2A 3 S3A 4 TOP VIEW (Not to Scale) ADG1609 ADG1609 TOP VIEW (Not to Scale) 13 12 11 10 9 S1B S2B S3B S4B DB 08318-005 Figure 5. ADG1609 Pin Configuration (TSSOP) Figure 6. ADG1609 Pin Configuration (LFCSP) Table 10. ADG1609 Pin Function Descriptions Pin No. TSSOP LFCSP 1 15 2 16 3 4 5 6 7 8 9 10 11 12 13 14 15 16 N/A 1 2 3 4 5 6 7 8 9 10 11 12 13 14 EP Mnemonic A0 EN VSS S1A S2A S3A S4A DA DB S4B S3B S2B S1B VDD GND A1 EP Description Logic Control Input. Active High Digital Input. When this pin is low, the device is disabled and all switches are off. When this pin is high, Ax logic inputs determine on switches. Most Negative Power Supply Potential. In single-supply applications, this pin can be connected to ground. Source Terminal 1A. Can be an input or an output. Source Terminal 2A. Can be an input or an output. Source Terminal 3A. Can be an input or an output. Source Terminal 4A. Can be an input or an output. Drain Terminal A. Can be an input or an output. Drain Terminal B. Can be an input or an output. Source Terminal 4B. Can be an input or an output. Source Terminal 3B. Can be an input or an output. Source Terminal 2B. Can be an input or an output. Source Terminal 1B. Can be an input or an output. Most Positive Power Supply Potential. Ground (0 V) Reference. Logic Control Input. Exposed Pad. The exposed pad is connected internally. For increased reliability of the solder joints and maximum thermal capability, it is recommended that the pad be soldered to the substrate, VSS. Table 11. ADG1609 Truth Table A1 X1 0 0 1 1 1 A0 X1 0 1 0 1 EN 0 1 1 1 1 On Switch Pair None 1 2 3 4 X = don't care. Rev. 0 | Page 10 of 20 08318-006 NOTES 1. THE EXPOSED PAD IS CONNECTED INTERNALLY. FOR INCREASED RELIABILITY OF THE SOLDER JOINTS AND MAXIMUM THERMAL CAPABILITY, IT IS RECOMMENDED THAT THE PAD BE SOLDERED TO THE SUBSTRATE, VSS. S4B 8 S4A 5 DA 6 SB 7 VDD ADG1608/ADG1609 TYPICAL PERFORMANCE CHARACTERISTICS 7 6 5 4 3 2 1 0 VDD = +3.3V VSS = -3.3V VDD = +5V VSS = -5V VDD = +8V VSS = -8V TA = 25C 7 6 5 VDD = 12V VSS = 0V ON RESISTANCE () ON RESISTANCE () TA = +125C 4 3 2 1 0 TA = +85C TA = +25C TA = -40C 08318-029 -8 -6 -4 -2 0 2 4 6 8 0 2 4 6 8 10 12 SOURCE OR DRAIN VOLTAGE (V) SOURCE OR DRAIN VOLTAGE (V) Figure 7. On Resistance vs. VD (VS) for Dual Supply Figure 10. On Resistance vs. VD (VS) for Different Temperatures, 12 V Single Supply 12 16 14 12 ON RESISTANCE () ON RESISTANCE () VDD = 3.3V VSS = 0V TA = 25C 10 TA = +125C TA = +85C TA = +25C 8 10 8 6 4 2 0 VDD = 12V VSS = 0V VDD = 16V VSS = 0V VDD = 5V VSS = 0V 6 TA = -40C 4 2 VDD = 5V VSS = 0V 0 2 4 6 8 10 12 14 16 08318-030 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 SOURCE OR DRAIN VOLTAGE (V) SOURCE OR DRAIN VOLTAGE (V) Figure 8. On Resistance vs. VD (VS) for Single Supply Figure 11. On Resistance vs. VD (VS) for Different Temperatures, 5 V Single Supply 18 VDD = 3.3V VSS = 0V 7 6 5 4 TA = +25C 3 2 1 0 -5 TA = -40C VDD = +5V VSS = -5V 16 14 ON RESISTANCE () ON RESISTANCE () TA = +125C TA = +85C 12 10 8 6 4 2 0 0.5 1.0 TA = +125C TA = +85C TA = +25C TA = -40C -4 -3 -2 -1 0 1 2 3 4 5 08318-031 1.5 2.0 2.5 3.0 SOURCE OR DRAIN VOLTAGE (V) SOURCE OR DRAIN VOLTAGE (V) Figure 9. On Resistance vs. VD (VS) for Different Temperatures, 5 V Dual Supply Figure 12. On Resistance vs. VD (VS) for Different Temperatures, 3.3 V Single Supply Rev. 0 | Page 11 of 20 08318-020 0 08318-033 0 08318-032 ADG1608/ADG1609 12 10 8 LEAKAGE CURRENT (nA) 9 VDD = +5V VSS = -5V VBIAS = +4.5V/-4.5V ID (OFF) - + ID, IS (ON) + + IS (OFF) + - LEAKAGE CURRENT (nA) 8 7 6 5 4 3 2 1 0 08318-035 VDD = 3.3V VSS = 0V VBIAS = 0.6V/3V 6 4 2 0 -2 -4 -6 -8 0 20 40 60 ID, IS (ON) + + ID (OFF) - + ID, IS (ON) - - IS (OFF) + - ID (OFF) + - IS (OFF) - + ID, IS (ON) - - IS (OFF) - + ID (OFF) + - 80 100 120 0 20 40 60 80 100 120 TEMPERATURE (C) TEMPERATURE (C) Figure 13. ADG1608 Leakage Currents vs. Temperature, 5 V Dual Supply Figure 16. ADG1608 Leakage Currents vs. Temperature, 3.3 V Single Supply 15 VDD = 12V VSS = 0V VBIAS = 1V/10V ID, IS (ON) + + ID (OFF) - + IS (OFF) + - 600 IDD PER CHANNEL TA = 25C IDD = +12V ISS = 0V 10 500 LEAKAGE CURRENT (nA) 400 IDD (A) 5 300 IDD = +5V ISS = -5V IDD = +5V ISS = 0V 100 IDD = +3.3V ISS = 0V 0 200 -5 ID, IS (ON) - - IS (OFF) - + ID (OFF) + - 0 20 40 60 80 100 120 08318-034 0 2 4 6 8 10 12 14 TEMPERATURE (C) LOGIC (V) Figure 14. ADG1608 Leakage Currents vs. Temperature, 12 V Single Supply 10 9 8 Figure 17. IDD vs. Logic Level VDD = 5V VSS = 0V VBIAS = 1V/4.5V 30 25 LEAKAGE CURRENT (nA) CHARGE INJECTION (pC) 7 6 5 4 3 2 1 0 0 20 40 60 80 100 120 08318-036 VDD = +12V VSS = 0V VDD = +5V VSS = -5V 20 ID, IS (ON) + + ID (OFF) - + ID, IS (ON) - - IS (OFF) + - IS (OFF) - + ID (OFF) + - 15 10 VDD = +5V VSS = 0V 5 VDD = +3.3V VSS = 0V 0 -6 -4 -2 0 2 4 VS (V) 6 8 10 12 14 08318-026 -1 TEMPERATURE (C) Figure 15.ADG1608 Leakage Currents vs. Temperature, 5 V Single Supply Figure 18. Charge Injection vs. Source Voltage Rev. 0 | Page 12 of 20 08318-019 -10 0 08318-018 -1 ADG1608/ADG1609 450 400 -1 350 TA = 25C 0 TRANSITION TIME (ns) 300 250 200 150 100 50 VDD = +3.3V, VSS = 0V INSERTION LOSS (dB) -2 -3 VDD = +5V, VSS = 0V -4 VDD = +5V, VSS = -5V VDD = +12V, VSS = 0V 08318-024 -5 -20 0 20 40 60 80 100 120 100k 1M 10M 100M TEMPERATURE (C) FREQUENCY (Hz) Figure 19. Transition Time vs. Temperature Figure 22. On Response vs. Frequency 0 -10 -20 TA = 25C VDD = +5V VSS = -5V 0 TA = 25C VDD = +5V VSS = -5V -20 OFF ISOLATION (dB) -30 -40 -50 -60 -70 -80 -90 100k 1M 10M 100M 1G 08318-023 NO DECOUPLING CAPACITORS ACPSRR (dB) -40 -60 DECOUPLING CAPACITORS -80 -100 1k 10k FREQUENCY (Hz) 100k 1M FREQUENCY (Hz) 10M 100M Figure 20. Off Isolation vs. Frequency Figure 23. ACPSRR vs. Frequency 0 -10 -20 -30 CROSSTALK (dB) TA = 25C VDD = +5V VSS = -5V 0.6 LOAD = 110 TA = 25C 0.5 VDD = +3.3V, VS = 2V p-p 0.4 THD + N (%) -40 -50 -60 -70 -80 0.3 VDD = +5V, VS = 3.5V p-p 0.2 0.1 VDD = +5V, VSS = -5V, VS = 5V p-p VDD = +12V, VS = 5V p-p -90 100k 1M 10M 100M 1G 08318-022 0 5k FREQUENCY (Hz) 10k FREQUENCY (Hz) 15k 20k Figure 21. Crosstalk vs. Frequency Figure 24. THD + N vs. Frequency Rev. 0 | Page 13 of 20 08318-028 -100 10k 0 08318-027 -100 10k -120 08318-021 0 -40 -6 10k TA = 25C VDD = +5V VSS = -5V ADG1608/ADG1609 TEST CIRCUITS V IS (OFF) A ID (OFF) A 08318-008 S D IDS 08318-007 S D VS VS VD Figure 25. On Resistance Figure 26. Off Leakage ID (ON) NC S D A 08318-009 NC = NO CONNECT VD Figure 27. On Leakage VDD 3V ADDRESS DRIVE (VIN) 0V 50% 50% VSS VSS S1 S2 TO S7 S8 VS8 OUTPUT D GND 100 35pF 08318-010 tr < 20ns tf < 20ns A0 VIN 50 A1 A2 VDD VS1 tTRANSITION tTRANSITION 90% ADG1608* 2.4V EN OUTPUT 90% *SIMILAR CONNECTION FOR ADG1609. Figure 28. Address to Output Switching Times, tTRANSITION VDD 3V ADDRESS DRIVE (VIN) 0V VIN 50 A0 A1 A2 VSS VDD VSS S1 S2 TO S7 S8 VS 80% OUTPUT 80% 2.4V EN ADG1608* D GND OUTPUT 100 35pF 08318-011 tBBM *SIMILAR CONNECTION FOR ADG1609. Figure 29. Break-Before-Make Delay, tBBM Rev. 0 | Page 14 of 20 ADG1608/ADG1609 VDD 3V ENABLE DRIVE (VIN) 0V 50% 50% A0 A1 A2 S1 S2 TO S8 VS VDD VSS VSS tON (EN) 0.9VO OUTPUT tOFF (EN) 0.9VO VIN 50 EN ADG1608* D GND OUTPUT 100 35pF *SIMILAR CONNECTION FOR ADG1609. Figure 30. Enable Delay, tON (EN), tOFF (EN) VDD VSS VDD 3V A0 A1 VIN A2 VSS ADG1608* VOUT QINJ = CL x VOUT VOUT VS VIN 08318-013 RS S EN GND D CL 1nF VOUT *SIMILAR CONNECTION FOR ADG1609. Figure 31. Charge Injection Rev. 0 | Page 15 of 20 08318-012 ADG1608/ADG1609 VDD 0.1F VSS 0.1F NETWORK ANALYZER VDD 0.1F NETWORK ANALYZER VOUT RL 50 VSS 0.1F VDD S VSS VDD S1 VSS 50 D 50 VS VOUT D S2 VS GND R 50 GND RL 50 OFF ISOLATION = 20 log VOUT VS 08318-014 CHANNEL-TO-CHANNEL CROSSTALK = 20 log VOUT VS Figure 32. Off Isolation VDD 0.1F VSS 0.1F NETWORK ANALYZER VDD 0.1F Figure 34. Channel-to-Channel Crosstalk VSS 0.1F AUDIO PRECISION RS VDD S VSS VDD S VSS 50 VS D RL 50 VOUT IN D VIN GND 08318-016 VS V p-p RL 10k VOUT 08318-017 GND INSERTION LOSS = 20 log VOUT WITH SWITCH VOUT WITHOUT SWITCH Figure 33. Bandwidth Figure 35. THD + Noise Rev. 0 | Page 16 of 20 08318-015 ADG1608/ADG1609 TERMINOLOGY IDD The positive supply current. ISS The negative supply current. VD (VS) The analog voltage on Terminal D and Terminal S. RON The ohmic resistance between Terminal D and Terminal S. RFLAT(ON) Flatness that is defined as the difference between the maximum and minimum value of on resistance measured over the specified analog signal range. IS (Off) The source leakage current with the switch off. ID (Off) The drain leakage current with the switch off. ID, IS (On) The channel leakage current with the switch on. VINL The maximum input voltage for Logic 0. VINH The minimum input voltage for Logic 1. IINL (IINH) The input current of the digital input. CS (Off) The off switch source capacitance, which is measured with reference to ground. CD (Off) The off switch drain capacitance, which is measured with reference to ground. CD, CS (On) The on switch capacitance, which is measured with reference to ground. CIN The digital input capacitance. tTRANSITION The delay time between the 50% and 90% points of the digital input and switch on condition when switching from one address state to another. tON (EN) The delay between applying the digital control input and the output switching on. tOFF (EN) The delay between applying the digital control input and the output switching off . Charge Injection A measure of the glitch impulse transferred from the digital input to the analog output during switching. Off Isolation A measure of unwanted signal coupling through an off switch. Crosstalk A measure of unwanted signal that is coupled through from one channel to another as a result of parasitic capacitance. Bandwidth The frequency at which the output is attenuated by 3 dB. On Response The frequency response of the on switch. Insertion Loss The loss due to the on resistance of the switch. Total Harmonic Distortion + Noise (THD + N) The ratio of the harmonic amplitude plus noise of the signal to the fundamental. AC Power Supply Rejection Ratio (ACPSRR) The ratio of the amplitude of signal on the output to the amplitude of the modulation. This is a measure of the ability of the part to avoid coupling noise and spurious signals that appear on the supply voltage pin to the output of the switch. The dc voltage on the device is modulated by a sine wave of 0.62 V p-p. Rev. 0 | Page 17 of 20 ADG1608/ADG1609 OUTLINE DIMENSIONS 5.10 5.00 4.90 16 9 4.50 4.40 4.30 1 8 6.40 BSC PIN 1 0.15 0.05 0.65 BSC 0.30 0.19 COPLANARITY 0.10 1.20 MAX 0.20 0.09 SEATING PLANE 8 0 0.75 0.60 0.45 COMPLIANT TO JEDEC STANDARDS MO-153-AB Figure 36. 16-Lead Thin Shrink Small Outline Package [TSSOP] (RU-16) Dimensions shown in millimeters PIN 1 INDICATOR 3.10 3.00 SQ 2.90 0.50 BSC 0.30 0.23 0.18 13 12 EXPOSED PAD 16 1 PIN 1 INDICATOR 1.75 1.60 SQ 1.55 4 9 TOP VIEW 0.80 0.75 0.70 SEATING PLANE 0.50 0.40 0.30 8 5 BOTTOM VIEW 0.20 MIN 0.05 MAX 0.02 NOM COPLANARITY 0.08 0.20 REF FOR PROPER CONNECTION OF THE EXPOSED PAD, REFER TO THE PIN CONFIGURATION AND FUNCTION DESCRIPTIONS SECTION OF THIS DATA SHEET. COMPLIANT TO JEDEC STANDARDS MO-220-WEED. Figure 37. 16-Lead Lead Frame Chip Scale Package [LFCSP_WQ] 3 mm x 3 mm Body, Very Very Thin Quad (CP-16-22) Dimensions shown in millimeters ORDERING GUIDE Model ADG1608BRUZ 1 ADG1608BRUZ-REEL71 ADG1608BCPZ-REEL71 ADG1609BRUZ1 ADG1609BRUZ-REEL71 ADG1609BCPZ-REEL71 1 Temperature Range -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C Package Description 16-Lead Thin Shrink Small Outline Package [TSSOP] 16-Lead Thin Shrink Small Outline Package [TSSOP] 16-Lead Lead Frame Chip Scale Package [LFCSP_WQ] 16-Lead Thin Shrink Small Outline Package [TSSOP] 16-Lead Thin Shrink Small Outline Package [TSSOP] 16-Lead Lead Frame Chip Scale Package [LFCSP_WQ] Package Option RU-16 RU-16 CP-16-22 RU-16 RU-16 CP-16-22 070209-C Branding S38 S39 Z = RoHS Compliant Part. Rev. 0 | Page 18 of 20 ADG1608/ADG1609 NOTES Rev. 0 | Page 19 of 20 ADG1608/ADG1609 NOTES (c)2009 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D08318-0-7/09(0) Rev. 0 | Page 20 of 20 |
Price & Availability of ADG1609BCPZ-REEL7
![]() |
|
|
All Rights Reserved © IC-ON-LINE 2003 - 2022 |
[Add Bookmark] [Contact Us] [Link exchange] [Privacy policy] |
Mirror Sites : [www.datasheet.hk]
[www.maxim4u.com] [www.ic-on-line.cn]
[www.ic-on-line.com] [www.ic-on-line.net]
[www.alldatasheet.com.cn]
[www.gdcy.com]
[www.gdcy.net] |