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| Ordering number : EN7738 LA6569 Overview Monolithic Linear IC 5-channel Driver for Compact Disk Applications The LA6569 is a 5-channel driver for optical disc drives that includes a regulator on/off circuit. Features * Power amplifier 5-channel built-in. (Bridge-connection (BTL) : 4-channel, H bridge : 1-channel) * IO max 1A. * Level shift circuit built-in (except H bridge). * Mute circuit (output ON/OFF) built-in. (Operable with BTL AMP with MUTE1 : CH1 and MUTE2 : CH2 to 4 and not operable for the H bridge of 3.3VREG.) * 3.3V regulator built-in (external PNP transistor). * With a function to set the loading output voltage. * Overheat protection circuit (thermal shutdown) built-in. * Regulator ON/OFF circuit built-in. Specifications Absolute Maximum Ratings at Ta = 25C Parameter Maximum supply voltage Maximum output current Maximum input voltage Mute pin voltage Allowable operation Symbol VCC max IO max VINB max VMUTE Pd max Independent IC *Mounted on a standard board Operating temperature Storage temperature Topr Tstg Each output for H bridge, channel 1 to 4 Conditions Ratings 14 1 13 13 0.8 2.0 -30 to +85 -55 to +150 Unit V A V V W W C C *1 A circuit board for mounting (76.1mmx114.3mmx1.6mm, glass epoxy resin) Recommended Operating Conditions at Ta = 25C Parameter supply voltage Symbol VCC Conditions Same for VCC-VREG Ratings 4.5 to 13 Unit V Any and all SANYO Semiconductor products described or contained herein do not have specifications that can handle applications that require extremely high levels of reliability, such as life-support systems, aircraft's control systems, or other applications whose failure can be reasonably expected to result in serious physical and/or material damage. Consult with your SANYO Semiconductor representative nearest you before using any SANYO Semiconductor products described or contained herein in such applications. SANYO Semiconductor assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all SANYO Semiconductor products described or contained herein. 92706 / D2605 MS IM B8-5469 No.7738-1/7 LA6569 Electrical Characteristics at Ta = 25C, VCC1 = VCC2 = 8V, VREF = 1.65V, unless especially specified. Parameter All blocks No-load current drain ON No-load current drain OFF VREF input voltage range Thermal shutdown temperature BTL AMP block (CH1 to CH4) Output offset voltage Input voltage range Output voltage Closed-circuit voltage gain Slew rate MUTE ON voltage MUTE OFF voltage Input AMP block (CH1 to CH4) Input voltage range Output current (SINK) Output current (SOURCE) Output offset voltage Loading block (CH5, H bridge) Output voltage Break output saturation voltage Input low level Input high level Output set voltage VO-LOAD VCE-BREAK VIN-L VIN-H VCONT IO = 200mA (Between outputs), VCONT = 3V IO = 200mA Base current to external PNP *8 6VVCC12V 5mAIO200mA Regulator ON *9 Regulator OFF *9 2 0.5 2 2.9 3.15 3.4 Forward, reverse, RL = 8 *4 Output voltage at braking *7 5.7 6.5 0.3 1 V V V V V VIN-OP SINK-OP SOURCE-OP VOFF-OP *6 0 2 300 -10 500 10 VCC-1.5 V mA A mV VOFF VIN VO VG SR VMUTE-ON VMUTE-OFF Voltage difference between outputs for BTL AMP, each channel. *3 Input voltage range for input for OP-AMP. Each voltage between VO+ and VO- when RL = 8. *4 Input and output gain. *3 AMP Independent. Multiply 2 between outputs. *2 Each MUTE *5 Each MUTE *5 2 0.5 -60 0 5.7 5.4 6.5 6 0.5 6.6 60 VCC-1.5 mV V V deg V/s V V ICC-ON ICC-OFF VREF-IN TSD *2 FWD = REV = 0, All outputs ON *1 FWD = REV = 0, All outputs OFF *1 1 150 175 30 10 50 20 VCC-1.5 200 mA mA V C Symbol Conditions Ratings min typ max Unit Power supply block (PNP transistor : 2SB632K-use) 3.3V supply output REG-IN SINK current Line regulation Load regulation Regulator ON Regulator OFF VOUT REG-IN-SINK VOLN VOLD REG-EN-ON REG-EN-OFF 3.15 3.3 10 20 50 150 200 3.45 V mA mV mV V V *1. Current dissipation that is a sum of VCC1 and VCC2 at no load. *2. Design guarantee value. *3. Input AMP is a BUFFER AMP. *4. Voltage difference between both ends of load (8). Output saturated. *5. Output ON with MUTE : [H] and OFF with MUTE : [L] (HI impedance). *6. The source of input OP-AMP is a constant current. As the 11k resistance to the next stage is a load, pay due attention when setting the input OP-AMP gain. *7. Short (GND) brake used. SINK side output ON. *8. 3.3VREG incorporates a drooping protection circuit and operated when the base current is 10mA (TYP). *9. The output is 3.3V when the REG-EN pin is HIGH. No.7738-2/7 LA6569 Package Dimensions unit : mm 3251 17.8 (6.2) 36 19 (4.9) 7.9 10.5 (0.5) 1 0.8 2.0 0.3 18 0.25 (2.25) 2.7 SANYO : HSOP36R(375mil) 3.0 Pd max - Ta Designated board : 76.1mmx114.3mmx1.6mm Material : glass epoxy Allowable Power Dissipation, Pd max - W 2.5 Mounted on a board 2.0 1.5 1.04 1.0 0.8 0.5 Independent IC 0.1 2.45max 0 --40 --30 --20 0 20 40 60 80 85 0.65 0.42 100 Ambient Temperature, Ta- C ILA00922 No.7738-3/7 LA6569 Block Diagram Thermal shutdown FWD 1 Signal system GND 36 CH2 to CH4 Output ON/OFF CH1 Output ON/OFF S-GND REV 2 VCC2 3 Power supply (LOADING) (Signal system) MUTE2 35 MUTE2 Input (Forward/Reversed/ Break/OFF) MUTE1 34 MUTE1 VLO- 4 Output control 33 VIN4 VLO+ 5 22k 11k + + 32 VIN4- Level shift VO4+ 6 31 + VIN4+ VO4- 7 30 VREF-IN VO3- 9 Level shift VO3+ 8 29 VCONT (LOADING) 28 REG-EN Power system GND FR FR + Power system GND FR FR PNP Tr Colector Level shift VO2+ 10 3.3VREG (External PNP) PNP Tr Base 26 REG-IN 27 REG-OUT VO2- 11 Level shift VO1+ 12 22k 11k + + - 25 VIN3+ VO1- 13 24 VIN3- VCC1 14 Power supply (CH1 to CH4) 15 3.3VREG GND 23 VIN3 VIN1 22 GND-VREG VIN1- 16 + 22k 11k + 3.3VREG Power supply 21 VCC-VREG VIN1+ 17 22k 11k + + - 20 VIN2+ VIN2 18 19 VIN2- No.7738-4/7 LA6569 Pin Description Pin name Input (CH1 to 4) Pin name VIN1+ VIN1VIN1 VIN2+ VIN2VIN2 VIN3+ VIN3VIN3 VIN4+ VIN4VIN4 Input (LOADING) FWD REV Pin no. 17 16 15 20 19 18 25 24 23 31 32 33 1 2 S-GND VIN*+ VCC Equivalent circuit VIN*VIN* Pin explanation Input pin (CH1 to 4). Logic input pin. By combining H and L of this pin, any one of four modes (forward/reversed/brake/idling) can be selected. FWD Output (CH1 to 4) VO1+ VO1VO2+ VO2VO3+ VO3VO4+ VO4- 12 13 10 11 8 9 6 7 34 35 VCC1 VCC* Output for channel 1 to 4. VO* RF MUTE MUTE1 MUTE2 BTL AMP output. Output ON/OFF for CH1 to CH4. MUTE: H output ON MUTE: L output OFF 100k 100k MUTE S-GND Output (LOADING) VLO+ VLO- 5 4 Output voltage set pin for loading block. VO5+ VO5- VCONT No.7738-5/7 LA6569 Sample Application Circuit MUTE1 MUTE2 LOADING 2 SLED LOADING MOTOR M 5 TRACKING COIL VLO+ VO4+ VO4VO3+ VO3VIN4VIN4+ VREF-IN 32 REV MUTE2 35 1 FWD S-GND 36 3 VCC2 VLO- MUTE1 34 4 VIN4 33 6 31 7 FOCUS COIL 30 8 VCONT 29 9 REG-EN 28 FR FR FR FR SPINDLE MOTOR M 10 VO2+ VO2VO1+ VO1VCC1 VIN1 VIN1VIN1+ VIN2 REG-OUT 3.3VREG 27 11 SLED MOTOR M 13 VCC 14 REG-IN 26 VCC 12 VIN3+ VIN3VIN3 GND-VREG 25 24 23 15 22 16 VCC-VREG VIN2+ VIN2- 21 17 20 18 19 TRACKING FOCUS VCONT SPINDLE VREF Note : Add CR between outputs or to a circuit to GND when oscillation occurs in the output. Apply 4.5V or more to the external PNPTr emitter pin. No.7738-6/7 LA6569 Truth Table (loading (H bridge) section) FWD L REV L H L H Loading output OFF *1 Forward Reversed (Short) brake *2 H *1 The output has a high impedance. *2 At brake, the SINK side transistor is ON (short brake). VLO+ and VLO- are approximately on the GND level. Relation of MUTE and Power (VCC*) MUTE1 CH1 (BTL) CH2 (BTL) MUTE2 CH3 (BTL) CH4 (BTL) CH5 (H bridge) VCC2 VCC1 Specifications of any and all SANYO Semiconductor products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer's products or equipment. To verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer's products or equipment. SANYO Semiconductor Co., Ltd. strives to supply high-quality high-reliability products. However, any and all semiconductor products fail with some probability. It is possible that these probabilistic failures could give rise to accidents or events that could endanger human lives, that could give rise to smoke or fire, or that could cause damage to other property. When designing equipment, adopt safety measures so that these kinds of accidents or events cannot occur. Such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design. In the event that any or all SANYO Semiconductor products (including technical data,services) described or contained herein are controlled under any of applicable local export control laws and regulations, such products must not be exported without obtaining the export license from the authorities concerned in accordance with the above law. No part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any information storage or retrieval system, or otherwise, without the prior written permission of SANYO Semiconductor Co., Ltd. Any and all information described or contained herein are subject to change without notice due to product/technology improvement, etc. When designing equipment, refer to the "Delivery Specification" for the SANYO Semiconductor product that you intend to use. Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production. SANYO Semiconductor believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual property rights or other rights of third parties. This catalog provides information as of December, 2005. Specifications and information herein are subject to change without notice. PS No.7738-7/7 |
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