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LTC4067 USB Power Manager with OVP and Li-Ion/Polymer Charger FEATURES
Programmable Input Current Limit: Single Resistor at CLPROG Pin to Set and Monitor Input Current Battery Charger/Ideal Diode/Controller: 13V Overvoltage Protection Full Featured Battery Charger with 4.2V Float Up to 1.25A Programmable Charge Current Thermal Regulation Maximizes Charge Current Without Risk of Overheating Internal 2 Hour Termination Timer from Onset of Voltage Mode Charging Automatic Load Switchover to Battery Power with Internal Ideal Diode and Drive Output for Optional External MOSFET NTC Thermistor Input Bad Battery Time-Out Detection 4mm x 3mm 12-Lead DFN Package
DESCRIPTIO
The LTC(R)4067 is a USB power management and Li-Ion/ Polymer battery charger designed for portable battery powered applications. The part controls total current used by the USB peripheral for operation and battery charging. The total input current may be left unregulated, or it may be limited to 20% or 100% of the programmed value up to 1.5A (typically 500mA). Battery charge current is automatically reduced such that the sum of the load current and the charge current does not exceed the programmed input current. With the addition of an external P-channel MOSFET the LTC4067 can withstand voltages up to 13V. The LTC4067 includes a complete constant current/constant voltage linear charger for single cell Li-Ion batteries. The float voltage applied to the battery is held to a tight 0.4% tolerance, and charge current is programmed using an external resistor to ground. An end-of-charge status output, CHRG, indicates full charge. Also featured is an NTC thermistor input used to monitor battery temperature while charging. The LTC4067 is available in a 12-lead low profile 4mm x 3mm DFN package.
APPLICATIO S

Automatic Battery Charging/Load Switchover Backup Battery Charger Uninterrupted Supplies
, LTC and LT are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners.
TYPICAL APPLICATIO
OVI WALL OR USB 10nF OVP IN 1F 10F
ILOAD OUT 10F
VOVI 5V/DIV 5V TO 12V IIN 500mA/DIV VOUT 5V/DIV
BAT LTC4067 1-CELL Li-Ion
ILIM0 ILIM1 CLPROG 2k
4067 TA01
CHRG PROG GND 2k
ILIM0 L L H H
ILIM1 H L H L
IIN(MAX) O (SUSPEND) 200V/RCLPROG 1000V/RCLPROG FIXED (2A)
VOVP 5V/DIV 1ms/DIV
4067 TA01b
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OVP Response to Ramp Input at OVI
VBAT = 4.2V
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LTC4067 ABSOLUTE
(Note 1)
AXI U RATI GS
IN, OUT, BAT Voltage (t < 1ms, Duty Cycle < 1%)...................... -0.3V to 7V Steady State, IN, OUT, BAT Voltage .............. -0.3V to 6V NTC, ILIM0, ILIM1, PROG, CLPROG, CHRG, GATE Voltages (Note 6) ....................................-0.3V to VCC OVI, OVP Voltages ..................................... -0.3V to 13V Operating Temperature Range ................. -40C to 85C Storage Temperature Range................... -65C to 125C Max Junction Temperature (TJMAX) ..................... 125C
The denotes the specifications which apply over the full operating temperature range (Note 3), otherwise specifications are at TA = 25C. Note 2 unless otherwise noted, VIN = 5V, VBAT = 3.7V, VILIM0 = 0V, VILIM1 = 0V, RPROG = 2k, RCLPROG = 2k, VOVI = 0V, VNTC = VIN/2.
SYMBOL VIN IIN PARAMETER IN Supply Voltage Input Supply Current VNTC = 5V (Forces IBAT = IPROG = 0) SUSPEND: VILIM0 = 0V, VILIM1 = 5V, No Load SHUTDOWN: VPROG = 5V VBAT = 4.3V, Charging Stopped SUSPEND: VILIM0 = 0V VILIM1 = 5V, No Load, VIN = 5.5V SHUTDOWN: VPROG = 5V IDEAL DIODE: VIN = Float, BAT Powers OUT, No Load VOUT = 4V, ILIM0 = 5V ILIM1 = 0V (Note 7) CONDITIONS

ELECTRICAL CHARACTERISTICS
IBAT
Battery Supply Current
IIN(MAX)
Maximum Input Current Limit
2
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PACKAGE/ORDER INFORMATION
TOP VIEW CLPROG CHRG NTC ILIM0 ILIM1 OVI 1 2 3 13 4 5 6 9 8 7 GATE PROG OVP 12 IN 11 OUT 10 BAT
DE PACKAGE 12-LEAD (4mm x 3mm) PLASTIC DFN TJMAX = 125C, JA = 43C/W EXPOSED PAD (PIN 13) IS GND, MUST BE SOLDERED TO PCB
ORDER PART NUMBER LTC4067EDE
DE PART MARKING 4067
Order Options Tape and Reel: Add #TR Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF Lead Free Part Marking: http://www.linear.com/leadfree/ Consult LTC Marketing for parts specified with wider operating temperature ranges.
MIN
TYP 0.4 52 12 14 6 2.5 60
MAX 5.5 1.2 90 30 30 12 5 100
UNITS V mA A A A A A A A
1.5
2
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LTC4067
The denotes the specifications which apply over the full operating temperature range (Note 3), otherwise specifications are at TA = 25C. Note 2 unless otherwise noted, VIN = 5V, VBAT = 3.7V, VILIM0 = 0V, VILIM1 = 0V, RPROG = 2k, RCLPROG = 2k, VOVI = 0V, VNTC = VIN/2.
SYMBOL VIUVLO VBUVLO Current Limit RFWD,IN ILIM VCLPROG ISS VFLOAT ICC-CHG ICHG(MAX) VPROG On-Resistance of Input Power FET Input Current Limit CLPROG Pin Servo Voltage Soft Start Inrush Current Regulated Output Voltage Constant-Current Mode Charge Current Maximum Charge Current PROG Pin Servo Voltage IOUT = 200mA HPWR Mode: VILIM0 = VILIM1 = 5V LPWR Mode HPWR Mode: VILIM0 = VILIM1 = VCC, VOUT = 4V LPWR Mode : VOUT = 4V RCLPROG = 4k, Short at OUT (Note 8) IBAT = -2mA (0C - 85C); IBAT = -2mA RPROG = 2k, No Load at OUT RPROG = 1k, No Load at OUT, RCLPROG = 1k RPROG = RCLPROG = 0 (Note 7) RPROG = 2k; IBAT = -500mA RPROG = 1k; IBAT = -1A RPROG = 2k, VBAT < VTRIKL, IBAT = ITRIKL VBAT = 4.2V; As A Ratio to Full BAT Charge Current (ICC-CHG) VBAT = 2V

ELECTRICAL CHARACTERISTICS
PARAMETER IN Undervoltage Lockout BAT Undervoltage Lockout
CONDITIONS Rising Threshold Falling Threshold Rising Threshold Falling Threshold
MIN 3.5 2.5
TYP 3.8 3.675 2.8 2.7 220
MAX 4 3
UNITS V V V
m 525 110 1.05 0.22 mA mA V V mA/s 4.215 4.234 530 1060 1020 1020 110 0.106 60 135 2.3 V V mA mA A mV mV mV mA/mA mA mV hrs % C
475 90 0.95 0.18
500 98 1 0.2 0.3
Battery Charger 4.185 4.167 470 940 980 980 90 0.08 35 65 1.7 Percent of Total Charge Time, VBAT < 2.8V (Note 4) 4.2 4.2 500 1000 2 1000 1000 100 0.093 50 100 2 25 105
IEOC ITRIKL VRECHRG tTIMER TLIM Ideal Diode RFWD RDIO,ON VFWD
End-of-Charge BAT Current Trickle Charge Current TIMER Period Low Battery Trickle Charge Time Junction Temperature in Constant Temperature Mode On-Resistance, VON Regulation On-Resistance VBAT to VOUT
Recharge Battery Threshold Voltage VFLOAT - VRECHRG
VILIM0 = 0V, VILIM1 = 5V, VBAT = 4.3V, IOUT = -200mA, Measured as V/I VILIM0 = 0V, VILIM1 = 5V, VBAT = 4.3V, IOUT = -1A
200 220 10 25 70 240 2.1 1.9 1.9 40
m m mV mV mV A mA mA
Voltage Forward Drop (VBAT - VOUT) VILIM0 = 0V, VILIM1 = 5V, VBAT = 4.3V, IOUT = -1mA VILIM0 = 0V, VILIM1 = 5V, VBAT = 4.3V, IOUT = -200mA VILIM0 = 0V, VILIM1 = 5V, VBAT = 4.3V, IOUT = -1A Ideal Diode Current Limit GATE Pin Output Pull Up Current VILIM0 = 0V, VILIM1 = 5V, VBAT = 4.3V (Notes 4, 5) VOUT > VBAT, VGATE = 0V
ID(MAX) IGPU IGPD
1.5
GATE Pin Output Pull Down Current VILIM0 = 0V, VILIM1 = 5V, VBAT = 4.3V, IOUT = 1A, VGATE = 4.3V
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LTC4067 ELECTRICAL CHARACTERISTICS
SYMBOL NTC INTC VCOLD VHOT VDIS Logic FMOD FPW FTF VOL VIH VlL IPULLDN VOVTH VPROG,SD Serrated Fault Pulse Modulation Frequency at CHRG Pin Serrated Fault Pulse Width at CHRG Pin Serrated Fault Pulse Frequency at CHRG Pin Output Low Voltage (CHRG) Enable Input High Voltage Enable Input Low Voltage Logic Input Pull Down Current Overvoltage Protection Threshold (OVI Pin) Shutdown Threshold (VDIS < VNTC < VHOT) or (VNTC > VCOLD) VBAT < 2.9V for Longer Than Trickle Charge Time (VDIS < VNTC < VHOT) or (VNTC > VCOLD) VBAT < 2.9V for Longer Than Trickle Charge Time (VDIS < VNTC < VHOT) or (VNTC > VCOLD) or VBAT < 2.9V for Longer Than Trickle Charge Time ISINK = 5mA ILIM0, ILIM1 Pin Low to High ILIM0, ILIM1 Pin High to Low ILIM0, ILIM1 VOVI Rising Threshold Hysteresis VCC - VPROG Rising (Note 6) Hysteresis 5.8

The denotes the specifications which apply over the full operating temperature range (Note 3), otherwise specifications are at TA = 25C. Note 2 unless otherwise noted, VIN = 5V, VBAT = 3.7V, VILIM0 = 0V, VILIM1 = 0V, RPROG = 2k, RCLPROG = 2k, VOVI = 0V, VNTC = VIN/2.
PARAMETER NTC Input Leakage Current Cold Temperature Fault Threshold Voltage Hot Temperature Fault Threshold Voltage NTC Disable Voltage CONDITIONS VNTC = 2.5V Rising Threshold Hysteresis Falling Threshold Hysteresis NTC Input voltage to GND (Falling) Hysteresis
MIN
TYP 0
MAX 1
UNITS A V V V V mV mV Hz Hz s s kHz
0.725 * VIN 0.733 * VIN 0.741 * VIN 0.02 * VIN 0.287 * VIN 0.29 * VIN 0.293 * VIN 0.02 * VIN 80 100 30 1.5 6 1.33 2.62 35 1.5 1.2 0.4 2 6 250 1.4 50 3.5 6.2 120
V V V A V mV V mV A
IPROG,PULLUP PROG Pin Shutdown Sense Current VPROG = 1V Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: Current into a pin is positive and current out of a pin is negative. All Voltages referenced to GND Note 3: The LTC4067 is guaranteed to meet performance specifications from 0C to 85C. Specifications over the -40C to 85C ambient operating temperature range are assured by design, characterization and correlation with statistical process controls. Note 4: Specification is guaranteed by design and not 100% tested in production.
Note 5: This IC includes over-temperature protection that is intended to protect the device during momentary overload conditions. Junction temperature exceeds 125C when over-temperature protection is active. Continuous operation above the specified maximum operating junction temperature may result in device degradation or failure. Note 6: VCC is the greater of VIN, VOUT or VBAT. Note 7: Accuracy of programmed current may degrade for currents greater than 1A. Note 8: CLPROG soft-start scales with inverse of CLPROG resistor. If RCLPROG = 2k, then ISS = 0.6mA/s.
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LTC4067 TYPICAL PERFOR A CE CHARACTERISTICS
Input Supply Current vs Temperature (Shutdown Mode)
16 14 12 IQ(SUSP) (A) IQ(SD) (A) 10 8 6 4 2 0 -50 -30 -10 10 30 50 70 90 110 130 150 TEMPERATURE (C)
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50 40 30 20 10 0 -50 -30 -10 10 30 50 70 90 110 130 150 TEMPERATURE (C)
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IQ (A)
Battery Current vs Temperature
90 IN = OUT = FLOAT 80 VBAT = 3.7V 70 IQ(BATSD) (A) IQ(BAT) (A) 60 50 40 30 20 2 10 0 -50 -30 -10 10 30 50 70 90 110 130 150 TEMPERATURE (C)
4067 G04
6 4
ILIM (mA)
Input Current Limit vs Temperature (Low Power)
102 VCLPROG 100 98 ILIM (mA) ILIM 96 94 92 90 -50 192 188 184 180 125 200 800 VCLPROG (mV) 196 204 1000
600 VOUT = 4V RCLPROG = 2k 400 IOUT = 200mA LPWR 200
RON (m)
-25
0 25 50 75 TEMPERATURE (C)
UW
100
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Input Supply Current vs Temperature (Suspend Mode)
90 80 70 60 450 400 350 300 250 200 150 100 50
Input Supply Current vs Temperature
CHARGER ENTERS THERMAL REGULATION
0 -50 -30 -10 10 30 50 70 90 110 130 150 TEMPERATURE (C)
4067 G03
Battery Current vs Temperature (Shutdown)
12 10 8 510
Input Current Limit vs Temperature (High Power)
1010 VCLPROG 505 500 ILIM 495 490 485 480 -50 -25 980 25 50 75 100 125 150 TEMPERATURE (C)
4067 G05
1000
VCLPROG (mV)
990
0 -50 -30 -10 10 30 50 70 90 110 130 150 TEMPERATURE (C)
4067 G09
0
VCLPROG vs Temperature at IIN = 500mA
240 HPWR
RON vs Temperature
VIN = 4.45V RCLPROG = 0k 220 HPWR 200
VCLPROG (mV)
180 160 140 120 RON, 1A RON, 500mA RON, 200mA RON, 100mA -25 0 25 50 75 TEMPERATURE (C) 100 125
0 -50 -30 -10 10 30 50 70 90 110 130 150 TEMPERATURE (C)
4067 G07
100 -50
4067 G08
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LTC4067 TYPICAL PERFOR A CE CHARACTERISTICS
VPROG vs Temperature at IBAT = -500mA
1.2 1.0 4.25 0.8 VPROG (V) 0.6 0.4 4.15 0.2 0 -50 4.10 -50 -30 -10 10 30 50 70 TEMPERATURE (C) VFLOAT (V) VFLOAT (V) ONSET OF THERMAL REGULATION 4.30
-25
0 25 50 75 TEMPERATURE (C)
Charge Current vs Battery Voltage
600 500 400 IBAT (mA) 300 200 450 100 0 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 VBAT (V)
4067 G13
VIN = 5V IOUT = 0mA
ICC-CHG (mA)
Charge Current vs Temperature (Thermal Regulation)
600 500 400 IBAT (mA) 300 200 100 VIN = 5V VBAT = 3.6V 0 -50 -30 -10 10 30 50 70 80 90 110 TEMPERATURE (C)
4067 G17
VFWD (mV)
6
UW
100
Battery Float Voltage vs Temperature
4.4 4.2 4.0 3.8 3.6 3.4 3.2
Battery Regulated (Float) Voltage vs Input Voltage
4.20
125
90 110
4067 G10
3.0 3.0
3.5
4.0
4.5 VIN (V)
5.0
5.5
6.0
4067 G12
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Charge Current vs Battery Voltage
525 VIN = 5V IOUT = 0mA
RPROG = 2k 500
RPROG = 4k
475
2k
425 3.4
3.5
3.6
3.7
3.8 3.9 VBAT (V)
4.0
4.1
4.2
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Ideal Diode Forward Voltage vs Current and Temperature
500 VIN = 5V VBAT = 3.6V SUSP
400 ONSET OF THERMAL REGULATION
300
200 TA = 130C TA = 90C TA = 50C TA = 10C TA = -30C 0 400 800 1200 IOUT (mA) 1600 2000
4067 G18
100
0
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LTC4067 TYPICAL PERFOR A CE CHARACTERISTICS
Ideal Diode Forward Voltage and Resistance vs Current
500 VFWD AT TA = 130C VFWD AT TA = 50C VFWD AT TA = -50C RFWD AT TA = 130C RFWD AT TA = 50C RFWD AT TA = -50C 500 2000 1800 400 1600 1400 RFWD (m) IOUT (mA) 300 1200 1000 800 600 100 VIN = 5V VBAT = 3.6V SUSP 0 400 800 1200 IOUT (mA) 1600 100 400 200 0 0 50 100 150 200 250 300 350 400 450 VFWD (mV)
4067 G13
400
VFWD (mV)
300
VPROG (mV)
200
0
VCLPROG vs IIN
1200 1000 RCLPROG = 4k VCLPROG (mV) 800 RCLPROG = 2k 600 400 200 0 0 100 200 300 400 IIN (mA) 500 600
4067 G22
VBAT = 3.8V
IIN OR IBAT (mA)
UW
4067 G19
Ideal Diode and Schottky Diode Forward Voltage vs Current
VBAT = 3.6V 1200 1000 LTC4067
VPROG vs IBAT
VIN = 5V IOUT = 0mA RPROG = 4k 800 600 RPROG = 2k 400 200 0 0 50 100 150 200 250 300 350 400 450 500 IBAT (mA)
4067 G21
200
1N5817
0 2000
IIN or IBAT and IOUT HPWR Mode
600 500 400 300 200 100 0 -100 -200 VBAT = 3.8V -300 R CLPROG = 2k IBAT IDEAL DIODE -400 RPROG = 2k HPWR -500 0 100 200 300 400 500 600 700 800 900 1000 IOUT (mA)
4067 G23
IIN IBAT CHARGING
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LTC4067 TYPICAL PERFOR A CE CHARACTERISTICS
(VIN - VOUT) vs IOUT
400 350 300 VIN - VOUT (mV) 250 200 150 100 50 0 0 100 200 300 400 IOUT (mA) 500 600
4067 G28
VIN = NTC = 4.4V CLPROG = 2k ILIM0 = 4.4V ILIM1 = 4.4V 2V/DIV
CHRG Pin Serrated Pulse for BAD BAT Faults
5.0 4.5 4.0 3.5 VOL (V) 2V/DIV 3.0 2.5 2.0 1.5 20s/DIV
4067 G32
8
UW
CHRG Pin Serrated Pulse for NTC Faults
20s/DIV
4067 G31
CHRG VOL vs ICHRG
1.0 0.5 0 0 1 2 3 4 5 6 7 8 9 10 ICHRG (mA)
4067 G33
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LTC4067 PI FU CTIO S
CLPROG (Pin 1): Current Limit Program Pin. Connecting a 1% resistor, RCLPROG, to ground programs input current limit depending on the selected operating mode. Operating mode and input current limit are programmed depending on the ILIM0 and ILIM1 pin voltages according to the following table:
Table 1. ILIM Programming
ILIM0 L L H H ILIM1 H L H L ILIMIT (A) 0 200V/RCLPROG 1000V/RCLPROG 2 MODE SUSPEND Low Power High Power CLDIS
The maximum CLPROG resistance value should be no more than 5k. Ground to disable the current limit function. CHRG (Pin 2): Open Drain Charge/Fault Status Output. When the battery is being charged, the CHRG pin is pulled low by an internal N-channel MOSFET. When the timer runs out or the charge current drops below a programmable level or the supply is removed, the CHRG pin is forced into a high impedance state. Float or tie to ground when not in use. NTC (Pin 3): Thermistor sense input to the thermistor monitoring circuits. Under normal operation, tie a thermistor from the NTC pin to ground and a resistor of equal value from the NTC pin to IN. Connect the NTC pin to ground to disable this feature. ILIM0 (Pin 4): Current Limit Control Input. Float or connect to ground when not in use (see Table 1). ILIM1 (Pin 5): Current Limit Control Input. Float or connect to ground when not in use (see Table 1). OVI (Pin 6): Overvoltage Protection Sense Input. Connect to ground when not in use. Bypass to OVP with a 10nF capacitor. OVP (Pin 7): Overvoltage Protection Output. Drive output for an external high-voltage protection PFET. Float when not in use. PROG (Pin 8): Charge Current Program Pin. Connecting a 1% resistor, RPROG, to ground programs the charge
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current during the constant-current portion of the charge cycle according to the following formula: ICC-CHG (A) = 1000V/RPROG If the PROG pin is pulled above the VSD threshold or left floating, the LTC4067 enters low power SHUTDOWN mode to conserve power, in this way an open-drain driver in series with the PROG resistor serves as an ENABLE control. Grounding this pin disables charge current limit and turns off CHRG status signal. GATE (Pin 9): External Ideal Diode Gate Connection. This pin controls the gate of an optional external P-channel MOSFET transistor used to supplement the internal ideal diode. The source of the P-channel MOSFET should be connected to OUT and the drain should be connected to BAT. It is important to maintain high impedance on this pin and minimize all leakage paths. BAT (Pin 10): Single-Cell Li-Ion Battery. Depending on available power and load, a Li-Ion battery on BAT will either deliver system power to OUT through the ideal diode or be charged from the battery charger. OUT (Pin 11): Output Voltage of the PowerPathTM Controller and Input Voltage of the Battery Charger. The majority of the portable product should be powered from OUT. The LTC4067 will partition the available power between the external load on OUT and the internal battery charger. Priority is given to the external load and any extra power is used to charge the battery. An ideal diode from BAT to OUT ensures that OUT is powered even if the load exceeds the allotted input current from IN or if the IN power source is removed. OUT should be bypassed with a low impedance multilayer ceramic capacitor of at least 10F. IN (Pin 12): USB Input Voltage. IN will usually be connected to the USB port of a computer or a DC output wall adapter. IN should be bypassed with a low impedance multilayer ceramic capacitor of at least 1F. Exposed Pad (Pin 13): Ground. The exposed pad is ground and must be soldered to the PC board for proper functionality and for maximum heat transfer.
PowerPath is a trademark of Linear Technology Corporation.
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LTC4067 BLOCK DIAGRA
IN SD OVP PROGRAMMABLE CURRENT LIMIT
+
-
ILIM0 ILIM1
1V 0.2V 0V OVI
MUX
VSERVO SD COLD FAULT HOT FAULT CC/CV CHARGER IDEAL GATE IN
+
6V
-
BAT OUT 0.74VIN VMAX VCC
OVP
- + -
COLD FAULT
NTC
HOT FAULT
IBAT/1000
0.29VIN
+ - -
NTC OFF SD SDB FLOAT 100mV
COLD FAULT HOT FAULT CHRG
0.1VIN
+
+
CHARGE STATUS/ FAULT FLAG
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GND
PROG RPROG
Figure 1. Simplified Block Diagram
10
+ -
DECODE LOGIC
+
-
W
CURRENT LIMIT IOUT/1000 OUT CLPROG RCLPROG CLDIS HPWR LPWR SUSP 25mV BAT
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LTC4067 OPERATIO
Introduction The LTC4067 is a complete PowerPath controller for battery powered USB applications. The LTC4067 is designed to receive power from a USB source (or a wall adapter) or a battery. It can then deliver power to an application connected to the OUT pin and a battery connected to the BAT pin (assuming that an external supply other than the battery is present). Power supplies that have limited current resources (such as USB VBUS supplies) should be connected to the IN pin which has a programmable current limit. Battery charge current will be adjusted to ensure that the sum of the charge current and the load current does not exceed the programmed input current limit. An internal ideal diode function provides power from the battery when output/load current exceeds the input current limit or when the input power is removed. Powering the load through the ideal diode instead of connecting the load directly to the battery allows a fully charged battery to remain fully charged until external power is removed. Once external power is removed the output drops until the ideal diode is forward biased. The forward biased ideal diode will then provide the output power to the load from the battery. Furthermore, powering switching regulator loads from the OUT pin (rather than directly from the battery) results in shorter battery charge times. This is due to the fact that switching regulators typically require constant input power. When this power is drawn from the OUT pin voltage (rather than the lower BAT pin voltage) the current consumed by the switching regulator is lower leaving more current available to charge the battery. Finally, the LTC4067 provides overvoltage controller circuitry which, when used in conjunction with an external P-channel MOSFET, will protect against overvoltage damage if a wall adapter with greater than 6V output is used. The circuit will tolerate input voltages up to 13V without damage. USB PowerPath Controller The input current limit and charge control circuits of the LTC4067 are designed to limit input current as well as control battery charge current as a function of IOUT. OUT drives the combination of the external load and the battery charger.
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If the combined load does not exceed the programmed input current limit, OUT will be connected to IN through an internal 200m P-channel MOSFET. If the combined load at OUT exceeds the programmed input current limit, the battery charger will reduce its charge current by the amount necessary to enable the external load to be satisfied while maintaining the programmed input current. Even if the battery charge current is set to exceed the allowable USB current, the USB specification will not be violated. The input current limit will ensure that the USB specification is never violated. Furthermore, load current at OUT will always be prioritized and only excess available current will be used to charge the battery. The current out of the CLPROG pin is a fraction (1/1000th) of the IN current. When a programming resistor is connected from CLPROG to GND, the voltage on CLPROG represents the input current: IIN = VCLPROG * 1000 RCLPROG The input current limit is programmed by the ILIM0 and ILIM1 pins (see Table 1 in PIN FUNCTIONS). The LTC4067 can be configured to limit input current to one of several possible settings as well as be deactivated (USB suspend). The input current limit will be set by the appropriate servo voltage and the resistor on CLPROG according to the following expressions: ILIM (A) = 0 (SUSPEND) ILIM = ILIM = 200 V RCLPROG (Low Power ) 1000 V (High Power ) RCLPROG ILIM (A) = 2A (CLDIS) Under worst-case conditions, the USB specification will not be violated with an RCLPROG of greater than 2.1k. Current Limit Disable (CLDIS) When ILIM1 is low and ILIM0 is high, the input current limit is set to a higher current limit for increased charging and
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LTC4067 OPERATIO
current availability at OUT. This mode is typically used when there is power available from a wall adapter. Suspend Mode When ILIM1 is high and ILIM0 is low, the LTC4067 enters suspend mode to comply with the USB specification. In this mode, the power path between IN and OUT is put in a high impedance state to reduce the IN input current to 50A. If no other power source is available to drive OUT, the system load connected to OUT is supplied through the ideal diode connected to BAT. Ideal Diode From BAT to OUT The LTC4067 has an internal ideal diode as well as a controller for an optional external ideal diode. Both the internal and external ideal diodes will respond quickly whenever OUT drops below BAT. If the load increases beyond the input current limit, additional current will be pulled from the battery via the ideal diodes. Furthermore, if power to IN (USB) is removed, then all of the application's power will be provided by the battery via the ideal diodes. The ideal diodes are fast enough to keep OUT from dropping with just the recommended output capacitor. The ideal diode consists of a precision amplifier that enables an on-chip P-channel MOSFET whenever the voltage at OUT is approximately 30mV (VFWD) below the voltage at BAT. The resistance of the internal ideal diode is approximately 200m. If this is sufficient for the application, then no external components are necessary. However, if more conductance is needed, an external P-channel MOSFET can be added from BAT to OUT. The GATE pin of the LTC4067 drives the gate of the external P-channel MOSFET for automatic ideal diode control. The source of the MOSFET should be connected to OUT and the drain should be connected to BAT. Capable of driving a 1nF load, the GATE pin can control an external P-channel MOSFET having extremely low on-resistance. If the BAT voltage is below the VBUVLO threshold the ideal diodes are disabled. IN Undervoltage Lockout (UVLO) An internal undervoltage lockout circuit monitors IN and
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keeps the input current limit circuitry off until IN rises above the rising UVLO threshold (3.8V) and at least 50mV above OUT. Hysteresis on the UVLO turns off the input current limit if IN drops below 3.675V or 50mV below OUT. When this happens, system power at OUT will be drawn from the battery via the ideal diode. To minimize the possibility of oscillation in and out of UVLO when using resistive input supplies, the input current limit is reduced when IN falls to within a few hundred millivolts of the UVLO threshold. To ensure that the full input current limit is available and a complete battery charge cycle can be achieved, apply at least 4.25V to IN. Battery Charger The LTC4067 includes a constant-current/constant-voltage battery charger with automatic recharge, automatic termination by safety timer, low voltage trickle charging, bad cell detection and thermistor sensor input for out of temperature charge pausing. When a battery charge cycle begins, the battery charger first determines if the battery is deeply discharged. If the battery voltage is below 2.8V, an automatic trickle charge feature sets the battery charge current to 10% of the programmed value. If the low voltage persists for more than 1/2 hour, the battery charger automatically terminates and indicates via the CHRG pin that the battery was unresponsive. Once the battery voltage is above 2.8V, the battery charger begins charging in full power constant-current mode. The current delivered to the battery will try to reach 1000V/ RPROG. Depending on available input power and external load conditions, the battery charger may or may not be able to charge at the full programmed rate. The external load will always be prioritized over the battery charge current. The USB current limit programming will always be observed and only additional current will be available to charge the battery. When system loads are light, battery charge current will be maximized. Charge Termination The battery charger has a built-in safety timer. When the battery voltage approaches the 4.2V required to maintain a full charge, otherwise known as the float voltage, the
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LTC4067 OPERATIO
charge current begins to decrease as the LTC4067 enters constant-voltage mode. Once the battery charger detects that it has entered constant-voltage mode, the two hour safety timer is started. After the safety timer expires, charging of the battery will discontinue and no more current will be delivered. Automatic Recharge After the battery charger terminates, it will remain off drawing only microamperes of current from the battery. If the portable product remains in this state long enough, the battery will eventually self discharge. To ensure that the battery is always topped off, a charge cycle will automatically begin when the battery voltage falls below VRECHRG (typically 4.1V). In the event that the safety timer is running when the battery voltage falls below VRECHRG, the timer will reset back to zero. To prevent brief excursions below VRECHRG from resetting the safety timer, the battery voltage must be below VRECHRG for more than 1.3ms. The charge cycle and safety timer will also restart if the IN UVLO cycles low and then high (e.g. IN is removed and then replaced). Charge Current The charge current is programmed using a single resistor from PROG to ground. 1/1000th of the battery charge current is delivered to PROG which will attempt to servo to 1.000V. Thus, the battery charge current will try to reach 1000 times the current in the PROG pin. The program resistor and the charge current are calculated using the following equations: RPROG = 1000 V 1000 V , ICC-CHG = ICC-CHG RPROG
In either the constant-current or constant-voltage charging modes, the PROG pin voltage will be proportional to the actual charge current delivered to the battery. Therefore, the actual charge current can be determined at any time by monitoring the PROG pin voltage and using the following equation: IBAT = VPROG * 1000 RPROG
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In many cases, the actual battery charge current, IBAT, will be lower than ICC-CHG due to limited input current available and prioritization with the system load drawn from OUT. Thermal Regulation To prevent thermal damage to the IC or surrounding components, an internal thermal feedback loop will automatically decrease the programmed charge current if the die temperature rises to approximately 105C. Thermal regulation protects the LTC4067 from excessive temperature due to high power operation or high ambient thermal conditions and allows the user to push the limits of the power handling capability with a given circuit board design without risk of damaging the LTC4067 or external components. The benefit of the LTC4067 thermal regulation loop is that charge current can be set according to actual conditions rather than worst-case conditions with the assurance that the battery charger will automatically reduce the current in worst-case conditions. Low Power Shutdown The LTC4067 enters a low power shutdown mode if the PROG pin is pulled above the shutdown threshold, VSD. In shutdown, the BAT pin current is reduced to 5A, the IN pin current is reduced to 10A, the internal battery charge timer and end-of-charge comparator output are both reset. All power paths are put in a high impedance state. A weak (2.5A) pull up at the PROG pin causes the LTC4067 to enter low power shutdown if the PROG pin is floated. An external N-channel MOSFET transistor with its drain tied in series with the PROG pin, or an open drain driver may thereby serve as an enable input for the LTC4067. NTC Under normal operation, tie a thermistor from the NTC pin to GND and a resistor of equal value from NTC to IN. When the voltage on this pin is above 0.74 * VIN (cold, 0C) or below 0.29 * VIN (hot, 50C) the charge timer is suspended, but not cleared, the charging is disabled and the CHRG pin flashes from Hi-Z to active pull-down with a serrated pulse. When the voltage on NTC comes back to between 0.29 * VIN and 0.74 * VIN, the charger timer continues from where it left off, the charging is re-enabled
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13
LTC4067 OPERATIO
if the battery is below the recharge threshold. There is approximately 3C of temperature hysteresis associated with each of the input comparators. If the NTC pin is tied to GND, thermistor qualified charging is disabled. Fault Conditions The CHRG pin provides information as to the charging status, indicating an active charge cycle with a strong open-drain pull down at the CHRG pin. NTC faults and bad battery faults are indicated with serrated pulses; this is described in more detail under the heading Fault Conditions in the Applications Information section. When the battery is being charged, the CHRG pin is pulled low by an internal N-channel MOSFET. When the charge cycle enters voltage mode charging and the charge current is reduced below ICC-CHG/10, the CHRG indicates that the charge cycle is nearly complete by switching to a Hi-Z state. Also when the battery voltage exceeds the OUT voltage and the input supply is removed, or the LTC4067 is put into suspend or shutdown modes, the CHRG pin is forced into a high impedance state. If a bad battery is detected, or if an NTC temperature fault is detected, charging is halted and the CHRG pin switches to a series of serrated open-drain pull down pulses. These serrated Overvoltage Protection The OVI input is provided to sense potentially hazardous voltages at the input in case an unregulated wall adapter is applied. If an overvoltage condition is detected the OVP pin is driven high to turn off an external PMOS transistor inserted in series with the IN pin to disconnect the high voltage from the LTC4067. Table 2 lists recommended P-channel MOSFETs to use with the LTC4067.
Table 2. Recommended OVP Transistors
PART NUMBER IRLML6402 FDR8508P DESCRIPTION P-channel 16V Dual P-channel 16V
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current pulses are designed to cause an LED connected from the CHRG pin to a positive supply voltage to visibly flash, indicating to the user that there is a problem, as well as allowing a microcontroller to detect a fault condition within 300s. If the OVP pin is high, the power path from IN to OUT is disabled.
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LTC4067 APPLICATIO S I FOR ATIO
Battery Charger Stability Considerations The LTC4067 battery charger contains two control loops: constant voltage and constant current. The constant-voltage loop is stable without any compensation when a battery is connected with low impedance leads. Excessive battery lead length, however, may add enough series inductance to require a bypass capacitor of at least 1F from BAT to ground. Furthermore, a 4.7F capacitor with a 0.2 to 1 series resistor is required from BAT to ground to keep the ripple voltage low when the battery is disconnected. In constant-current mode the PROG pin is in the feedback loop, not the BAT pin. Because of the additional pole created by PROG pin capacitance, additional capacitance on this pin must be kept to a minimum. With no additional capacitance on the PROG pin, the charger is stable with program resistor values as high as 6k. However additional capacitance on this node reduces the maximum allowed program resistor. The pole frequency at the PROG pin should be kept above 500kHz. Therefore, if the PROG pin is loaded with a capacitance, CPROG, the following equation should be used to calculate the maximum resistance value for RPROG: RPROG 1/(2 * 5 * 105 CPROG) Average, rather than instantaneous, battery current may be of interest to the user. For example, if a switching power supply operating in low current mode is connected in parallel with the battery, the average current being pulled out of the BAT pin is typically of more interest than the instantaneous current pulses. In such a case, a simple RC filter at the PROG pin measures the average BAT pin current, as shown in the figure below. A 20k resistor has been added between the PROG pin and the filter capacitor to ensure stability. This technique may also be used on the CLPROG pin.
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LTC4067 20k PROG RPROG
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AVERAGE BATTERY CURRENT
CFILTER
Figure 2. Isolating Capacitive Load on PROG Pin and Filtering.
NTC Thermistor Input Pin An NTC input provides the option of charge qualification using battery temperature and an external thermistor thermally coupled to the battery. When the thermistor senses an over or under temperature condition, charging is suspended until the temperature returns to a safe operating range. The CHRG pin flashes while this out of temperature condition persists. If the NTC pin is grounded, NTC charge qualification is disabled. For more information on the CHRG pin during fault conditions see the Fault Conditions heading. The battery temperature is measured by placing a negative temperature coefficient (NTC) thermistor in thermal contact with the battery. The thermal regulation feature of the LTC4067, requires a thermistor, RNTC, between the NTC pin and GND as well as a second resistor, RNOM, from the NTC pin to IN. The recommended RNOM resistor has a value equal to the value of the chosen NTC thermistor at 25C. (For a Vishay NTHS0603N02N1002 thermistor this value is 10k.) The LTC4067 charger goes into hold mode when the resistance, RHOT, of the NTC thermistor drops to 0.41 times the value of RNOM or approximately 4.1k, which is at 50C. Hold mode freezes the timer and stops the charge cycle until the thermistor indicates a return to a valid temperature range. As the temperature drops, the resistance of the NTC thermistor rises. The LTC4067 is also designed to go into hold mode when the value of the
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15
LTC4067 APPLICATIO S I FOR ATIO
NTC thermistor, RCOLD, increases to 2.82 times the value or RNOM. (For a Vishay NTHS0603N02N1002 thermistor this value is 28.2k which corresponds to a temperature of approximately 0C). The hot and cold comparators each have approximately 3C of hysteresis to prevent oscillation about the trip points. Fault Conditions The CHRG pin is used to signal two distinct fault conditions: NTC faults and bad battery faults. Both of these conditions are signaled at the CHRG pin with a series of serrated open-drain pull-down pulses that are intended to produce a visible "blinking" at an LED tied to this pin as well as to produce a pulse train that is detectable to a microprocessor input connected to this pin. The serrated pulses are described with the aid of Figure 3, assuming that the CHRG pin is connected to a positive rail with a resistive pull-up. When an NTC fault condition is detected during a normal charge cycle, the CHRG pin immediately goes from a strong open-drain pull down to a high-impedance state that pulses on for 1.4s and then off at a 35kHz rate. This signal is further modulated by a 1.5Hz blink frequency that reverses from pulsing high-to-low to pulsing low-to-high.
TS V (CHRG) OUT VLOGIC PW = 27.7s (NTC FAULT) 26.3s (BAD BAT)
PW = 1.3s OR 2.7s NORMAL CHARGING
TS = 667ms/2 (NTC FAULT) 167ms/2 (BAD BAT) CHRG FAULT CONDITION
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Figure 3
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Table 3 illustrates the four possible states of the CHRG pin when the battery charger is active.
Table 3. CHRG Output Pin
MODULATION (BLINK) FREQUENCY 0Hz (Lo-Z) 0Hz (Hi-Z) 1.5Hz at 50% 6.1Hz at 50% STATUS Charging IBAT < ICC-CHG/10 NTC Fault Bad Battery FREQUENCY 0Hz 0Hz 35kHz 35kHz DUTY CYCLE 100% 0% 4.7% to 95.3% 9.4% to 90.6%
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A bad battery fault has a 2.8s pulse at the same rate that is modulated by a 6Hz blink frequency. As the CHRG pin immediately changes state upon entering a failure mode, a microprocessor observing this pin detects the fault condition within 29s of the failure occurring, by measuring the pulse width. Furthermore the blink frequency is visually detected by hooking this signal up to an LED. When connecting a microprocessor with a positive logic suppy that is different than the LED anode, a diode must be inserted in series with the microcontroller input so as to aviod the condition where the LED may inadvertantly power up the microcontroller. A circuit that allows visual fault and/or charge status as well as providing a safe microcontroller interface is shown in Figure 4.
LTC4067
TO MICRO
Figure 4. CHRG Pin Connection to Drive a Microcontroller at the Same Time as Providing a Visual Fault and/or Charge Status
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LTC4067 TYPICAL APPLICATIO S
Li-Ion Charger from 5V Wall Adapter with Overvoltage Protection Figure 5 illustrates an application where the LTC4067 is used to charge a single-cell Li-Ion battery from a wall adapter with built-in overvoltage protection. Overvoltage protection is achieved with the OVI and OVP pins of the LTC4067 along with an external PFET in series with the IN pin. This PFET disconnects the LTC4067 from potentially damaging overvoltage conditions that are caused by attaching the wrong wall adapter. When the OVI input senses a voltage greater than VOVTH, the OVP output is pulled up to disable the PFET. When OVI is below this threshold, the OVP output is pulled low, turning on this PFET. In the event that large in-rush currents are expected, it is recommended that a decoupling capacitor be placed from OVI to GND. The body diode of this PFET must be connected so that it is reverse biased when an overvoltage condition exists. A 10nF capacitor is recommended to dynamically pull-up on the gate of Q1 if a fast edge occurs at the wall input during a hot-plug. In the event that this capacitor is pre-charged below the OVI rising threshold when a high voltage spike occurs, the OVP output cannot guarantee turning off Q1 before the IN pin voltage exceeds the absolute maximum voltage for this pin. This may occur in the event that the wall input suddenly steps from 5.5V to a higher voltage. In this case, a zener diode is also recommended to keep the IN pin voltage to a safe level. In the example of Figure 5, the input current limit from the wall adapter is programmed to 1A with a 1k resistor from CLPROG to GND (assuming ILIM0 and ILIM1 are held high). And the charge current is programmed to 500mA via the 2k resistor from the PROG pin to GND. An optional second external PFET connected between OUT and BAT serves as a high-performance ideal diode; to connect the load to the battery with an extremely low impedance. This ideal diode is controlled by the GATE output pin whenever the wall adapter is not present or the load demands more current than is available from the wall adapter input (Connect the source of the PFET to OUT and the drain to BAT). Instantaneous monitoring of both input current and charge current is achieved by measuring the voltages at the CLPROG and PROG pins respectively. Low-power shutdown is engaged by any of the following. Disabling an external NFET tied in series with the PROG pin resistor, by floating the PROG pin with a single-pole switch, by tying RPROG to an open-drain output, by pulling
LOAD OVI 10nF OVP CHRG WALL ADAPTER 1F 10F Q1 IN D1 OPTIONAL NTC LTC4067 BAT 1-CELL Li-Ion PROG ILIM0 INPUT CURRENT MONITOR Q1, Q2: IFR7404 IN RCLPROG 1k ILIM1 CLPROG
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Figure 5. Li-Ion Charger/Controller with Overvoltage Protection
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OUT SOURCE 10F
GATE
Q2 OPTIONAL DRAIN
CHARGE CURRENT MONITOR RPROG 2k
GND
Q3
ENABLE
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17
LTC4067 TYPICAL APPLICATIO S
the PROG pin to the most positive supply rail (IN, BAT or OUT)(not shown). In low-power shutdown total current consumption of the LTC4067 is less than 20A. Figure 6 illustrates an application for charging single-cell Li-Ion batteries directly from a USB bus conforming to the USB requirements for low-power (LPWR), high-power (HPWR), or self-powered functions. Here, the LTC4067 ensures that the load at OUT sees the USB potential when the USB port is applied. When the USB port is removed the load is powered from the battery through an internal 200m ideal diode. Optionally an external PFET driven by the GATE pin is used to improve performance by reducing the series resistance. The 2k resistor at the CLPROG pin ensures that the maximum current drawn from the USB input port is kept below the maximum allowed depending on the permitted power allocation. 500mA for HPWR USB function or 100mA for LPWR USB function. The LTC4067 is configured to comply with the USB SUSPEND specification by driving the ILIM0 pin low and the ILIM1 pin high, whereby the load at OUT is powered from the battery and the only current drawn from the USB port is due to the two series NTC pin resistors. The 2k resistor at the PROG pin selects 500mA for the charge current to automatically charge a single-cell Li-Ion battery following a constant-current/constant-voltage (CC/CV) algorithm with a built-in timer that halts charging after the battery achieves the maximum float voltage of 4.2V. Note that actual charge current depends on the load current, as the charger shares the USB current with the load. During a charge cycle the CHRG pin signals that the battery is charging in constant-current mode by pulling to GND through an open-drain drive output capable of driving an LED for visual indication of charge status. When the charge current drops to less than 10% of the programmed charge current, and the battery is above the recharge threshold (4.1V), the CHRG pin assumes a high impedance state (but top-off charge current continues to flow until the internal charge timer elapses). Bad battery and battery out-of-temperature conditions are also flagged with the CHRG pin as described in the Fault Conditions section. If the load demands more current than allowed by the USB current limit, the charge current is automatically scaled back. Up to the point where an ideal diode function from BAT to OUT turns on once the OUT voltage drops below the BAT voltage. When the ideal diode is engaged, the battery charge cycle is paused and the load at OUT draws current both from the USB port as well as from the battery. At any time, the user may monitor both instantaneous charge current and instantaneous USB current by observing the PROG pin and CLPROG pin voltages respectively. When probing these nodes with a capacitive sensor, a series resistance is recommended to ensure that bulk capacitance from these two nodes to GND does not exceed 50pF.
USB INPUT 10F
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CHRG IN NTC OUT GATE LTC4067 BAT ILIM0 IN RCLPROG 2k ILIM1 CLPROG
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SOURCE OPTIONAL TO LOAD 10F
DRAIN 1-CELL Li-Ion
PROG GND RPROG 2k
Figure 6. USB Battery Charger
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LTC4067 PACKAGE DESCRIPTIO U
DE/UE Package 12-Lead Plastic DFN (4mm x 3mm)
(Reference LTC DWG # 05-08-1695 Rev C)
0.70 0.05 PACKAGE OUTLINE 0.25 0.05 3.30 0.05 (2 SIDES) 0.50 BSC 4.00 0.10 (2 SIDES) R = 0.05 TYP 3.00 0.10 (2 SIDES) 1.70 0.05 (2 SIDES) PIN 1 NOTCH R = 0.20 OR 0.35 x 45 CHAMFER 0.75 0.05 6 0.25 0.05 3.30 0.05 (2 SIDES) 1 0.50 BSC
(UE12/DE12) DFN 0905 REV C
3.60 0.05 1.70 0.05 2.20 0.05 (2 SIDES)
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS R = 0.115 TYP 0.40 0.10 12
7
PIN 1 TOP MARK (NOTE 6)
0.200 REF
0.00 - 0.05
BOTTOM VIEW--EXPOSED PAD NOTE: 1. DRAWING PROPOSED TO BE A VARIATION OF VERSION (WGED) IN JEDEC PACKAGE OUTLINE M0-229 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE
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Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
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LTC4067 TYPICAL APPLICATIO U
Li-Ion Charger/Controller with Overvoltage Protection
LOAD OVI 10nF OVP CHRG WALL ADAPTER 1F 10F Q1 IN D1 OPTIONAL NTC LTC4067 BAT 1-CELL Li-Ion PROG ILIM0 INPUT CURRENT MONITOR Q1, Q2: IFR7404 IN RCLPROG 1k ILIM1 CLPROG
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OUT SOURCE 10F
GATE
Q2 OPTIONAL DRAIN
CHARGE CURRENT MONITOR RPROG 2k
GND
Q3
ENABLE
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ThinSOT is a trademark of Linear Technology Corporation.
20 Linear Technology Corporation
(408) 432-1900 FAX: (408) 434-0507
LT 0407 * PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
www.linear.com
(c) LINEAR TECHNOLOGY CORPORATION 2007

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