View TDA7338D013TR_4236543.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

TDA7338
STEREO DECODER
1
FEATURES
INTEGRATED 19KHz SC NOTCH FILTERFOR PILOT CANCELLATION ON CHIP FILTER FOR PILOT DETECTOR AND PLL ADJUSTMENT FREE VOLTAGE CONTROLLED OSCILLATOR AUTOMATIC PILOT DEPENDENT MONO/ STEREO SWITCHING NOISE BLANKING WITH PROGRAMMABLE THRESHOLD HIGH CUT CONTROL AND STEREO BLEND INTEGRATED HIGH PASS FILTER FOR INTERFERENCE DETECTOR LEVEL INPUT FOR ADDITIONAL SPIKE DETECTION ON FIELDSTRENGHT SIGNAL VERY HIGH SUPPRESSION OF HARMONIC AND INTERFERENCE SIGNALS
Figure 1. Package
SO20
Table 1. Order Codes
Part Number TDA7338D TDA7338D013TR Package SO20 SO20 in Tape & Reel
2
DESCRIPTION
The TDA7338 is a new concept of monolithic integrated stereo decoder with noise blanking for FM car radio applications. With the used BICMOS technique, the 19KHz Notch Filter, the PLL Filter and Phase Filter is realized on the chip with a Switched Capacitor concept. Avoiding the use of multipliers and non linear circuits a very high performance in terms of noise suppression and total harmonic distortion is
Figure 2. reached.Block Diagram
April 2005
Rev. 9 1/12
TDA7338
Table 2. Absolute Maximum Ratings
Symbol VCC ICC Tstg Tamb DC Supply Voltage Suply Current Storage Temperature Operating AmbientTemperature Parameter Value 10.5 20 -55 to 150 -40 to 85 Unit V mA C C
Table 3. Thermal Data
Symbol Rth j-pins Parameter Thermal resistance junction-pins Value 200 Unit C/W
Figure 3. Block Diagram and Test Circuit
40.2K
1F MPX PILOT IND. 18 1nF 1nF
MPX IN 20
MONO 19
VR 17
VSB 16
VHCC 15
HCL 14
HCR 13
12
IN R 40.2K
70K
AMP
PILOT DETECTOR
LEVEL CONTROL
20K
AMP
11 OUT R
80KHz LPF DEMODULATOR 25KHz LPF NOISE BLANKER
HIGH CUT CONTROL
20K
AMP
10
OUT L 40.2K
19KHz SC NOTCH
9 IN L PLL SC PHASE DETECTOR & PHASE FILTER
AMP
DIVIDERS
PEAK DETECTOR
PULSE FORMER
VCO
140KHz LPF
120KHz LPF
TRIGGER THRESHOLD
REFERENCE
4
CREF 4.7F
2 VCO CSB456F11
6 LEVEL
1 PROG TBLANK 470pF VCO OFF
7
8 PEAK 47nF MUTE
3 GND VS
5
D95AU364C
2/12
TDA7338
3
ELECTRICAL CHARACTERISTCS
Table 4. (VCC = 9V; modulation frequency: 1KHz; de-emphasis time: T = 50s; nominal MPX input voltage: VMPX = 1.5VPP; m 100% (75KHz deviation, fmod = 1KHz); RIN = 40.2k, ROUT = 40.2k; Tamb = 27C; CREF = 4.7F; unless otherwise specified)
Symbol VCC ICC VIN VORMS SVRR VL/VR Vo/Vi RO VO THD S+N ------------N M VDC 19 38 57 76 2 3 57 67 114 190 VINTH VINTH VPI IPI V19 Parameter Supply Voltage Supply Current MPX Input Level (peak to peak) A.F. Output Voltage (mono) Supply Voltage Ripple Rejection Difference of Output Voltage Levels Gain Output Resistance DC Output Voltage Channel Separation Total Harmonic Distortion Signal plus noise to noise ratio Muting Attenuation Mute DC Steps at pins 10, 11 Pilot Signal f = 19KHz Subcarrier f = 38KHz Subcarrier f = 57KHz Subcarrier f = 76KHz fmod = 10KHz; fspur = 1KHz fmod = 13KHz; fspur = 1KHz Signal f = 57KHz Signal f = 67KHz Signal f = 114KHz Signal f = 190KHz Pilot Threshold Voltage Pilot Threshold Voltage Pilot Indicator Saturation Voltage Pilot Indicator Leakage Current Control Voltage for forced mono for stereo "ON" for stereo "OFF" I = 1mA V = 9V = < 3dB 12 7 f = 20Hz to 16KHz; S = 2Vrms V7 and V8 < 0.6V Mute at pin 8 55 fm = 1KHz pin 10 and 11VIN = 0.5VRMS MONO; VRIPPLE = 200mV; f = 1KHz pin 10 and 11- mono V10/V20 pin 10 and 11 pin 10 and 11 VR - VSB = -50mVDC 4.2 30 40 -0.8 8.5 9.5 10 4.5 45 0.02 91 100 0 70 75 62 90 65 75 70 75 95 84 20 14 0.2 28 21 0.5 10 0.8 4 0.3 Test Condition Min. 7.5 5 Typ. 9 10 1.5 1.5 55 0.8 10.5 50 4.8 Max. 10.2 15 Unit V mA V V dB dB dB V dB % dB dB mV dB dB dB dB dB dB dB dB dB dB mVRMS mVRMS V A V
CARRIER AND HARMONIC SUPPRESSION AT THE OUTPUT
INTERMODULATION (note 1)
TRAFFIC RADIO (note 2) SCA - SUBSIDIARY COMMUNICATIONS AUTHORIZATION (note 3) ACI - ADJACENT CHANNEL INTERFERENCE (note4)
MONO/ STEREO SWITCH
3/12
TDA7338
Table 4. (VCC = 9V; modulation frequency: 1KHz; de-emphasis time: T = 50s; nominal MPX input voltage: VMPX = 1.5VPP; m 100% (75KHz deviation, fmod = 1KHz); RIN = 40.2k, ROUT = 40.2k; Tamb = 27C; CREF = 4.7F; unless otherwise specified)
STEREO BLEND V16-17 V16-17 Control Voltage for Channel Separation Control Voltage for Channel Separation De-Emphasis Time Constant High Cut Control Resistance High Cut Control Resistance Oscillator Frequency Capture and Holding Range VCO OFF Trigger Threshold (note 6) Pin 7 VPEAK = 1.3V; PROG = GND VPEAK = 1.3V; PROG = OPEN/VDD VTR Trigger Threshold VPEAK = 1.5V; PROG = GND VPEAK = 1.5V; PROG = OPEN/VDD TS IOS VN1 VN2 VN3 Suppression Pulse Duration Input Offset Current during suppression time VPEAK (pin 8) VPEAK (pin 8) VPEAK (pin 8) VIN = 0mVRMS VIN = 50mVRMS; f = 150KHz VIN = 100mVRMS; f = 150KHz 0.7 1.1 1.7 CBLANK = 470pF 180 250 260 340 50 10 1.0 1.5 2.3 1.3 2 2.8 = 6dB; VR = 3.6V (note 5) = 26dB; -0.31 -85 -0.27 -55 -0.23 -30 V mV
HIGH CUT CONTROL deemp R15-17 R15-17 VCO fosc f/f VVCO VTR with Murata CSB456F11 456 1 0.6 KHz % V mV mV mV mV s pA V V V C13, C14 = 1nF; V15-17 = 50mV V15 - 17 = 50mV V15 - 17 = -0.5V (note 5) 43 43 115 50 50 150 57 57 185 s K K
NOISE INTERFACE DETECTOR (test condition: VSB > VR + 50mV)
3.1 NOTES TO THE CHARACTERISTICS 1) INTERMODULATION SUPPRESSION
V O ( signal ) ( at1KHz ) 2 = ----------------------------------------------------------------- ; fs = (2 x 10KHz) - 19KHz V O ( spurious ) ( at1KHz )
V O ( signal ) ( at1KHz ) 3 = ----------------------------------------------------------------- ; fs = (3 x 13KHz) - 38KHz V O ( spurious ) ( at1KHz )
measured with : 91% mono signal; 9% pilot signal; fm=10KHz or 13KHz 2) TRAFFIC RADIO (V.F.) suppression
V O ( signal ) ( at1KHz ) 57 ( V.W.F. ) = ------------------------------------------------------------------------------------------V O ( spurious ) ( at1KHz 23KHz )
measured with : 91% stereo signal; 9% pilot signal; fm=1KHz; 5% subcarrier (f = 57KHz, fm = 23Hz AM, m = 60%)
4/12
TDA7338
3. SCA (SUBSIDIARY COMMUNICATIONS AUTHORIZATION)
V O ( signal ) ( at1KHz ) 67 = ----------------------------------------------------------------- ; fs = (2 x 38KHz) - 67KHz V O ( spurious ) ( at9KHz )
measured with : 81% mono signal; 9% pilot signal; fm=1KHz; 10% SCA - subcarrier (fs = 67KHz, unmodulated) 4. ACI (ADJACENT CHANNEL INTERFERENCE)
V O ( signal ) ( at1KHz ) 114 = ----------------------------------------------------------------V O ( spurious ) ( at4KHz )
; fs = 110KHz - (3 x 38KHz)
V O ( signal ) ( at1KHz ) 190 = ----------------------------------------------------------------V O ( spurious ) ( at4KHz )
; fs = 186KHz - (5 x 38KHz)
measured with : 90% mono signal; 9% pilot signal; fm=1KHz; 1% spurious signal (fs = 110KHz or 186KHz, unmodulated) 5. Control range typ 11% of VR (see figure 5 and figure 6) 6. MEASUREMENT OF TRIGGER THRESHOLDS All thresholds are measured by using a pulse with TR = 2s, THIGH = 2s, and TF = 10s. The repetition rate must not increase the PEAK voltage. Figure 4.
Vin VTR
DC
D95AU365
TR
THIGH
TF
Time
4
FUNCTIONAL DESCRIPTION
4.1 Signal Path The TDA7338 Stereodecoder contains all necessary functions for processing the MPX signal. Due to the external input resistance (Pin 20) the circuit can be adapted to different MPX input levels. Behind a 80kHz lowpass filter the adjustment free PLL for the pilot Tone is placed. The only external component needed for the PLL is the ceramic resonator for the oscillator which runs at 456kHz. The pilot detector output is designed as an open collector output, therefore an external pullup resistor is needed. To force the decoder to "MONO" Pin 19 has to be clamped to a voltage below 0.8V. The voltage level (signal strength from the IF part) applied to Pin 15 (VHCC) allows to control the time constant of the deemphasis (nom. = 50s, see fig. 5). If the RF-signal is weak, the corner frequency is reduced down to 1kHz to improve the signal to noise ratio.
5/12
TDA7338
Figure 5. High Cut Control
fc (KHz)
D95AU366
Figure 6. Stereo Blend
SEP (dB) 50
D95AU367
3.18 (=50s)
VR=3.6V
40 VR=3.6V 30 20
2
1
10
0 -0.5 -0.4 -0.3 -0.2 -0.1 0.0 VHCC-VR(V)
0 -0.40 -0.32 -0.24 -0.16 -0.08 VSB-VR(V)
Furthermore the conditions of the stereo separation (see fig.6) can be controlled through the signal applied to Pin 16 (VSB). Both signal levels (VSB and VHCC) are referred to Pin 17 (VR), with the characteristic that the control range is 11% of VR. By modifying the feedback resistor value of the output stages (Pin 9 - 10, Pin 11 - 12) the total gain of the stereodecoder can be modified. Pin 7 and Pin 8 have an additional function. By pulling them to ground the VCO-OFF (Pin 7) and the MUTE (Pin 8) function are activated. The MUTE signal disconnects the MPX-signal from the circuit, while in combination with VCO-OFF also the output buffers are disconnected from the circuit. In this mode the output buffers can be used for AM-stereo, cassette play back and other purposes. 4.2 AM Mono Mode By selecting VCO-OFF (Pin 7 to GND) the VCO is switched off and the SB and HCC are disabled. The deemphasis time constant is changed to 40s (fc = 4KHz). 4.3 DESCRIPTION OF THE NOISE BLANKER In the normal automotive environment the MPX signal is disturbed by ignition spikes, motors and high frequency switches etc. The aim of the noise blanker part is to cancel the influence of the spikes produced by these components. Therefore the output of the stereodecoder is switched off for a time of 40s (average spike duration). In a first stage the spikes must be detected but to avoid a wrong triggering on high frequency noise a complex trigger control is implemented. Behind the trigger stage a pulse former generates the 40ms "blanking" pulse. This duration of 40s can be varied by changing the capacitor at pin 7. 4.3.1 Trigger Path The incoming MPX signal is highpass-filtered, amplified and rectified (block RECT-PEAK). The second order highpass-filter has a corner-frequency of 140KHz. The rectifier signal, RECT, is used to generate by peak-rectification a signal called PEAK, which is available at the PEAK pin 8. Also noise with a frequency >100KHz increases the PEAK voltage. The value of the PEAK voltage influences the trigger threshold voltage Vth (block ATC). The higher the noise level the higher the threshold. Both signals, RECT and PEAK+Vth are fed to a comparator (block PEAK-COMP) which outputs a sawtooth-shaped waveform at the TBLANK pin 7. A second comparator (block BLANK-COMP) forms the internal blanking duration of 40s. The noise blanker is supplied by his own biasing circuit (block BIASMONO) to avoid any cross talk to the signal path (block BIAS-MONO).
6/12
TDA7338
4.3.2 Noise Controlled Threshold Adjustment (ATC) The behaviour of the noise controlled threshold adjustment is shown in fig. 8. It can be influenced lightly by adding a resistor in parallel to the PEAK capacitor at Pin 8 either to GND or VDD. A resistor to GND will decrease the threshold whereas a resistor to VDD will increase it. But it is recommended to choose one of the internal thresholds by use of the PROG pin (see table 5) 4.3.3 Automatic Threshold Control by the Stereoblend voltage (ATC-SB) Besides the noise controlled threshold adjustment there is an additional possibility for influencing the trigger. It is controlled by the difference between Vsb and Vr, similar to the Stereoblend. The reason for implementing such a second control will be explained in the following: The point where the MPX signal starts to become noisy is fixed by the RF part. Therefore also the starting point of the normal noise controlled trigger adjustment is fixed (fig.9). But in some cases the behaviour of the noiseblanker can be improved by increasing the threshold even in a region of higher fieldstrength, for the MPX signal often shows distortion in this range, which leads to an undesired triggering. Because of the overlap of this range and the range of the stereo/mono transition it can be controlled by Vsb and Vr. This threshold increase is programmable (see fig. 9). 4.3.4 Blend Mode Another possibility to avoid a disturbing triggering on modulation is to use the spikes on the fieldstrength signal (LEVEL pin). But in the range of higher fieldstrength the signal saturates and no more spike detection is possible. For this reason the TDA7338 offers the "BLEND MODE". When "BLEND MODE" is activated a smooth transition between the LEVEL- and the MPX-signal is used to detect the spikes either on LEVEL or on MPX. In the lower fieldstrength range mainly the LEVEL-signal is used whereas in the higher range mainly the MPX is used. This switching is controlled also by the normal Stereoblend signal to avoid additional pins. "BLEND MODE OFF" is activated by connecting the LEVEL pin to GND (LEVEL must be also connected to GND if not used). Figure 7. Block Diagram of the Noise Blanker
LEFT 80KHz LP SIGNAL PATH to OUTPUTS
RIGHT
MPX IN
140KHz HP
AMP
BUF
PEAK
AUTOMATIC THRESHOLD CONTROL ATC
LEVEL
120KHz HP
PEAK+VTH
THRESHOLD L/H RECT-PEAK BLEND CONTROL BLEND ON/OFF 0.1V ADDITIONAL THRESHOLD CONTROL on/off + ADDITIONAL THRESHOLD CONTROL (ATC-SB) 7V PROG
VR VSB CPEAK 47nF
D95AU368
CBLANK 330pF
+
+
-
RECT
REF.
40s 2V VS
PEAK COMP
BLANK COMP
7/12
TDA7338
Table 5. Programming of the Noiseblanker
PIN 1 (PROG) GND OPEN VDD Trigger Threshold LOW HIGH HIGH Peak Voltage Control By Fieldstrength ON ON OFF
Figure 8. Trigger Threshold vs. VPEAK
VTH
300mV
MIN. TRIG. THRESHOLD
180mV NOISE ADJUSTED TRIG. THRESHOLD
100mV 60mV
0.9V
D95AU369
1.5V
VPEAK(V)
Figure 9. Behaviour of the Field Strength Controlled Threshold Adiustment
VPEAK MONO 3V STEREO
TRIG. THRESHOLD
2.2V 0.9V
NOISE
ATC_SB OFF (PROG=VS) good signal E'
noisy signal
D95AU370
8/12
TDA7338
Figure 10. Application Diagram
SIGNAL STRENGTH
68K 1) 15 47K 47K 1) 16 47K 12 17 18 19 100K 11 14 13
1nF 2)
1nF 2) IN R 47K 56pF 3) OUT LEVEL (SIGNAL STRENGTH) IN L 47K 56pF 3) OUT
VR PILOT_IND
MONO 68K
TDA7338
6
9 10K 20 4) 680pF 7 1 2 4 5 3 8 10K 10
470nF MPX
33K
100K VCO_OFF (FM ENABLE) 100K
MUTE 330pF 456KHz 10F VS 9V 1) 2) 3) 4) has to be adapted to the signal strength for deemphasis = 50s not absolutely necessary roll off: to be adjusted to the tuner part 100nF 47nF 10K
D95AU371A
9/12
TDA7338
Figure 11. SO20 Mechanical Data & Package Dimensions
mm DIM. MIN. A A1 B C D (1) E e H h L k ddd 10.0 0.25 0.40 2.35 0.10 0.33 0.23 12.60 7.40 1.27 10.65 0.75 1.27 0.394 0.010 0.016 TYP. MAX. 2.65 0.30 0.51 0.32 13.00 7.60 MIN. 0.093 0.004 0.013 0.009 0.496 0.291 0.050 0.419 0.030 0.050 TYP. MAX. 0.104 0.012 0.200 0.013 0.512 0.299 inch
OUTLINE AND MECHANICAL DATA
0 (min.), 8 (max.) 0.10 0.004
(1) "D" dimension does not include mold flash, protusions or gate burrs. Mold flash, protusions or gate burrs shall not exceed 0.15mm per side.
SO20
0016022 D
10/12
TDA7338
5
REVISION HISTORY
Table 6. Revision History
Date October 2004 April 2005 Revision 8 9 First Issue in EDOCS Changed the Style-cheet in compliance to the new "Corporate Technical Pubblications Design Guide. Deleted DIP20 Package Description of Changes
11/12
TDA7338
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners (c) 2005 STMicroelectronics - All rights reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America www.st.com
12/12

▲Up To Search▲

Price & Availability of TDA7338D013TR

	To Download TDA7338D013TR Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .