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| ESDALC6V1W5 Quad TRANSILTM array for data protection Main applications Where transient overvoltage protection in ESD sensitive equipment is required, such as : Computers Printers Communication systems Cellular phones and accessories Wireline and wireless telephone sets Set top boxes SOT323-5L Order codes Part Number ESDALC6V1W5 Marking C61 Features ESDALC6V1W5 Functional diagram 4 Unidirectional Transil functions Breakdown voltage: VBR = 6.1 V minimum Low leakage current: < 1 A Low capacitance: 7.5 pF at 3 V Very small PCB area < 4.2 mm2 typically GND I/02 I/03 I/01 I/04 Description The ESDALCxxxWx are monolithic suppressors designed to protect components connected to data and transmission lines against ESD. These devices clamp the voltage just above the logic level supply for positive transients, and to a diode drop below ground for negative transients. Complies with the following standards IEC61000-4-2 Level 4 15 kV (air discharge) 8 kV(contact discharge) Benefits MIL STD 883E - Method 3015-7 Class 3 25 kV HBM (Human Body Model) High ESD protection level: up to 25 kV High integration TM: TRANSIL is a trademark of STMicroelectronics Rev 5 1/7 www.st.com 7 January 2006 1 Characteristics ESDALC6V1W5 1 Characteristics Table 1. Symbol PPP Tj Tstg TL Top Peak pulse power (8/20 s) Junction temperature Storage temperature range Maximum lead temperature for soldering during 10s Operating temperature range(1) Absolute Ratings (Tamb = 25C) Parameter Value 25 150 -55 to +150 260 -40 to +150 Unit W C C C C 1. The values of the operating parameters versus temperature are given through curves and T parameter. 1.1 Electrical Characteristics (Tamb = 25C) Symbol VRM VBR VCL IRM IPP IR IF T VF C Rd Parameter Stand-off voltage Breakdown voltage Clamping voltage Leakage current Peak pulse current Reverse leakage current Forward current Voltage temperature coefficient Forward voltage drop Capacitance Dynamic resistance VBR@ IR Part Numbers min. V ESDALC6V1W5 6.1 max. V 7.2 mA 1 IRM @ VRM max. A 1 V 3 Rd typ.(1) 1.1 T max.(2) 10-4/C 6 C typ. 3V bias pF 7.5 I IF VF VCL VBR VRM IRM V Slope: 1/Rd IPP 1. Square pulse lpp = 15 A, tp = 2.5 s 2. VBR = aT* (Tamb - 25 C) * VBR (25 C) 2/7 ESDALC6V1W5 Figure 1. Peak power dissipation versus initial junction temperature Figure 2. 1 Characteristics Peak pulse power versus exponential pulse duration (Tj initial = 25C) Tj initial = 25C 1.1 1.0 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0.0 Ppp[Tj initial] / Ppp [Tj initial = 25C] 100 Ppp(W) Tj(C) 10 0 25 50 75 100 125 150 175 tp(s) 1 10 100 Figure 3. Clamping voltage versus peak pulse Figure 4. current (Tj initial = 25C, rectangular waveform, tp = 2.5 s) C(pF) 14 13 12 11 10 9 8 7 6 Capacitance versus reverse applied voltage (typical values) Ipp(A) 100.0 F=1MHz Vosc=30mVRMS Tj=25C 10.0 1.0 5 4 3 2 Vcl(V) 0.1 0 10 20 30 40 tp=2.5s Tj initial =25C 1 0 VR(V) 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 50 60 Figure 5. Relative variation of leakage current Figure 6. versus junction temperature (typical values) I FM (A) 1.E+00 Peak forward voltage drop versus peak forward current (typical values) IR [Tj] / IR [Tj=25C] 100 1.E-01 10 1.E-02 1 25 50 75 Tj(C) 100 125 150 VFM(V) 1.E-03 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 3/7 2 Ordering information scheme ESDALC6V1W5 Figure 7. ESD response to IEC61000-4-2 (air discharge 15 kV, positive surge) 2 Ordering information scheme ESDA ESD Array Low capacitance Breakdown Voltage 6V1 = 6.1 Volts min Package W5 = SOT323-5L LC 6V1 W5 4/7 ESDALC6V1W5 3 Package mechanical data 3 3.1 Package mechanical data SOT323-5L package DIMENSIONS A E REF. Millimeters Min. Max. 1.1 0.1 1 0.3 0.18 2.2 1.35 Inches Min. 0.031 0 0.031 0.006 0.004 0.071 0.045 Max. 0.043 0.004 0.039 0.012 0.007 0.086 0.053 A e b e D 0.8 0 0.8 0.15 0.1 1.8 1.15 A1 A2 b A1 A2 Q1 c D E c HE e HE Q1 0.65 Typ. 1.8 0.1 2.4 0.4 0.025 Typ. 0.071 0.004 0.094 0.016 Figure 8. Footprint dimensions 0.3 1.0 2.9 1.0 0.35 Dimensions in mm In order to meet environmental requirements, ST offers these devices in ECOPACK(R) packages. These packages have a Lead-free second level interconnect . The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com. 5/7 4 Ordering information ESDALC6V1W5 4 Ordering information Part Number ESDALC6V1W5 Marking C61 Package SOT323-5L Weight 5.4 mg Base qty 3000 Delivery mode Tape & reel 5 Revision history Date Jun-2002 Revision 4A Previous issue Reformatted to current template. Figure 5: Range of Tj extended to 150 C. Figure 6: Peak forward voltage drop versus peak forward current (typical values) added. Changes 10-Jan-2006 5 6/7 ESDALC6V1W5 5 Revision history Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners (c) 2006 STMicroelectronics - All rights reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America www.st.com 7/7 |
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