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PD- 95272 * Co-Pack Dual N-channel HEXFET(R) Power MOSFET and Schottky Diode * Ideal for Synchronous Buck DC-DC Converters Up to 11A Peak Output * Low Conduction Losses Co-Packaged * Low Switching Losses * Low Vf Schottky Rectifier * Lead-Free IRF7335D1PBF Dual FETKY Dual MOSFET Plus Schottky Diode Device Ratings (Typ.Values) Q1 Q2 and Schottky D1 D1 G1 G2 S2 S2 S2 1 2 3 4 5 6 7 Q2 Q1 14 13 12 11 10 9 8 S1, D2 S1, D2 S1, D2 S1, D2 S1, D2 S1, D2 S1, D2 RDS(on) QG Qsw VSD 13.4 m 13 nC 5.5 nC 1.0V 9.6 m 18 nC 6.4 nC 0.43V Description The FETKYTM family of Co-Pack HEXFET(R)MOSFETs and Schottky diodes offers the designer an innovative, board space saving solution for switching regulator and power management applications. Advanced HEXFET(R)MOSFETs combined with low forward drop Schottky results in an extremely efficient device suitable for a wide variety of portable electronics applications. The SO-14 has been modified through a customized leadframe for enhanced thermal characteristics and multiple die capability making it ideal in a variety of power applications. With these improvements multiple devices can be used in an application with dramatically reduced board space. Internal connections enable easier board layout design with reduced stray inductance. Absolute Maximum Ratings Parameter VDS ID @ TA = 25C ID @ TA = 70C IDM PD @TA = 25C PD @TA = 70C VGS EAS (6 sigma) TJ TSTG Drain-Source Voltage Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Pulsed Drain Current Power Dissipation Power Dissipation Linear Derating Factor Gate-to-Source Voltage Single Pulse Avalanche Energy Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds Max. 30 10 8.1 81 2.0 1.3 0.02 12 50 -55 to + 150 300 (1.6mm from case ) Units V A W W/C V mJ C Thermal Resistance Symbol RJL RJA Parameter Junction-to-Drain Lead Junction-to-Ambient Typ. Max. 20 62.5 Units C/W Notes through are on page 12 08/16/06 IRF7335D1PBF Electrical Characteristics Parameter Drain-to-Source Breakdown Voltage Breakdown Voltage Tem. Coefficient Static Drain-Source on Resistance Gate Threshold Voltage Drain-Source Leakage Current Gate-Source Leakage Current Forward Transconductance Total Gate Charge Pre-Vth Gate-Source Charge Post-Vth Gate-Source Charge Gate to Drain Charge Switch Chg(Qgs2 + Qgd) Output Charge Gate Resistance Turn-on Delay Time Rise Time Turn-off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance BVDSS Q1-Control FET Min 30 Typ Max Q2-Synch FET & Schottky Min 30 0.033 Typ Max Units V V 9.6 1.1 12.8 m V 30 10 100 28 A mA nA S 18 5.8 1.5 4.9 6.4 11 nC 5.0 VDD = 16V, ID = 8.0A ns VGS = 4.5V Clamped Inductive Load VDS = 16V, VGS = 0 nC 27 Conditions VGS = 0V, ID = 250A Reference to 25C, ID = 1.0mA VGS = 4.5V, ID = 10A VDS = VGS,ID = 250A VDS = 24V, VGS = 0 VDS = 24V, VGS = 0, Tj = 125C VGS = 12V VGS=5V, ID=8.0A, VDS=15V VGS=4.5V, ID=8.0A, VDS=15V BVDSS/TJ 0.025 RDS(on) V GS(th) IDSS 1.0 13.4 17.5 30 0.3 IGSS gFS QG Q GS1 Q GS2 QGD Qsw Qoss RG td (on) tr td tf Ciss Coss Crss (off) 100 21 13 3.2 1.4 4.1 5.5 7.7 4.3 6.8 5.9 19 9.1 1500 310 140 10 20 2.6 8.8 3.3 17 7.0 2300 450 180 pF VDS = 15V, VGS = 0 Source-Drain Rating & Characteristics Parameter Continuous Source Current (Body Diode) Pulse Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Time Reverse Recovery Charge IS ISM VSD trr Qrr trr Qrr 1 28 24 29 26 Min Typ Max 10 81 1.25 0.43 31 26 31 26 Min Typ Max Units 10 81 0.50 V ns nC ns nC A Conditions MOSFET symbol showing the intergral reverse p-n junction diode G S D TJ = 25C, IS = 1.0A,VGS= 0V TJ = 125C, IF = 8.0A, VR= 15V di/dt = 100A/s TJ = 125C, I F =8.0A, VR= 15V di/dt =100A/s 2 www.irf.com IRF7335D1PBF Typical Characteristics Q1 - Control FET 1000 VGS 10V 5.0V 4.5V 3.0V 2.7V 2.5V 2.2V BOTTOM 2.0V TOP Q2 - Synchronous FET & Schottky 1000 VGS 12V 10V 8.0V 4.5V 3.5V 3.0V 2.5V BOTTOM 2.25V TOP I D, Drain-to-Source Current (A) ID, Drain-to-Source Current (A) 100 100 10 10 1 1 2.0V 20s PULSE WIDTH Tj = 25C 0.1 0.1 1 10 100 2.25V 20s PULSE WIDTH Tj = 25C 0.1 0.1 1 10 100 VDS , Drain-to-Source Voltage (V) VDS, Drain-to-Source Voltage (V) Fig 1. Typical Output Characteristics 1000 VGS 10V 5.0V 4.5V 3.0V 2.7V 2.5V 2.2V BOTTOM 2.0V TOP Fig 2. Typical Output Characteristics 100 VGS 12V 10V 8.0V 4.5V 3.5V 3.0V 2.5V BOTTOM 2.25V TOP ID , Drain-to-Source Current (A) 100 ID , Drain-to-Source Current (A) 10 10 2.25V 1 2.0V 20s PULSE WIDTH Tj = 150C 20s PULSE WIDTH Tj = 150C 1 0.1 1 10 100 0.1 0.1 1 10 100 VDS, Drain-to-Source Voltage (V) VDS , Drain-to-Source Voltage (V) Fig 3. Typical Output Characteristics 100.0 Fig 4. Typical Output Characteristics 100.0 T J = 150C ID , Drain-to-Source Current () ID , Drain-to-Source Current () 10.0 T J = 150C 10.0 1.0 T J = 25C 1.0 T J = 25C 0.1 0.0 2.0 2.5 3.0 VDS = 15V 20s PULSE WIDTH 3.5 4.0 4.5 0.1 2.0 VDS = 15V 20s PULSE WIDTH 3.0 4.0 VGS , Gate-to-Source Voltage (V) VGS , Gate-to-Source Voltage (V) Fig 5. Typical Transfer Characteristics Fig 6. Typical Transfer Characteristics www.irf.com 3 IRF7335D1PBF Typical Characteristics Q1 - Control FET 80 Q2 - Synchronous FET & Schottky 80 VGS 7.5V 4.5V 3.5V 2.5V 2.0V 1.5V 1.0V BOTTOM 0.0V TOP ID Drain-to-Source Current (A) 60 TOP VGS 7.5V 4.5V 3.5V 2.5V 2.0V 1.5V 1.0V 0.0V ID Drain-to-Source Current (A) 60 40 40 20 BOTTOM 20 20s PULSE WIDTH Tj = 25C 0 20s PULSE WIDTH Tj = 25C 0 0.0 0.4 0.8 1.2 1.6 2.0 VSD Source-to-Drain Voltage (V) 0.0 0.4 0.8 1.2 1.6 2.0 VSD Source-to-Drain Voltage (V) Fig. 7. Typical Reverse Output Characteristics 80 TOP VGS 7.5V 4.5V 3.5V 2.5V 2.0V 1.5V 1.0V 0.0V Fig. 8. Typical Reverse Output Characteristics 80 VGS 7.5V 4.5V 3.5V 2.5V 2.0V 1.5V 1.0V BOTTOM 0.0V TOP ID Drain-to-Source Current (A) 60 ID Drain-to-Source Current (A) 60 BOTTOM 40 40 20 20s PULSE WIDTH Tj = 150C 0 0.0 0.4 0.8 1.2 1.6 2.0 20 20s PULSE WIDTH Tj = 150C 0 0.0 0.4 0.8 1.2 1.6 2.0 VSD Source-to-Drain Voltage (V) VSD Source-to-Drain Voltage (V) Fig. 9. Typical Reverse Output Characteristics 100.0 Fig. 10. Typical Reverse Output Characteristics 100.0 ISD, Reverse Drain Current (A) T J = 150C 10.0 ISD, Reverse Drain Current (A) 10.0 TJ = 150C 1.0 TJ = 25C VGS = 0V 0.1 0.0 0.4 0.8 1.2 1.6 2.0 VSD, Source-toDrain Voltage (V) 1.0 TJ = 25C VGS = 0V 0.1 0.0 0.4 0.8 1.2 1.6 VSD, Source-toDrain Voltage (V) Fig 11. Typical Source-Drain Diode Forward Voltage Fig 12. Typical Source-Drain Diode Forward Voltage 4 www.irf.com Typical Characteristics Q1 - Control FET 2500 VGS = 0V, f = 1 MHZ C iss = C gs + C gd , C ds SHORTED Crss Coss =C gd = Cds + Cgd IRF7335D1PBF VGS = 0V, f = 1 MHZ C iss = C gs + Cgd , SHORTED Crss = C gd Coss = Cds + Cgd Q2 - Synchronous FET & Schottky 4000 3500 3000 C ds 2000 C, Capacitance (pF) C, Capacitance (pF) 1500 Ciss 2500 Ciss 2000 1500 1000 1000 500 Coss Crss 0 1 10 100 500 0 1 Coss Crss 10 100 VDS, Drain-to-Source Voltage (V) VDS , Drain-to-Source Voltage (V) Fig 13. Typical Capacitance Vs.Drain-to-Source Voltage 12 ID= 8.0A VGS , Gate-to-Source Voltage (V) Fig 14. Typical Capacitance Vs.Drain-to-Source Voltage 12 I D= 8.0A VDS = 24V VDS= 15V VGS , Gate-to-Source Voltage (V) 20 25 30 10 8 6 4 2 0 0 5 VDS = 24V VDS= 15V 10 8 6 4 2 0 10 15 0 5 10 15 20 25 30 Q G Total Gate Charge (nC) Q G Total Gate Charge (nC) Fig. 15. Gate-to-Source Voltage vs Typical Gate Charge 1000 OPERATION IN THIS AREA LIMITED BY RDS (on) Fig. 16. Gate-to-Source Voltage vs Typical Gate Charge 1000 OPERATION IN THIS AREA LIMITED BY R DS (on) I D, Drain-to-Source Current (A) ID, Drain-to-Source Current (A) 100 100 10 100sec 1msec 10 100sec 1msec 1 Tc = 25C Tj = 150C Single Pulse 0.1 0.1 1.0 10.0 10msec 1 Tc = 25C Tj = 150C Single Pulse 0.1 0.1 1.0 10.0 10msec 100.0 1000.0 100.0 1000.0 VDS , Drain-toSource Voltage (V) VDS , Drain-toSource Voltage (V) Fig 17. Maximum Safe Operating Area Fig 18. Maximum Safe Operating Area www.irf.com 5 IRF7335D1PBF Q1 - Control FET 2.0 Typical Characteristics Q2 - Synchronous FET & Schottky 2.0 R DS(on) , Drain-to-Source On Resistance ID = 10A VGS = 4.5V RDS(on) , Drain-to-Source On Resistance 1.5 I D = 10A 1.5 (Normalized) (Normalized) 1.0 1.0 0.5 V GS = 4.5V 0.0 -60 -40 -20 0 20 40 60 80 100 120 140 160 0.5 -60 -40 -20 0 20 40 60 80 100 120 140 160 TJ , Junction Temperature ( C) Fig 19. Normalized On-Resistance Vs. Temperature R DS ( on) , Drain-to-Source On Resistance ( ) 0.030 T J , Junction Temperature (C) Fig 20. Normalized On-Resistance Vs. Temperature R DS (on) , Drain-to-Source On Resistance ( ) 0.011 0.025 VGS = 4.5V 0.010 0.020 VGS= 4.5V 0.015 0.010 0 20 40 60 80 0.009 0 20 40 60 80 100 ID , Drain Current (A) ID , Drain Current (A) Fig 21. Typical On-Resistance Vs. Drain Current R DS(on) , Drain-to -Source On Resistance ( ) 0.03 Fig 22. Typical On-Resistance Vs. Drain Current R DS(on) , Drain-to -Source On Resistance ( ) 0.015 0.02 ID = 10A 0.010 I D = 10A 0.01 0.00 2.0 4.0 6.0 8.0 10.0 0.005 3.0 3.5 4.0 4.5 VGS, Gate -to -Source Voltage (V) VGS, Gate -to -Source Voltage (V) Fig 23. Typical On-Resistance Vs. Gate Voltage Fig 24. Typical On-Resistance Vs. Gate Voltage 6 www.irf.com IRF7335D1PBF 12 VDS 10 RD ID , Drain Current (A) VGS 8 RG V GS D.U.T. + 6 -VDD 4 Pulse Width 1 s Duty Factor 0.1 % 2 Fig 26a. Switching Time Test Circuit VDS 25 50 75 100 125 150 0 90% T J , Junction Temperature (C) Fig 25. Maximum Drain Current Vs.CaseTemperature 10% VGS td(on) Current Regulator Same Type as D.U.T. tr t d(off) tf Fig 26b. Switching Time Waveforms 50K 12V .2F .3F VGS QGS D.U.T. + V - DS QG QGD VG VGS 3mA Charge IG ID Current Sampling Resistors Fig 27a&b. Basic Gate Charge Test Circuit and Waveform 100 D = 0.50 Thermal Response ( Z thJA ) 10 0.20 0.10 0.05 1 0.02 0.01 0.1 SINGLE PULSE ( THERMAL RESPONSE ) 0.01 1E-006 1E-005 0.0001 0.001 0.01 0.1 1 10 100 t1 , Rectangular Pulse Duration (sec) Fig. 28. Maximum Effective Transient Thermal Impedance, Junction-to-Ambient www.irf.com 7 IRF7335D1PBF Schottky Diode Characteristics 100 100000 10000 Reverse Current - I R (A ) Tj = 150C 1000 125C 100C 100 75C 50C 25C Instantaneous Forward Current - I F ( A ) 10 10 1 0.1 0 5 10 15 20 25 30 Reverse Voltage - V R (V) T J = 150C 1 T J = 125C T J = 25C Fig. 30 - Typical Values of Reverse Current Vs. Reverse Voltage 0.1 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 Forward Voltage Drop - V F ( V ) Fig. 29 - Maximum Forward Voltage Drop Characteristics 8 www.irf.com IRF7335D1PBF D.U.T Driver Gate Drive Period D= P.W. Period VGS=10V + P.W. + Circuit Layout Considerations * Low Stray Inductance * Ground Plane * Low Leakage Inductance Current Transformer * D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt - + RG * * * * dv/dt controlled by RG Driver same type as D.U.T. I SD controlled by Duty Factor "D" D.U.T. - Device Under Test V DD VDD + - Re-Applied Voltage Inductor Curent Body Diode Forward Drop Ripple 5% ISD * VGS = 5V for Logic Level Devices Fig. 31 Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET(R) Power MOSFETs Id Vds Vgs Vgs(th) Qgs1 Qgs2 Qgd Qgodr Fig. 32 Gate Charge Waveform www.irf.com 9 IRF7335D1PBF Power MOSFET Selection for Non-Isolated DC/DC Converters Control FET Special attention has been given to the power losses in the switching elements of the circuit - Q1 and Q2. Power losses in the high side switch Q1, also called the Control FET, are impacted by the Rds(on) of the MOSFET, but these conduction losses are only about one half of the total losses. Power losses in the control switch Q1 are given by; Synchronous FET The power loss equation for Q2 is approximated by; * Ploss = Pconduction + P + Poutput drive Ploss = Irms x Rds(on) + ( g x Vg x f ) Q ( 2 ) Ploss = Pconduction+ Pswitching+ Pdrive+ Poutput This can be expanded and approximated by; Q + oss x Vin x f + (Qrr x Vin x f ) 2 *dissipated primarily in Q1. For the synchronous MOSFET Q2, Rds(on) is an important characteristic; however, once again the importance of gate charge must not be overlooked since it impacts three critical areas. Under light load the MOSFET must still be turned on and off by the control IC so the gate drive losses become much more significant. Secondly, the output charge Qoss and reverse recovery charge Qrr both generate losses that are transfered to Q1 and increase the dissipation in that device. Thirdly, gate charge will impact the MOSFETs' susceptibility to Cdv/dt turn on. The drain of Q2 is connected to the switching node of the converter and therefore sees transitions between ground and Vin. As Q1 turns on and off there is a rate of change of drain voltage dV/dt which is capacitively coupled to the gate of Q2 and can induce a voltage spike on the gate that is sufficient to turn the MOSFET on, resulting in shoot-through current . The ratio of Qgd/Qgs1 must be minimized to reduce the potential for Cdv/dt turn on. Ploss = (Irms 2 x Rds(on ) ) Qgs 2 Qgd +I x x Vin x f + I x x Vin x f ig ig + (Qg x Vg x f ) + Qoss x Vin x f 2 This simplified loss equation includes the terms Qgs2 and Qoss which are new to Power MOSFET data sheets. Qgs2 is a sub element of traditional gate-source charge that is included in all MOSFET data sheets. The importance of splitting this gate-source charge into two sub elements, Qgs1 and Qgs2, can be seen from Fig 16. Qgs2 indicates the charge that must be supplied by the gate driver between the time that the threshold voltage has been reached and the time the drain current rises to Idmax at which time the drain voltage begins to change. Minimizing Q gs2 is a critical factor in reducing switching losses in Q1. Qoss is the charge that must be supplied to the output capacitance of the MOSFET during every switching cycle. Figure A shows how Qoss is formed by the parallel combination of the voltage dependant (nonlinear) capacitances Cds and Cdg when multiplied by the power supply input buss voltage. Figure A: Qoss Characteristic 10 www.irf.com IRF7335D1PBF SO-14 Package Details www.irf.com 11 IRF7335D1PBF SO-14 Tape and Reel Notes: Repetitive rating; pulse width limited by max. junction temperature. Pulse width 300 s; duty cycle 2%. When mounted on 1 inch square copper board. Combined Q1,Q2 IRMS @ Pwr Vout pins. Calculated continuous current based on max allowable junction temperature; switching or other losses will decrease RMS current capability Q1 and Q2 is tested 100% in production to 50mJ to stress and eliminate potentially defective parts. This is not a design for use value. Data and specifications subject to change without notice. This product has been designed and qualified for the Consumer market. Qualification Standards can be found on IR's Web site. IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information.08/2006 12 www.irf.com |
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