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| DN3145 N-Channel Depletion-Mode Vertical DMOS FETs Features High input impedance Low input capacitance Fast switching speeds Low on resistance Free from secondary breakdown Low input and output leakage General Description The Supertex DN3145 is a depletion-mode (normally-on) transistor utilizing an advanced vertical DMOS structure and Supertex's well-proven silicon-gate manufacturing process. This combination produces a device with the power handling capabilities of bipolar transistors and with the high input impedance and positive temperature coefficient inherent in MOS devices. Characteristic of all MOS structures, this device is free from thermal runaway and thermally-induced secondary breakdown. Supertex's vertical DMOS FETs are ideally suited to a wide range of switching and amplifying applications where high breakdown voltage, high input impedance, low input capacitance, and fast switching speeds are desired. Applications Normally-on switches Solid state relays Converters Constant current sources Power supply circuits Telecom Ordering Information BVDSX/ BVDGX 450V RDS(ON) (max) (min) IDSS Package Options TO-243AA1 DN3145N8 DN3145N8-G 60 120mA -G indicates package is RoHS compliant (`Green') Notes: 1Same as SOT-89. Product marking for TO-243AA: DN1M where = 2-week alpha date code Absolute Maximum Ratings Parameter Drain-to-source voltage Drain-to-gate voltage Gate-to-source voltage Operating and storage temperature Soldering temperature* Value BVDSX BVDGX 20V -55OC to +150OC 300OC Pin Configuration D Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. Continuous operation of the device at the absolute rating level may affect device reliability. All voltages are referenced to device ground. *Distance of 1.6mm from case for 10 seconds. G D S TO-243AA (top view) DN3145 Thermal Characteristics Package TO-243AA ID (continuous)1 100mA ID (pulsed) 300mA Power Dissipation @TA = 25OC 1.3W2 jc (OC/W) 34 ja (OC/W) 972 IDR1 100mA IDRM 300mA Notes: 1. ID (continuous) is limited by max rated Tj. 2. Mounted on FR4 board, 25mm x 25mm x 1.57mm. Significant PD increase possible on ceramic substrate. Electrical Characteristics (@25 C unless otherwise specified) O Symbol Parameter Min Typ Max Units Conditions BVDSX VGS(OFF) VGS(OFF) IGSS ID(OFF) IDSS RDS(ON) RDS(ON) GFS CISS COSS CRSS td(ON) tr td(OFF) tf VSD trr Drain-to-source breakdown voltage Gate-to-source OFF voltage Change in VGS(OFF) with temperature Gate body leakage current Drain-to-source leakage current Saturated drain-to-source current Static drain-to-source ON-state resistance Change in RDS(ON) with temperature Forward transconductance Input capacitance Common source output capacitance Reverse transfer capacitance Turn-ON delay time Rise time Turn-OFF delay time Fall time Diode forward voltage drop Reverse recovery time 450 -1.5 120 140 - 800 -3.5 4.5 100 1.0 1.0 60 1.1 120 15 10 10 15 20 35 1.8 - V V mV/ C nA A mA mA %/OC mmho pF O VGS = -5.0V, ID = 100A VDS = 15V, ID = 10A VDS = 15V, ID = 10A VGS = 20V, VDS = 0V VDS = Max rating, VGS = -5.0V VDS = 0.8 Max Rating, VGS = -5.0V, TA = 125OC VGS = 0V, VDS = 15V VGS = 0V, ID = 100mA VGS = 0V, ID = 100mA VDS = 10V, ID = 100mA VGS = -5.0V, VDS = 25V, f = 1.0MHz VDD = 25V, ID = 100mA, RGEN = 25, VGS = -5.0V, ISD = 100mA VGS = -5.0V, ISD = 100mA ns V ns Notes: 1.All D.C. parameters 100% tested at 25OC unless otherwise stated. (Pulse test: 300s pulse, 2% duty cycle.) 2.All A.C. parameters sample tested. Switching Waveforms and Test Circuit 0V VDD RL OUTPUT 90% INPUT -10V 10% t(ON) PULSE GENERATOR t(OFF) tr td(OFF) tF RGEN td(ON) VDD 10% 10% INPUT D.U.T. OUTPUT 0V 90% 90% 2 DN3145 3-Lead TO-243AA (SOT-89) Surface Mount Package (N8) 4.50 0.10 1.72 0.10 0.40 0.05 Exclusion Zone 1.50 0.10 4.10 0.15 2.45 0.15 2.21 0.08 No Vias/Traces in this area. Shape of pad may vary. 1.05 0.15 0.42 0.06 1.50 BSC 3.00 BSC 0.5 0.06 Top View Side View Bottom View Notes: All dimensions are in millimeters; all angles in degrees. (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to http://www.supertex.com/packaging.html.) Doc.# DSFP-DN3145 A012307 3 |
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