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High Common-Mode Voltage, Programmable Gain Difference Amplifier AD628
FEATURES
High common-mode input voltage range 120 V at VS = 15 V Gain range 0.1 to 100 Operating temperature range: -40C to +85C Supply voltage range Dual supply: 2.25 V to 18 V Single supply: 4.5 V to 36 V Excellent ac and dc performance Offset temperature stability RTI: 10 V/C maximum Offset: 1.5 V mV maximum CMRR RTI: 75 dB minimum, dc to 500 Hz, G = +1
FUNCTIONAL BLOCK DIAGRAM
REXT2 +VS
7 6
REXT1
RG
-IN 8
100k
10k G = +0.1 -IN A1 +IN 10k -IN A2 +IN
5
OUT
+IN 1
100k 10k
2 3 4
AD628
VREF
APPLICATIONS
High voltage current shunt sensing Programmable logic controllers Analog input front end signal conditioning +5 V, +10 V, 5 V, 10 V, and 4 to 20 mA Isolation Sensor signal conditioning Power supply monitoring Electrohydraulic controls Motor controls
CFILT
Figure 1.
130 120 110 100
CMRR (dB)
90 80 70 60 50 40 30 10 100
VS = 15V
GENERAL DESCRIPTION
The AD628 is a precision difference amplifier that combines excellent dc performance with high common-mode rejection over a wide range of frequencies. When used to scale high voltages, it allows simple conversion of standard control voltages or currents for use with single-supply ADCs. A wideband feedback loop minimizes distortion effects due to capacitor charging of - ADCs. A reference pin (VREF) provides a dc offset for converting bipolar to single-sided signals. The AD628 converts +5 V, +10 V, 5 V, 10 V, and 4 to 20 mA input signals to a single-ended output within the input range of single-supply ADCs. The AD628 has an input common mode and differential mode operating range of 120 V. The high common mode, input impedance makes the device well suited for high voltage measurements across a shunt resistor. The inverting input of the buffer amplifier is available for making a remote Kelvin connection.
VS = 2.5V
1k FREQUENCY (Hz)
10k
100k
Figure 2. CMRR vs. Frequency of the AD628
A precision 10 k resistor connected to an external pin is provided for either a low-pass filter or to attenuate large differential input signals. A single capacitor implements a lowpass filter. The AD628 operates from single and dual supplies and is available in an 8-lead SOIC_N or an 8-lead MSOP. It operates over the standard industrial temperature range of -40C to +85C.
Rev. G
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 (c)2002-2007 Analog Devices, Inc. All rights reserved.
02992-002
02992-001
-VS
AD628 TABLE OF CONTENTS
Features .............................................................................................. 1 Applications....................................................................................... 1 General Description ......................................................................... 1 Functional Block Diagram .............................................................. 1 Revision History ............................................................................... 2 Specifications..................................................................................... 3 Absolute Maximum Ratings............................................................ 7 Thermal Characteristics .............................................................. 7 ESD Caution.................................................................................. 7 Pin Configuration and Function Descriptions............................. 8 Typical Performance Characteristics ............................................. 9 Test Circuits..................................................................................... 13 Theory of Operation ...................................................................... 15 Applications Information .............................................................. 16 Gain Adjustment ........................................................................ 16 Input Voltage Range................................................................... 16 Voltage Level Conversion.......................................................... 17 Current Loop Receiver .............................................................. 18 Monitoring Battery Voltages..................................................... 18 Filter Capacitor Values............................................................... 19 Kelvin Connection ..................................................................... 19 Outline Dimensions ....................................................................... 20 Ordering Guide .......................................................................... 20
REVISION HISTORY
4/07--Rev. F to Rev. G Changes to Features.......................................................................... 1 Changes to Figure 22...................................................................... 11 Changes to Figure 25...................................................................... 13 Changes to Voltage Level Conversion Section............................ 17 Changes to Monitoring Battery Voltages Section ...................... 18 Changes to Figure 34...................................................................... 18 Changes to Figure 35...................................................................... 19 Updated Outline Dimensions ....................................................... 20 3/06--Rev. E to Rev. F Changes to Table 1............................................................................ 3 Changes to Figure 3.......................................................................... 7 Replaced Voltage Level Conversion Section ............................... 16 Changes to Figure 32 and Figure 33............................................. 17 Updated Outline Dimensions ....................................................... 19 Changes to Ordering Guide .......................................................... 19 5/05--Rev. D to Rev. E Changes to Table 1........................................................................... 3 Changes to Table 2........................................................................... 5 Changes to Figure 33..................................................................... 18 3/05--Rev. C to Rev. D Updated Format................................................................ Universal Changes to Table 1........................................................................... 3 Changes to Table 2........................................................................... 5 4/04--Rev. B to Rev. C Updated Format................................................................ Universal Changes to Specifications ............................................................... 3 Changes to Absolute Maximum Ratings...................................... 7 Changes to Figure 3......................................................................... 7 Changes to Figure 26..................................................................... 13 Changes to Figure 27..................................................................... 13 Changes to Theory of Operation................................................. 14 Changes to Figure 29..................................................................... 14 Changes to Table 5......................................................................... 15 Changes to Gain Adjustment Section......................................... 15 Added the Input Voltage Range Section..................................... 15 Added Figure 30 ............................................................................ 15 Added Figure 31 ............................................................................ 15 Changes to Voltage Level Conversion Section .......................... 16 Changes to Figure 32..................................................................... 16 Changes to Table 6......................................................................... 16 Changes to Figure 33 and Figure 34............................................ 17 Changes to Figure 35..................................................................... 18 Changes to Kelvin Connection Section...................................... 18 6/03--Rev. A to Rev. B Changes to General Description ................................................... 1 Changes to Specifications............................................................... 2 Changes to Ordering Guide ........................................................... 4 Changes to TPCs 4, 5, and 6 .......................................................... 5 Changes to TPC 9............................................................................ 6 Updated Outline Dimensions...................................................... 14 1/03--Rev. 0 to Rev. A Change to Ordering Guide............................................................. 4 11/02--Rev. 0: Initial Version
Rev. G | Page 2 of 20
AD628 SPECIFICATIONS
TA = 25C, VS = 15 V, RL = 2 k, REXT1 = 10 k, REXT2 = , VREF = 0 V, unless otherwise noted. Table 1.
Parameter DIFFERENTIAL AND OUTPUT AMPLIFIER Gain Equation Gain Range Offset Voltage vs. Temperature CMRR 3 Conditions G = +0.1 (1 + REXT1/REXT2) See Figure 29 VCM = 0 V; RTI of input pins 2 ; output amplifier G = +1 RTI of input pins; G = +0.1 to +100 500 Hz -40C to +85C VS = 10 V to 18 V Min AD628AR Typ Max Min AD628ARM Typ Max Unit V/V V/V mV V/C dB dB dB (V/V)/C dB V V kHz kHz s V/s nV/Hz V p-p V/V % ppm/C ppm ppm mV V/C k k dB dB dB (V/V)/C k %
0.1 1 -1.5 4 75 75 70 77 -120 -120 1 94
100 +1.5 8
0.11 -1.5 4 75 75 70
100 +1.5 8
Minimum CMRR Over Temperature vs. Temperature PSRR (RTI) Input Voltage Range Common Mode Differential Dynamic Response Small Signal Bandwidth -3 dB Full Power Bandwidth Settling Time Slew Rate Noise (RTI) Spectral Density DIFFERENTIAL AMPLIFIER Gain Error vs. Temperature Nonlinearity vs. Temperature Offset Voltage vs. Temperature Input Impedance Differential Common Mode CMRR 4
4 77 +120 +120 -120 -120
1 94
4
+120 +120 600 5
G = +0.1 G = +0.1, to 0.01%, 100 V step
600 5 40 0.3
40 0.3 300 15 0.1 +0.01
1 kHz 0.1 Hz to 10 Hz
300 15 0.1 +0.01
-0.1
3 RTI of input pins -1.5
+0.1 5 5 10 +1.5 8
-0.1
3 -1.5
+0.1 5 5 10 +1.5 8
220 55 75 75 70 1 10 -0.1 4 +0.1 -0.1 75 75 70
220 55
RTI of input pins; G = +0.1 to +100 500 Hz Minimum CMRR Over Temperature -40C to +85C vs. Temperature Output Resistance Error
1 10
4 +0.1
Rev. G | Page 3 of 20
AD628
Parameter OUTPUT AMPLIFIER Gain Equation Nonlinearity Offset Voltage vs. Temperature Output Voltage Swing Bias Current Offset Current CMRR Open-Loop Gain POWER SUPPLY Operating Range Quiescent Current TEMPERATURE RANGE
1 2
Conditions G = (1 + REXT1/REXT2) G = +1, VOUT = 10 V RTI of output amp RL = 10 k RL = 2 k
Min
AD628AR Typ Max
Min
AD628ARM Typ Max
Unit V/V ppm mV V/C V V nA nA dB dB V mA C
-0.15 -14.2 -13.8 1.5 0.2
0.5 +0.15 0.6 +14.1 +13.6 3 0.5
-0.15 -14.2 -13.8 1.5 0.2 130 130
0.5 +0.15 0.6 +14.1 +13.6 3 0.5
VCM = 13 V VOUT = 13 V
130 130 2.25 -40 18 1.6 +85
2.25 -40
18 1.6 +85
To use a lower gain, see the Gain Adjustment section. The addition of the difference amplifier and output amplifier offset voltage does not exceed this specification. (0.1)(VCM ) 3 Error due to common mode as seen at the output: VOUT = x [Output Amplifier Gain] . 75 10 20
4
(0.1)(VCM ) Error due to common mode as seen at the output of A1: VOUT A1 = . 75 10 20
Rev. G | Page 4 of 20
AD628
TA = 25C, VS = 5 V, RL = 2 k, REXT1 = 10 k, REXT2 = , VREF = 2.5 V, unless otherwise noted. Table 2.
Parameter DIFFERENTIAL AND OUTPUT AMPLIFIER Gain Equation Gain Range Offset Voltage vs. Temperature CMRR 3 Minimum CMRR Over Temperature vs. Temperature PSRR (RTI) Input Voltage Range Common Mode 4 Differential Dynamic Response Small Signal Bandwidth - 3 dB Full Power Bandwidth Settling Time Slew Rate Noise (RTI) Spectral Density DIFFERENTIAL AMPLIFIER Gain Error Nonlinearity vs. Temperature Offset Voltage vs. Temperature Input Impedance Differential Common Mode CMRR 5 Minimum CMRR Over Temperature vs. Temperature Output Resistance Error OUTPUT AMPLIFIER Gain Equation Nonlinearity Output Offset Voltage vs. Temperature Output Voltage Swing Bias Current Offset Current CMRR Open-Loop Gain Conditions G = +0.1(1+ REXT1/REXT2) See Figure 29 VCM = 2.25 V; RTI of input pins 2 ; output amplifier G = +1 RTI of input pins; G = +0.1 to +100 500 Hz -40C to +85C VS = 4.5 V to 10 V Min AD628AR Typ Max Min AD628ARM Typ Max Unit V/V V/V mV V/C dB dB dB (V/V)/C dB V V kHz kHz s V/s nV/Hz V p-p V/V % ppm ppm mV V/C k k dB dB dB (V/V)/C k % V/V ppm mV V/C V V nA nA dB dB
0.1 1 -3.0 6 75 75 70 77 -12 -15 1 94
100 +3.0 15
0.11 -3.0 6 75 75 70
100 +3.0 15
4 77 +17 +15 -12 -15
1 94
4
+17 +15 440 30 15 0.3 350 15 0.1 +0.01 3
G = +0.1 G = +0.1; to 0.01%, 30 V step
440 30 15 0.3 350 15 0.1 +0.01 3
1 kHz 0.1 Hz to 10 Hz
-0.1
RTI of input pins
-2.5
+0.1 3 10 +2.5 10
-0.1
-2.5
+0.1 3 10 +2.5 10
220 55 RTI of input pins; G = +0.1 to +100 500 Hz -40C to +85C 75 75 70 1 10 -0.1 G = (1 + REXT1/REXT2) G = +1, VOUT = 1 V to 4 V RTI of output amplifier RL = 10 k RL = 2 k 4 +0.1 -0.1 75 75 70
220 55
1 10
4 +0.1
-0.15 0.9 1 1.5 0.2
0.5 +0.15 0.6 4.1 4 3 0.5
-0.15 0.9 1 1.5 0.2 130 130
0.5 +0.15 0.6 4.1 4 3 0.5
VCM = 1 V to 4 V VOUT = 1 V to 4 V
Rev. G | Page 5 of 20
130 130
AD628
Parameter POWER SUPPLY Operating Range Quiescent Current TEMPERATURE RANGE
1 2
Conditions
Min 2.25 -40
AD628AR Typ Max +36 1.6 +85
Min
AD628ARM Typ Max +36 1.6 +85
Unit V mA C
2.25 -40
To use a lower gain, see the Gain Adjustment section. The addition of the difference amplifier and output amplifier offset voltage does not exceed this specification. (0.1)(VCM ) 3 Error due to common mode as seen at the output: VOUT = x [Output Amplifier Gain] . 75 10 20 4 Greater values of voltage are possible with greater or lesser values of VREF. (0.1)(VCM ) 5 Error due to common mode as seen at the output of A1: VOUT A1 = . 75 10 20
Rev. G | Page 6 of 20
AD628 ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter Supply Voltage Internal Power Dissipation Input Voltage (Common Mode) Differential Input Voltage Output Short-Circuit Duration Storage Temperature Range Operating Temperature Range Lead Temperature (Soldering, 10 sec)
1
Rating 18 V See Figure 3 120 V 1 120 V1 Indefinite -65C to +125C -40C to +85C 300C
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
THERMAL CHARACTERISTICS
1.6 TJ = 150C 1.4
When using 12 V supplies or higher, see the Input Voltage Range section.
POWER DISSIPATION (W)
1.2 8-LEAD MSOP PACKAGE 1.0 0.8 0.6 0.4 0.2 0 -60 MSOP JA (JEDEC; 4-LAYER BOARD) = 132.54C/W SOIC JA (JEDEC; 4-LAYER BOARD) = 154C/W -40 -20 0 20 40 60 80 100
02992-003
8-LEAD SOIC PACKAGE
AMBIENT TEMPERATURE (C)
Figure 3. Maximum Power Dissipation vs. Temperature
ESD CAUTION
Rev. G | Page 7 of 20
AD628 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
+IN 1 -VS 2
8
-IN +VS
02992-004
AD628
7
TOP VIEW VREF 3 (Not to Scale) 6 RG CFILT 4
5
OUT
Figure 4. Pin Configuration
Table 4. Pin Function Descriptions
Pin No. 1 2 3 4 5 6 7 8 Mnemonic +IN -VS VREF CFILT OUT RG +VS -IN Description Noninverting Input Negative Supply Voltage Reference Voltage Input Filter Capacitor Connection Amplifier Output Output Amplifier Inverting Input Positive Supply Voltage Inverting Input
Rev. G | Page 8 of 20
AD628 TYPICAL PERFORMANCE CHARACTERISTICS
40 8440 UNITS 35 30 25 20 15 10 5 0 -1.6
120 100 140 G = +0.1
% OF UNITS
PSRR (dB)
80 -15V 60 +2.5V 40 20 0 0.1 +15V
INPUT OFFSET VOLTAGE (mV)
02992-005
-1.2
-0.8
-0.4
0
0.4
0.8
1.2
1.6
2.0
FREQUENCY (Hz)
Figure 5. Typical Distribution of Input Offset Voltage, VS = 15 V, SOIC_N Package
25 8440 UNITS 20 1000
Figure 8. PSRR vs. Frequency, Single and Dual Supplies
% OF UNITS
15
10
5
VOLTAGE NOISE DENSITY (nV/Hz)
-78
-82
-86
-90
-94
-98
-102
-106
-110
02992-006
1
10
100
1k
10k
100k
CMRR (dB)
FREQUENCY (Hz)
Figure 6. Typical Distribution of CMRR, SOIC_N Package
130 120 110 100
VOLTAGE NOISE DENSITY (nV/Hz)
Figure 9. Voltage Noise Spectral Density, RTI, VS = 15 V
1000
CMRR (dB)
90 80 70 60 50 40 10 100
VS = 15V
VS = 2.5V
1k FREQUENCY (Hz)
10k
100k
02992-007
1
10
100
1k
10k
100k
FREQUENCY (Hz)
Figure 7. CMRR vs. Frequency
Figure 10. Voltage Noise Spectral Density, RTI, VS = 2.5 V
Rev. G | Page 9 of 20
02992-010
30
100
02992-009
0 -74
100
02992-008
1
10
100
1k
10k
100k
1M
AD628
40
1s
100 90
9638 UNITS 35 30
NOISE (5V/DIV)
% OF DEVICES
10 0
25 20 15 10 5
02992-011
0
1
2
3
4
5
6
7
8
9
10
TIME (Seconds)
GAIN ERROR (ppm)
Figure 11. 0.1 Hz to 10 Hz Voltage Noise, RTI
60 50
Figure 14. Typical Distribution of +1 Gain Error
150 UPPER CMV LIMIT
COMMON-MODE VOLTAGE (V)
40 30
G = +100
100 -40C 50 +85C 0 +25C VREF = 0V
GAIN (dB)
20 10 0 -10 -20 -30
G = +10
G = +1
-50 +85C
-40C
G = +0.1
-100
LOWER CMV LIMIT
02992-012
1k
10k
100k
1M
10M
0
5
10 VS (V)
15
20
FREQUENCY (Hz)
Figure 12. Small Signal Frequency Response, VOUT = 200 mV p-p, G = +0.1, +1, +10, and +100
60 50 40 30 G = +100
100 90
Figure 15. Common-Mode Operating Range vs. Power Supply Voltage for Three Temperatures
500V
VS = 15V RL = 1k
GAIN (dB)
20 10 0 -10 -20 -30 10
G = +10
OUTPUT ERROR (V)
RL = 2k
G = +1
RL = 10k
10 0
G = +0.1
4.0V
02992-016
100
1k
10k
100k
1M
02992-013
-40 FREQUENCY (Hz)
OUTPUT VOLTAGE (V)
Figure 13. Large Signal Frequency Response, VOUT = 20 V p-p, G = +0.1, +1, +10, and +100
Figure 16. Normalized Gain Error vs. VOUT, VS = 15 V
Rev. G | Page 10 of 20
02992-015
-40 100
-150
02992-014
0
5
10
0
AD628
100V
100 90
VS = 2.5V RL = 1k
100 90
500mV
OUTPUT ERROR (V)
RL = 2k
RL = 10k
10 0 10 0
500mV OUTPUT VOLTAGE (V)
02992-017
Figure 17. Normalized Gain Error vs. VOUT, VS = 2.5 V
4
Figure 20. Small Signal Pulse Response, RL = 2 k, CL = 0 pF, Top: Input, Bottom: Output
500mV
100
3
90
BIAS CURRENT (nA)
2
10
1
0
0 -40
-20
0
20 40 TEMPERATURE (C)
60
80
100
02992-018
Figure 18. Bias Current vs. Temperature Buffer
15 -40C 10 -25C +85C 5 +25C
Figure 21. Small Signal Pulse Response, RL = 2 k, CL = 1000 pF, Top: Input, Bottom: Output
OUTPUT VOLTAGE SWING (V)
100 90
10.0V
0 -40C -5 +85C -10 +25C -25C
10.0V
10 0
0
5
10 15 OUTPUT CURRENT (mA)
20
25
Figure 19. Output Voltage Operating Range vs. Output Current
02992-019
-15
Figure 22. Large Signal Pulse Response, RL = 2 k, CL = 1000 pF, Top: Input, Bottom: Output
Rev. G | Page 11 of 20
02992-022
40s
02992-021
50mV
4s
02992-020
50mV
4s
AD628
100 90
100 90
5V
5V
10mV
10 0
02992-023
10mV
10 0
Figure 23. Settling Time to 0.01%, 0 V to 10 V Step
Figure 24. Settling Time to 0.01% 0 V to -10 V Step
Rev. G | Page 12 of 20
02992-024
100s
100s
AD628 TEST CIRCUITS
HP3589A SPECTRUM ANALYZER
+VS
7
-IN
8
10k
10k +IN
5
- OUT
100k -IN G = +0.1 +IN
AD829
+ G = +100
-IN
FET PROBE
+IN
1
100k 10k VREF CFILT
2 4 6
AD628
RG
3
-
-VS
02992-025
OP177
+
Figure 25. CMRR vs. Frequency
SCOPE
+VS
7
1 VAC +15V
-IN
8
10k
10k
G = +100 +IN OUT
5
G = +100 20 +
100k -IN G = +0.1 +IN
AD829
-
-IN
1
+IN 100k
10k
AD628
2 4 6
VREF
3
CFILT
RG
02992-026
-VS
Figure 26. PSRR vs. Frequency
Rev. G | Page 13 of 20
AD628
HP3561A SPECTRUM ANALYZER +VS
7
CFILT
4
-IN
8
100k
10k
10k
+IN
5
OUT
+IN
1
100k
-IN G = +0.1 +IN 10k
-IN
AD628
6
VREF
3
2
RG
-VS 10k
10k
Figure 27. Noise Tests
Rev. G | Page 14 of 20
02992-027
AD628 THEORY OF OPERATION
The AD628 is a high common-mode voltage difference amplifier, combined with a user-configurable output amplifier (see Figure 28 and Figure 29). Differential mode voltages in excess of 120 V are accurately scaled by a precision 11:1 voltage divider at the input. A reference voltage input is available to the user at Pin 3 (VREF). The output common-mode voltage of the difference amplifier is the same as the voltage applied to the reference pin. If the uncommitted amplifier is configured for gain, connect Pin 3 to one end of the external gain resistor to establish the output common-mode voltage at Pin 5 (OUT). The output of the difference amplifier is internally connected to a 10 k resistor trimmed to better than 0.1% absolute accuracy. The resistor is connected to the noninverting input of the output amplifier and is accessible at Pin 4 (CFILT). A capacitor can be connected to implement a low-pass filter, a resistor can be connected to further reduce the output voltage, or a clamp circuit can be connected to limit the output swing. The uncommitted amplifier is a high open-loop gain, low offset, low drift op amp, with its noninverting input connected to the internal 10 k resistor. Both inputs are accessible to the user. Careful layout design has resulted in exceptional commonmode rejection at higher frequencies. The inputs are connected to Pin 1 (+IN) and Pin 8 (-IN), which are adjacent to the power pins, Pin 2 (-VS) and Pin 7 (+VS). Because the power pins are at ac ground, input impedance balance and, therefore, commonmode rejection are preserved at higher frequencies.
RG
6
-IN 8
100k
10k G = +0.1 -IN A1 +IN 10k -IN A2 +IN
5
OUT
+IN 1
100k 10k
3 4
02992-028
VREF
CFILT
Figure 28. Simplified Schematic
CFILT +VS
7 4
AD628
-IN 8 100k 10k G = +0.1 -IN A1 +IN +IN 1 100k 10k
2 3 6
10k
+IN A2 -IN
5
OUT
-VS
VREF
RG
REXT3
02992-029
REFERENCE VOLTAGE
REXT2
REXT1
Figure 29. Circuit Connections
Rev. G | Page 15 of 20
AD628 APPLICATIONS INFORMATION
GAIN ADJUSTMENT
The AD628 system gain is provided by an architecture consisting of two amplifiers (see Figure 29). The gain of the input stage is fixed at 0.1; the output buffer is user adjustable as GA2 = 1 + REXT1/REXT2. The system gain is then
INPUT VOLTAGE RANGE
VREF and the supply voltage determine the common-mode input voltage range. The relation is expressed by VCMUPPER 11 (VS + - 1.2 V) - 10 VREF (2)
GTOTAL
R = 0.1 x 1 + EXT1 R EXT2
VCMLOWER 11 (VS - + 1.2 V) - 10 VREF
(1)
where: VS+ is the positive supply. VS- is the negative supply. 1.2 V is the headroom needed for suitable performance. Equation 2 provides a general formula for calculating the common-mode input voltage range. However, keep the AD628 within the maximum limits listed in Table 1 to maintain optimal performance. This is illustrated in Figure 30 where the maximum common-mode input voltage is limited to 120 V. Figure 31 shows the common-mode input voltage bounds for single-supply voltages.
200 150 100 50 0 -50 -100 -150 -200 MAXIMUM INPUT COMMON-MODE VOLTAGE WHEN VREF = GND
At a 2 nA maximum, the input bias current of the buffer amplifier is very low and any offset voltage induced at the buffer amplifier by its bias current may be neglected (2 nA x 10 k = 20 V). However, to absolutely minimize bias current effects, select REXT1 and REXT2 so that their parallel combination is 10 k. If practical resistor values force the parallel combination of REXT1 and REXT2 below 10 k, add a series resistor (REXT3) to make up for the difference. Table 5 lists several values of gain and corresponding resistor values.
Table 5. Nearest Standard 1% Resistor Values for Various Gains (see Figure 29)
Total Gain (V/V) 0.1 0.2 0.25 0.5 1 2 5 10 A2 Gain (V/V) 1 2 2.5 5 10 20 50 100 REXT1 () 10 k 20 k 25.9 k 49.9 k 100 k 200 k 499 k 1M REXT2 () 20 k 18.7 k 12.4 k 11 k 10.5 k 10.2 k 10.2 k REXT3 () 0 0 0 0 0 0 0 0
INPUT COMMON-MODE VOLTAGE (V)
0
2
4
6
8
10
12
14
16
To set the system gain to <0.1, create an attenuator by placing Resistor REXT4 from Pin 4 (CFILT) to the reference voltage. A divider is formed by the 10 k resistor that is in series with the positive input of A2 and Resistor REXT4. A2 is configured for unity gain. Using a divider and setting A2 to unity gain yields
REXT4 GW / DIVIDER = 0.1 x 10 k + R EXT4 x1
INPUT COMMON-MODE VOLTAGE (V)
SUPPLY VOLTAGE (V)
Figure 30. Input Common-Mode Voltage vs. Supply Voltage for Dual Supplies
100 80 60 40 20 0 -20 -40 -60 -80 MAXIMUM INPUT COMMON-MODE VOLTAGE WHEN VREF = MIDSUPPLY
0
2
4
6
8
10
12
14
16
SINGLE-SUPPLY VOLTAGE (V)
Figure 31. Input Common-Mode Voltage vs. Supply Voltage for Single Supplies
Rev. G | Page 16 of 20
02992-034
02992-035
AD628
The differential input voltage range is constrained to the linear operation of the internal amplifiers, A1 and A2. The voltage applied to the inputs of A1 and A2 should be between VS- + 1.2 V and VS+ - 1.2 V. Similarly, the outputs of A1 and A2 should be kept between VS- + 0.9 V and VS+ - 0.9 V. Designing such an application can be done in a few simple steps, which includes the following:
*
VOLTAGE LEVEL CONVERSION
Industrial signal conditioning and control applications typically require connections between remote sensors or amplifiers and centrally located control modules. Signal conditioners provide output voltages of up to 10 V full scale. However, ADCs or microprocessors operating on single 3.3 V to 5 V logic supplies are now the norm. Thus, the controller voltages require further reduction in amplitude and reference. Furthermore, voltage potentials between locations are seldom compatible, and power line peaks and surges can generate destructive energy between utility grids. The AD628 offers an ideal solution to both problems. It attenuates otherwise destructive signal voltage peaks and surges by a factor of 10 and shifts the differential input signal to the desired output voltage. Conversion from voltage-driven or current-loop systems is easily accomplished using the circuit shown in Figure 32. This shows a circuit for converting inputs of various polarities and amplitudes to the input of a single-supply ADC. To adjust common-mode output voltage, connect Pin 3 (VREF) and the lower end of the 10 k resistor to the desired voltage. The output common-mode voltage is the same as the reference voltage.
*
Determine the required gain. For example, if the input voltage must be changed from 10 V to +5 V, the gain now needs to be +5/+20 or +0.25. Determine if the circuit common-mode voltage should be changed. An AD7940 ADC is illustrated for this example. When operating from a 5 V supply, the common-mode voltage of the AD7940 is half the supply, or 2.5 V. If the AD628 reference pin and the lower terminal of the 10 k resistor are connected to a 2.5 V voltage source, the output common-mode voltage is 2.5 V.
Table 6 shows resistor and reference values for commonly used single-supply converter voltages. REXT3 is included as an option to balance the source impedance into A2. This is described in more detail in the Gain Adjustment section.
Table 6. Nearest 1% Resistor Values for Voltage Level Conversion Applications
Input Voltage (V) 10 5 +10 +5 10 5 +10 +5 ADC Supply Voltage (V) 5 5 5 5 3 3 3 3 Desired Output Voltage (V) 2.5 2.5 2.5 2.5 1.25 1.25 1.25 1.25 VREF (V) 2.5 2.5 0 0 1.25 1.25 0 0 REXT1 (k) 15 39.7 39.7 89.8 2.49 15 15 39.7 REXT2 k) 10 10 10 10 10 10 10 10
+12V 0.1F 7 100k 10F 2
-12V 0.1F 10F
-IN 8 10V
+VS 10k A1 10k
-VS
AD628
SCLK 4 OUT A2 5 49.9 33nF CFILT 15nF 4 6 RG 3 VIN
SERIAL DATA
+IN 1 100k
AD7940 SDATA 5
GND 2 VDD CS 6 1 0.1F VOUT 10F VIN
10k VREF 3
REXT1 15k
6
2 REF195 3 4
+12V
REXT2 10k AD628 REFERENCE VOLTAGE 1 AD8606 1/2
2 3
7
8 5 AD8606 2/2 6 4
10F
0.1F
10k 10k
02992-030
Figure 32. Level Shifter
Rev. G | Page 17 of 20
AD628
CURRENT LOOP RECEIVER
Analog data transmitted on a 4 to 20 mA current loop can be detected with the receiver shown in Figure 33. The AD628 is an ideal choice for such a function because the current loop is driven with a compliance voltage sufficient to stabilize the loop, and the resultant common-mode voltage often exceeds commonly used supply voltages. Note that with large shunt values, a resistance of equal value must be inserted in series with the inverting input to compensate for an error at the noninverting input.
MONITORING BATTERY VOLTAGES
Figure 34 illustrates how the AD628 is used to monitor a battery charger. Voltages approximately eight times the power supply voltage can be applied to the input with no damage. The resistor divider action is well suited for the measurement of many power supply applications, such as those found in battery chargers or similar equipment. For proper operation, the common-mode voltage must satisfy the input specifications in Table 1, as well as Equation 2.
VCM = 15V
3
+15V -15V
7 2 4
10k 249 100k 10k
AD628
1
5
0V TO 5V TO ADC
249
8
100k
10k
6
I = 4 TO 20mA +2.5V
210k
100k 9.53k
02992-031
Figure 33. Level Shifter for 4 to 20 mA Current Loop
+5V
nVBAT (V)
-IN
100k
10k
10k
+IN A2 -IN
OUT
TO ADC REXT1 10k
CHARGING CIRCUIT +1.5V BATTERY +IN 100k
-IN +IN
G = +0.1
A1
RG
OTHER BATTERIES IN CHARGING CIRCUIT
10k
AD628
02992-032
-5V
VREF
CFILT
Figure 34. Battery Voltage Monitor
Rev. G | Page 18 of 20
AD628
FILTER CAPACITOR VALUES
Connect a capacitor to Pin 4 (CFILT) to implement a low-pass filter. The capacitor value is C = 15.9/ft (F) where ft is the desired 3 dB filter frequency. Table 7 shows several frequencies and their closest standard capacitor values.
Table 7. Capacitor Values for Various Filter Frequencies
Frequency (Hz) 10 50 60 100 400 1k 5k 10 k Capacitor Value (F) 1.5 0.33 0.27 0.15 0.039 0.015 0.0033 0.0015
KELVIN CONNECTION
In certain applications, it may be desirable to connect the inverting input of an amplifier to a remote reference point. This eliminates errors resulting in circuit losses in interconnecting wiring. The AD628 is particularly suited for this type of connection. In Figure 35, a 10 k resistor added in the feedback matches the source impedance of A2. This is described in more detail in the Gain Adjustment section.
+VS
-IN
100k
10k
10k +IN A2 -IN OUT
CIRCUIT LOSS
-IN +IN 100k +IN 10k
G = +0.1 A1
RG
10k LOAD
AD628
-VS VREF VS /2 CFILT
02992-033
Figure 35. Kelvin Connection
Rev. G | Page 19 of 20
AD628 OUTLINE DIMENSIONS
3.20 3.00 2.80 3.20 3.00 2.80 PIN 1 0.65 BSC 0.95 0.85 0.75 0.15 0.00 0.38 0.22 SEATING PLANE 1.10 MAX 8 0 0.80 0.60 0.40
8 5
1
5.15 4.90 4.65
4
0.23 0.08
COPLANARITY 0.10
COMPLIANT TO JEDEC STANDARDS MO-187-AA
Figure 36. 8-Lead Mini Small Outline Package [MSOP] (RM-8) Dimensions shown in millimeters
5.00 (0.1968) 4.80 (0.1890)
4.00 (0.1574) 3.80 (0.1497)
8 1
5 4
6.20 (0.2441) 5.80 (0.2284)
1.27 (0.0500) BSC 0.25 (0.0098) 0.10 (0.0040) COPLANARITY 0.10 SEATING PLANE
1.75 (0.0688) 1.35 (0.0532)
0.50 (0.0196) 0.25 (0.0099) 8 0 0.25 (0.0098) 0.17 (0.0067) 1.27 (0.0500) 0.40 (0.0157)
45
0.51 (0.0201) 0.31 (0.0122)
COMPLIANT TO JEDEC STANDARDS MS-012-A A CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
Figure 37. 8-Lead Standard Small Outline Package [SOIC_N] Narrow Body (R-8) Dimensions shown in millimeters and (inches)
ORDERING GUIDE
Model AD628AR AD628AR-REEL AD628AR-REEL7 AD628ARZ 1 AD628ARZ-RL1 AD628ARZ-R71 AD628ARM AD628ARM-REEL AD628ARM-REEL7 AD628ARMZ1 AD628ARMZ-RL1 AD628ARMZ-R71 AD628-EVAL
1
Temperature Range -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C
Description 8-Lead SOIC_N 8-Lead SOIC_N 13" Reel 8-Lead SOIC_N 7" Reel 8-Lead SOIC_N 8-Lead SOIC_N 13" Reel 8-Lead SOIC_N 7" Reel 8-Lead MSOP 8-Lead MSOP 13" Reel 8-Lead MSOP 7" Reel 8-Lead MSOP 8-Lead MSOP 13" Reel 8-Lead MSOP 7" Reel Evaluation Board
Package Option R-8 R-8 R-8 R-8 R-8 R-8 RM-8 RM-8 RM-8 RM-8 RM-8 RM-8
012407-A
Branding
JGA JGA JGA JGZ JGZ JGZ
Z = RoHS Compliant Part.
(c)2002-2007 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. C02992-0-4/07(G)
Rev. G | Page 20 of 20

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