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| CXG1194UR SP4T Antenna Switch for GSM Description The CXG1194UR is a high power SP4T antenna switch for GSM applications. The low insertion loss on transmit means increased talk time as the Tx power amplifier can be operated at a lower output level. Onchip logic reduces component count and simplifies the PCB layout by allowing direct connection of the switch to digital baseband control lines with the CMOS logic levels. This switch is SP4T, one antenna can be routed to either of the 2Tx or 2Rx ports. It requires 2 CMOS control lines. The Sony GaAs JPHEMT MMIC process is used for low insertion loss. Features * Insertion loss (Tx): 14 pin UQFN (Plastic) 0.35dB (Typ.) at 34dBm (GSM900) 0.45dB (Typ.) at 32dBm (GSM1800) * Small package size: 14-pin UQFN (2.5mm x 2.5mm x 0.6mm (Max.)) Applications * GSM dual-band handsets * GSM/UMTS dual-mode handsets Structure GaAs JPHEMT MMIC Absolute Maximum Ratings * Bias voltage VDD * Control voltage Vctl * Input power max. (ANT, RF1, RF4) * Input power max. (RF2, RF3) * Operating temperature * Storage temperature 7V (Ta = 25C) 5V (Ta = 25C) 37dBm (Ta = 25C) 15dBm (Ta = 25C) -35 to +85 C -65 to +150 C GaAs MMICs are ESD sensitive devices. Special handling precautions are required. The actual ESD test data will be available later. Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits. -1- E04712-PS CXG1194UR Block Diagram ANT F1 F5 RF1 (Tx) F6 F2 RF2 (Rx) RF3 (Rx) F7 F3 F8 F4 RF4 (Tx) Pin Configuration GND GND 4 RF3 RF4 5 7 6 GND 8 3 VDD RF2 9 2 CTLA GND 10 1 CTLB 11 RF1 12 GND 13 ANT 14 GND -2- CXG1194UR Truth Table Path ANT - RF1 ANT - RF2 ANT - RF3 ANT - RF4 CTLA L H L H CTLB L L H H F1 ON OFF F2 ON F3 F4 F5 ON ON ON F6 ON OFF ON ON F7 ON ON OFF ON F8 ON ON ON OFF OFF OFF OFF OFF OFF OFF ON OFF ON OFF OFF OFF OFF OFF Electrical Characteristics Item Symbol Port ANT - RF1 ANT - RF2 Insertion loss IL ANT - RF3 ANT - RF4 ANT - RF1 ANT - RF2 Isolation ISO. ANT - RF3 ANT - RF4 VSWR VSWR 2fo 3fo 2fo Harmonics 3fo 2fo 3fo 2fo 3fo P1dB compression input power Control current Supply current P1dB Ictl IDD -3- ANT - RF1, 4 ANT - RF1, 4 ANT - RF4 2 1 2 Vctl = 2.8V VDD = 2.8V 36 34 15 ANT - RF1 2 1 Condition 824 to 960MHz 1710 to 1990MHz 824 to 960MHz 1710 to 1990MHz 824 to 960MHz 1710 to 1990MHz 824 to 960MHz 1710 to 1990MHz 824 to 960MHz 1710 to 1990MHz 824 to 960MHz 1710 to 1990MHz 824 to 960MHz 1710 to 1990MHz 824 to 960MHz 1710 to 1990MHz 824 to 960MHz 1710 to 1990MHz 1 25 22 30 25 30 25 30 25 (Ta = 25C) Min. Typ. Max. Unit 0.35 0.50 0.45 0.65 0.45 0.60 0.55 0.70 0.45 0.60 0.55 0.70 0.35 0.50 0.45 0.65 30 26 35 30 35 30 35 30 1.2 1.2 -33 -34 -35 -37 -34 -35 -35 -38 dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB -- -- -28 dBm -28 dBm -30 dBm -33 dBm -30 dBm -30 dBm -30 dBm -34 dBm dBm dBm 40 A mA 0.12 0.23 CXG1194UR Electrical Characteristics are measured with all the RF ports terminated in 50. Harmonics measured with Tx inputs harmonically matched. It is recommended that the harmonic matching is used to ensure optimum performance. 1 Pin = 34dBm, 824 to 915MHz, VDD = 2.8V 2 Pin = 32dBm, 1710 to 1910MHz, VDD = 2.8V DC Bias Condition Item Vctl (H) Vctl (L) VDD Min. 2.0 0 2.6 Typ. 2.8 -- 2.8 Max. 3.6 0.4 3.6 (Ta = 25C) Unit V V V -4- CXG1194UR Recommended Circuit RF3 GND CRF 7 6 RF4 GND CRF 5 4 GND 8 3 VDD Cbypass CTLA Cbypass CTLB Cbypass RF2 CRF GND 9 2 10 1 11 12 CRF GND 13 14 CRF GND RF1 ANT When using this IC, the following external components should be used: CRF: This capacitor is used for RF decoupling and must be used all applications. Cbypass: This capacitor is used for DC line filtering. 100pF is recommended. -5- CXG1194UR Package Outline Unit: mm 14PIN UQFN (PLASTIC) x4 0.05 0.4 0.08 0.55 0.05 8 7 A B 1.1 S A-B C 2.5 10 11 C 4-R0.2 14 1 3 4 8-C0.1 PIN 1 INDEX 0.5 0.05 M S S A-B C 2.5 0.24 0.1 MIN 0.018 MAX S 0.1 Solder Plating 0.05 0.23 0.025 +0.09 0.24 -0.03 S TERMINAL SECTION Note:Cutting burr of lead are 0.05mm MAX. PACKAGE STRUCTURE PACKAGE MATERIAL EPOXY RESIN SOLDER PLATING COPPER ALLOY 0.02g SONY CODE EIAJ CODE JEDEC CODE UQFN-14P-01 LEAD TREATMENT LEAD MATERIAL PACKAGE MASS LEAD PLATING SPECIFICATIONS ITEM LEAD MATERIAL SOLDER COMPOSITION PLATING THICKNESS SPEC. COPPER ALLOY Sn-Bi Bi:1-4wt% 5-18m -6- Sony Corporation |
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