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74AC541, 74ACT541 -- Octal Buffer/Line Driver with 3-STATE Outputs
January 2008
74AC541, 74ACT541 Octal Buffer/Line Driver with 3-STATE Outputs
Features
ICC and IOZ reduced by 50% 3-STATE outputs Inputs and outputs opposite side of package, allowing
General Description
The 74AC541 and 74ACT541 are octal buffer/line drivers designed to be employed as memory and address drivers, clock drivers and bus oriented transmitter/ receivers. These devices are similar in function to the 74AC244 and 74ACTC244 while providing flow-through architecture (inputs on opposite side from outputs). This pinout arrangement makes these devices especially useful as an output port for microprocessors, allowing ease of layout and greater PC board density.
easier interface to microprocessors Output source/sink 24mA 74AC541 is a non-inverting option of the 74AC540 74ACT541 has TTL-compatible inputs
Ordering Information
Order Number
74AC541SC 74AC541SJ 74AC541MTC 74AC541PC 74ACT541SC 74ACT541MTC
Package Number
M20B M20D MTC20 N20A M20B MTC20
Package Description
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Device also available in Tape and Reel. Specify by appending suffix letter "X" to the ordering number. All packages are lead free per JEDEC: J-STD-020B standard.
(c)1988 Fairchild Semiconductor Corporation 74AC541, 74ACT541 Rev. 1.5.0
www.fairchildsemi.com
74AC541, 74ACT541 -- Octal Buffer/Line Driver with 3-STATE Outputs
Connection Diagram
Logic Symbol
IEEE/IEC
Truth Table
Inputs OE1
L H X L X = Immaterial L = LOW Voltage Level Z = High Impedance
OE2
L X H L
I
H X X L
Outputs
H Z Z L
H = HIGH Voltage Level
(c)1988 Fairchild Semiconductor Corporation 74AC541, 74ACT541 Rev. 1.5.0
www.fairchildsemi.com 2
74AC541, 74ACT541 -- Octal Buffer/Line Driver with 3-STATE Outputs
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only.
Symbol
VCC IIK Supply Voltage DC Input Diode Current VI = -0.5V VI = VCC + 0.5 VI IOK DC Input Voltage DC Output Diode Current VO = -0.5V VO = VCC + 0.5V VO IO DC Output Voltage
Parameter
Rating
-0.5V to +7.0V -20mA +20mA -0.5V to VCC + 0.5V -20mA +20mA -0.5V to VCC + 0.5V 50mA 50mA -65C to +150C 140C
DC Output Source or Sink Current
ICC or IGND DC VCC or Ground Current per Output Pin TSTG Storage Temperature TJ Junction Temperature
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to absolute maximum ratings.
Symbol
VCC Supply Voltage AC ACT VI VO TA V / t V / t Input Voltage Output Voltage Operating Temperature
Parameter
Rating
2.0V to 6.0V 4.5V to 5.5V 0V to VCC 0V to VCC -40C to +85C 125mV/ns 125mV/ns
Minimum Input Edge Rate, AC Devices: VIN from 30% to 70% of VCC, VCC @ 3.3V, 4.5V, 5.5V Minimum Input Edge Rate, ACT Devices: VIN from 0.8V to 2.0V, VCC @ 4.5V, 5.5V
(c)1988 Fairchild Semiconductor Corporation 74AC541, 74ACT541 Rev. 1.5.0
www.fairchildsemi.com 3
74AC541, 74ACT541 -- Octal Buffer/Line Driver with 3-STATE Outputs
DC Electrical Characteristics for AC
TA = +25C Symbol
VIH
TA = -40C to +85C Units
V 2.1 3.15 3.85 0.9 1.35 1.65 2.9 4.4 5.4 2.46 3.76 4.76 0.1 0.1 0.1 0.44 0.44 0.44 1.0 2.5 A A V V V
Parameter
Minimum HIGH Level Input Voltage
VCC (V)
3.0 4.5 5.5 3.0 4.5 5.5 3.0 4.5 5.5 3.0 4.5 5.5
Conditions
VOUT = 0.1V or VCC - 0.1V VOUT = 0.1V or VCC - 0.1V IOUT = -50A
Typ.
1.5 2.25 2.75 1.5 2.25 2.75 2.99 4.49 5.49 2.1
Guaranteed Limits
3.15 3.85 0.9 1.35 1.65 2.9 4.4 5.4 2.56 3.86 4.86
VIL
Maximum LOW Level Input Voltage
VOH
Minimum HIGH Level Output Voltage
VIN = VIL or VIH, IOH = -12mA VIN = VIL or VIH, IOH = -24mA VIN = VIL or VIH, IOH = -24mA(1) 0.002 0.001 0.001 VIN = VIL or VIH, IOL = 12mA VIN = VIL or VIH, IOL = 24mA VIN = VIL or VIH, IOL = 24mA(1) VI = VCC, GND VI (OE) = VIL, VIH; VI = VCC, GND; VO = VCC, GND VOLD = 1.65V Max. VOHD = 3.85V Min. VIN = VCC or GND IOUT = 50A
VOL
Maximum LOW Level Output Voltage
3.0 4.5 5.5 3.0 4.5 5.5
0.1 0.1 0.1 0.36 0.36 0.36 0.1 0.25
IIN(2) IOZ
Maximum Input Leakage Current Maximum 3-STATE Leakage Current Minimum Dynamic Output Current(3) Maximum Quiescent Supply Current
5.5 5.5
IOLD IOHD ICC
(2)
5.5 5.5 5.5
75 -75 4.0 40.0
mA mA A
Notes: 1. All outputs loaded; thresholds on input associated with output under test. 2. IIN and ICC @ 3.0V are guaranteed to be less than or equal to the respective limit @ 5.5V VCC. 3. Maximum test duration 2.0ms, one output loaded at a time.
(c)1988 Fairchild Semiconductor Corporation 74AC541, 74ACT541 Rev. 1.5.0
www.fairchildsemi.com 4
74AC541, 74ACT541 -- Octal Buffer/Line Driver with 3-STATE Outputs
DC Electrical Characteristics for ACT
TA = +25C Symbol
VIH VIL VOH
TA = -40C to +85C Units
V V V 2.0 2.0 0.8 0.8 4.4 5.4 3.76 4.76 0.1 0.1 0.44 0.44 1.0 2.5 1.5 75 -75 A A mA mA mA A V
Parameter
Minimum HIGH Level Input Voltage Maximum LOW Level Input Voltage Minimum HIGH Level Output Voltage
VCC (V)
4.5 5.5 4.5 5.5 4.5 5.5 4.5 5.5
Conditions
VOUT = 0.1V or VCC - 0.1V VOUT = 0.1V or VCC - 0.1V IOUT = -50A VIN = VIL or VIH, IOH = -24mA VIN = VIL or VIH, IOH = -24mA(4) IOUT = 50A VIN = VIL or VIH, IOL = 24mA VIN = VIL or VIH, IOL = 24mA(4) VI = VCC, GND VI = VIL, VIH; VO = VCC, GND VI = VCC - 2.1V VOLD = 1.65V Max. VOHD = 3.85V Min. VIN = VCC or GND
Typ.
1.5 1.5 1.5 1.5 4.49 5.49 2.0 2.0 0.8 0.8 4.4 5.4
Guaranteed Limits
3.86 4.86 0.001 0.001 0.1 0.1 0.36 0.36 0.1 0.25 0.6
VOL
Maximum LOW Level Output Voltage
4.5 5.5 4.5 5.5
IIN IOZ ICCT IOLD IOHD ICC
Maximum Input Leakage Current Maximum 3-STATE Leakage Current Maximum ICC/Input Minimum Dynamic Output Current(5) Maximum Quiescent Supply Current
5.5 5.5 5.5 5.5 5.5 5.5
4.0
40.0
Notes: 4. All outputs loaded; thresholds on input associated with output under test. 5. Maximum test duration 2.0ms, one output loaded at a time.
(c)1988 Fairchild Semiconductor Corporation 74AC541, 74ACT541 Rev. 1.5.0
www.fairchildsemi.com 5
74AC541, 74ACT541 -- Octal Buffer/Line Driver with 3-STATE Outputs
AC Electrical Characteristics for AC
TA = +25C, CL = 50pF Symbol
tPLH tPHL tPZH tPZL tPHZ tPLZ
TA = -40C to +85C, CL = 50pF Min.
1.5 1.0 1.5 1.0 3.0 1.5 2.5 1.0 2.5 1.0 2.0 1.0
Parameter
Propagation Delay, Data to Output Propagation Delay, Data to Output Output Enable Time Output Enable Time Output Disable Time Output Disable Time
VCC (V)(6)
3.3 5.0 3.3 5.0 3.3 5.0 3.3 5.0 3.3 5.0 3.3 5.0
Min.
2.0 1.5 2.0 1.5 3.0 2.0 2.5 1.5 3.5 2.0 2.5 2.0
Typ.
5.5 4.0 5.5 4.0 8.0 6.0 7.0 5.5 9.0 7.0 6.5 5.5
Max.
8.0 6.0 8.0 6.0 11.5 8.5 10.0 7.5 12.5 9.5 9.5 7.5
Max.
9.0 6.5 8.5 6.5 12.5 9.5 11.5 8.5 14.0 10.5 10.5 8.5
Units
ns ns ns ns ns ns
Note: 6. Voltage range 3.3 is 3.3V 0.3V. Voltage range 5.0 is 5.0V 0.5V.
AC Electrical Characteristics for ACT
TA = +25C, CL = 50pF Symbol
tPLH tPHL tPZH tPZL tPHZ tPLZ Note: 7. Voltage range 5.0 is 5.0V 0.5V. Output Disable Time 5.0
TA = -40C to +85C, CL = 50pF Min
2.0 2.0 2.0 2.0 1.5 1.5
Parameter
Propagation Delay, Data to Output Output Enable Time
VCC (V)(7)
5.0 5.0
Min.
2.0 2.0 2.0 2.0 1.5 1.5
Typ.
4.5 5.5 5.0 6.5 5.5 5.5
Max.
7.0 7.0 9.0 9.0 7.5 7.5
Max
7.5 7.5 9.5 9.5 8.0 8.0
Units
ns ns ns
Capacitance
Symbol
CIN CPD
Parameter
Input Capacitance Power Dissipation Capacitance for AC Power Dissipation Capacitance for ACT
Conditions
VCC = OPEN VCC = 5.0V
Typ.
4.5 30.0 70.0
Units
pF pF
(c)1988 Fairchild Semiconductor Corporation 74AC541, 74ACT541 Rev. 1.5.0
www.fairchildsemi.com 6
74AC541, 74ACT541 -- Octal Buffer/Line Driver with 3-STATE Outputs
Physical Dimensions
13.00 12.60 11.43
20 B 11 A
9.50 10.65 7.60 10.00 7.40 2.25
1 PIN ONE INDICATOR
0.51 0.35
0.25
M
10
1.27
CBA
1.27
0.65
LAND PATTERN RECOMMENDATION
2.65 MAX
SEE DETAIL A
C
0.33 0.20
0.10 C SEATING PLANE
0.75 0.25 (R0.10) (R0.10)
8 0
X 45
0.30 0.10
NOTES: UNLESS OTHERWISE SPECIFIED
GAGE PLANE
0.25 1.27 0.40 (1.40)
A) THIS PACKAGE CONFORMS TO JEDEC MS-013, VARIATION AC, ISSUE E B) ALL DIMENSIONS ARE IN MILLIMETERS. C) DIMENSIONS DO NOT INCLUDE MOLD FLASH OR BURRS. D) CONFORMS TO ASME Y14.5M-1994 E) LANDPATTERN STANDARD: SOIC127P1030X265-20L F) DRAWING FILENAME: MKT-M20BREV3
SEATING PLANE
DETAIL A
SCALE: 2:1
Figure 1. 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild's worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor's online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/
(c)1988 Fairchild Semiconductor Corporation 74AC541, 74ACT541 Rev. 1.5.0
www.fairchildsemi.com 7
74AC541, 74ACT541 -- Octal Buffer/Line Driver with 3-STATE Outputs
Physical Dimensions (Continued)
Figure 2. 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild's worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor's online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/
(c)1988 Fairchild Semiconductor Corporation 74AC541, 74ACT541 Rev. 1.5.0
www.fairchildsemi.com 8
74AC541, 74ACT541 -- Octal Buffer/Line Driver with 3-STATE Outputs
Physical Dimensions (Continued)
Figure 3. 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild's worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor's online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/
(c)1988 Fairchild Semiconductor Corporation 74AC541, 74ACT541 Rev. 1.5.0
www.fairchildsemi.com 9
74AC541, 74ACT541 -- Octal Buffer/Line Driver with 3-STATE Outputs
Physical Dimensions (Continued)
26.92 24.89
PIN #1
7.11 6.09
(0.97)
1.78 1.14
7 TYP
3.43 3.17 5.33 MAX
7 TYP
7.87
2.54 0.36 0.56
.001[.025] C
3.55 3.17 0.38 MIN
7.62 10.92 MAX 0.20 0.35
NOTES:
Figure 4. 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild's worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor's online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/
(c)1988 Fairchild Semiconductor Corporation 74AC541, 74ACT541 Rev. 1.5.0
www.fairchildsemi.com 10
74AC541, 74ACT541 -- Octal Buffer/Line Driver with 3-STATE Outputs
TRADEMARKS The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidiaries, and is not intended to be an exhaustive list of all such trademarks. PDP-SPMTM SyncFETTM (R) Power220(R) (R) Power247 The Power Franchise(R) POWEREDGE(R) Power-SPMTM PowerTrench(R) TinyBoostTM Programmable Active DroopTM TinyBuckTM (R) QFET TinyLogic(R) QSTM TINYOPTOTM QT OptoelectronicsTM TinyPowerTM (R) Quiet SeriesTM TinyPWMTM RapidConfigureTM TinyWireTM Fairchild(R) SMART STARTTM Fairchild Semiconductor(R) SerDesTM (R) SPM FACT Quiet SeriesTM UHC(R) STEALTHTM FACT(R) Ultra FRFETTM SuperFETTM FAST(R) UniFETTM SuperSOTTM-3 FastvCoreTM VCXTM (R) (R)* SuperSOTTM-6 FlashWriter SuperSOTTM-8 * EZSWITCHTM and FlashWriter(R) are trademarks of System General Corporation, used under license by Fairchild Semiconductor. FPSTM FRFET(R) Global Power ResourceSM Green FPSTM Green FPSTM e-SeriesTM GTOTM i-LoTM IntelliMAXTM ISOPLANARTM MegaBuckTM MICROCOUPLERTM MicroFETTM MicroPakTM MillerDriveTM Motion-SPMTM OPTOLOGIC(R) OPTOPLANAR(R) DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD'S WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Product Status Formative or In Design Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data; supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve the design. This datasheet contains specifications on a product that has been discontinued by Fairchild Semiconductor. The datasheet is printed for reference information only.
Rev. I32
ACEx(R) Build it NowTM CorePLUSTM CROSSVOLTTM CTLTM Current Transfer LogicTM EcoSPARK(R) EZSWITCHTM * TM
2. A critical component in any component of a life support, device, or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.
Preliminary
First Production
No Identification Needed
Full Production
Obsolete
Not In Production
(c)1988 Fairchild Semiconductor Corporation 74AC541, 74ACT541 Rev. 1.5.0
www.fairchildsemi.com 11

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