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Complies with Directive 2002/95/EC (RoHS)
I. Product Overview
TXC100 is a rugged, single chip OOK/ASK/FSK Transmitter IC in the 300-450 MHz frequency range. This chip is highly integrated and has all required RF functions including a complete PLL circuit and power amplifier, thus requiring very few external components. The TXC100 is feature rich and is very small in size with high output power and low current consumption and is ideal for various short range wireless applications in the industrial, automotive and consumer markets.
3x3mm package
II. Key Features
* * * * * * * * * * * * * * * * * * * * * * * * * Operating Frequency Range: 300-450 MHz Modulation Types: OOK/ASK/FSK Operation supply voltage: 2.1V - 3.6V High Date rate: ASK: 100 kbps FSK: 20 kbps Low current consumption: ASK mode: 7 mA typical FSK mode: 10 mA typical Low Stand by current: < 1 nA Adjustable Output power: -10dBm to +10dBm Adjustable FSK Shift Programmable Clock Output Very Low external component count Extended temperature range: -40C to +125C. Small Package: 3X3 mm 16-pin TQFN package Standard 13 inch reel, 2500 pieces Electrical Characteristics
Characteristics Operating Frequency Modulation Types ASK Data Rate FSK Data Rate Peak RF Output Power Standby Current Supply Voltage Range Operating Temperature VDD Ta 2.1 -40 10 1 3.6 +125 Sym fo Min 300 OOK/ASK/ FSK 100 20 Kbps Kbps dBm nA Vdc
o
Typical
Max 450
Units MHz
C
Crystal Parameters
Characteristics Crystal Frequency Load Capacitance Tolerance Sym fc Cl Tol 30 Min Typical fo/32 10 Max Units MHz pF ppm
III. Popular applications
Active RFID tags Automated Meter reading Wireless sensor nodes Home Automation Security systems Tire pressure monitoring Remote keyless entry Automobile Immobilizers Sports & Performance monitoring Wireless Toys Medical equipment Command & Control systems
RF Monolithics, Inc.
4441 Sigma Road Dallas, Texas 75244 (800) 704-6079 toll-free in U.S. and Canada www.rfm.com Email: info@rfm.com 1 of 11
IV. TXC100 Block Diagram and Typical Application Circuit
D0 D1 D2 11 12 13
Mode TX Data Input Input VDD PA 2 3 6 RF Control
C5
C6
C7
Modulation Control C4 C1 XTAL1 14 REFEXT/XTAL2 C2 15 C3 XTAL DRV LOGIC
Mode Select (ASK / FSK)
Shape 7
R1
C8 Mixer Filter OSC PA 8 C10 L1 PA Output
C9
CLK0 CLK1
L2 C11 C12
9 10
/N /32 5 CLK BIAS 1 C13 VCC C14 C15 C16
PIN 4 ENABLE INPUT PIN 16 GND
Table 1: Component Values for Typical Application Circuit
315MHz Band C1 C2 C33 C43 C5 C6 C7 C8 C9 C10 C11 C12 C13 C14 C15 C16 L1 L2 X1 100pF 100pF DNP DNP 1uF .01uF 220pF 100pF 680pF 15pF 22pF 15pF 1uF .01uF 220pF 2.2pF 27nH 22nH 9.84375MHz 433MHz Band 100pF 100pF DNP DNP 1uF .01uF 220pF 100pF 680pF 6.8pF 1pF 6.8pF 1uF .01uF 220pF 1pF 22nH 18nH 13.5600MHZ
Matched to 50 Ohms Use wirewound inductors ONLY 3 Use for External Reference Input DNP - Do Not Populate
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V. Pin Configuration
BOTTOM VIEW
Xtal2/REF IN
3x3mm
Dev2
Xtal1
13 Dev1 Dev0 Clk1 Clk0 12 11 10 9 8
PA Out
14
15
16 1 2 3 4 VDD ModeSel DataIN Stdby
7
ES Out
6
VDDPA
VI. Pin Description
Pin 1 Name VDD Description VDD is the supply voltage for the PLL and Logic. Bypass as close as possible to pin with 1F, .01F, 220pf. Mode Select enables the chip to be set in ASK or FSK mode Low: ASK mode High: FSK mode ASK, FSK Mode Selection The Mode Select pin (2) sets the transmit mode of the device. A logic low sets the mode to ASK modulation. A logic high sets the device to FSK modulation. 2 ModeSel In ASK mode, data driven onto the DataIN pin (3) gates the internal power amplifier. A data "High" turns the power amplifier on and thus drives the RF signal to the antenna. A data "Low" turns off the power amplifier. In FSK mode, data driven onto the DataIN pin shifts the carrier frequency by the amount programmed through the DEV[2..0] pins (13,12,11). A data "Low" performs no shift. The frequency of a data "Low" in FSK mode is the same frequency of a data "High" in ASK mode. The FSK deviation is achieved by pulling the crystal frequency. See Crystal Reference section (pin 15) for more details. The maximum deviation for the 315MHz band and 433MHz band is approximately 55 kHz and 80 kHz, respectively. Data Input enables the turning on and off of the Power Amplifier in ASK mode and selection of high or low frequency in FSK mode. Low (ASK mode): Power Amplifier off High (ASK mode): Power Amplifier on Low (FSK mode): Low frequency High (FSK mode): High frequency Standby enables selection of low power shutdown/standby mode Low or if left unconnected: Sets device in Standby mode High: Sets device in Ready for transmission mode 4 Stdby Note: Lowest current consumption achieved when all config pins at Logic Low. Standby Mode The Standby pin (4) sets the device in low power shutdown, pulling only 0.2nA. When the device is brought out of standby with a logic "High", it is ready for operation within 200us. The Standby pin has an internal pull-down resistor so this pin can be pulled low or left unconnected. The 200us turn-on time is due to crystal start-up. An optimally matched crystal will minimize this turn-on time. See Crystal Reference section (pin 15) for details on crystal load matching.
3
DataIN
Clk Out
GND
5
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Clock output is a buffered version of the crystal frequency which may be used to drive external logic or a microprocessor. The frequency is programmable thru pins 9 (Clk0) and 10(Clk1) as below: Clk0 0 1 0 1 Clk1 0 0 1 1 ClkOut 0 fc/4 fc/8 fc/16
5
ClkOut
NB: fc = (Crystal Frequency) 6 VDDPA Supply voltage for the Power amp. Bypass as close as possible to the pin with a .01F and 220pf capacitor. Envelope-Shaping Output controls the on/off ramp time of the power amp in ASK mode. This reduces the spectral width of the output signal when modulated. Placing a small resistor in series with the output, as close as possible to the chip to minimize circuit parasitics, will enable control of output power. A potentiometer may be used to adjust the output power to the desired level. Bypass as close to the pin as possible with a 680pF and 220pF capacitor. 7 ESOut Note: By using the ESOUT pin there is approx a 0.6dB drop in max output power. Spectral Shaping/Output Power Adjust The ESOUT pin (7) can serve a dual function. Use of the ESOUT pin will allow for a softer turn-on/turn-off of the power amplifier resulting in reduced spectral spreading of the ASK signal. Inserting a series resistor between the ESOUT pin and the pull-up inductor will allow for adjustment of the carrier output power. Typically a resistance of 5K Ohms or less will allow adjustment down to -10dBm. The envelope-shaping resistor allows for a turn on / turn-off of the Power Amp in ASK mode. Power-Amplifier Output. - Requires a DC path to the supply voltage, thru a series inductor which can be part of the output matching network to an antenna 8 PAOut Power Amplifier The power amp is an open-drain, Class C amplifier with optimal impedance at PAOUT (pin 8) of about 250 Ohms. A matching network can optimize the output to drive typical 50 Ohm antennas. An output matching network with component values is shown in the Typical Application Circuit (section IV). Additionally, the matching network aids in suppressing carrier harmonics to aid in compliance testing. See description for Pin 5 Frequency Deviation configuration pins set the amount of deviation desired between data logic states in FSK mode. Frequency deviation is programmable through pins 13, 12, 11 as below: DEV .125 x max .250 x max .375 x max .500 x max .625 x max .750 x max .875 x max max DEV 2 0 0 0 0 1 1 1 1 DEV 1 0 0 1 1 0 0 1 1 DEV 0 0 1 0 1 0 1 0 1
10, 9
Clk[1..0]
13, 12, 11
FreqDev[2..0]
Note: Deviation values are approx for properly loaded crystal. Crystal characteristics and loading will differ with other manufacturers. 14 Xtal1 External Crystal input 1 presents a capacitance of 3pF to GND in ASK and FSK(DataIN=0V) mode. Additional circuit parasitics add to the package capacitance which increases the presented load to about 4.5pF. External Crystal input 2 presents a capacitance of 3pF to GND in ASK and FSK(DataIN=0V) mode. Additional circuit parasitics add to the package capacitance which increases the presented load to about 4.5pF. External Ref Input enables a custom frequency to be applied to obtain the desired transmit frequency. Unconnected Xtal1 input must be bypassed with a .01F capacitor and additional .01F series capacitance should be added into External Reference input. Crystal Reference The crystal drive circuit in the TXC100 is designed to present a 3pF load to GND to the reference crystal. Including PCB parasitic capacitances, this increases to about 4.5pF. In ASK mode, the full 3pF load is applied to the crystal allowing it to oscillate at the desired frequency. In FSK mode, a portion of the 3pF load is removed in response to a data logic "High" applied to the DataIN (pin 2) and the programmed frequency deviation pins DEV[0..2] (13,12,11). For larger frequency deviations use a crystal with larger motional capacitance or reduce PCB parasitic capacitance as much as possible. NOTE: Use a crystal with the same load capacitance as that presented by the TXC100. If not, additional matching will be necessary to achieve the desired carrier frequency and the added matching will reduce the desired FSK deviation. Ground. Connect to system ground. 16 GND Note: The exposed ground pad is the power amp ground. It must be connected to system ground thru a low inductance path.
15
Xtal2/REFIN
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VII. Absolute Maximum Ratings
Parameter Symbol Min Operating Temperature Junction Temperature Storage Temperature Supply Voltage - Vdd to GND All pins to GND TO TJ TS VS -40 -40 -60 -0.3 -0.3 Limit Values Max +125 +150 +150 +4 Vdd + 0.3 C C C V V Unit
Note: Maximum ratings must not be exceeded under any circumstances and can cause permanent damage to the IC
VIII. DC Electrical Characteristic (Typical values taken at VDD = +3.0V, TA = +25C, unless otherwise noted)
Limit Values Characteristic Supply Voltage Current Consumption 0.2 Standby ISTDBY 120 700 2.9 7 Supply IDD 1,4 10.5 3.3 7.3 10 Digital Inputs Data Input Low Data Input High Max Input Current Digital Outputs Output Voltage Low Output Voltage High VOL VOH VDD-0.25 0.25 V V Clkout, Load = 10pF Clkout, Load = 10pF VIL VIH II VDD-0.25 15.5 20 0.25 V V a 1 300 1600 4.3 10.7 17.1 4.8 11.4 18.1 mA nA TA = +25 deg C TA = +85 deg C TA = +125 deg C PA off, Data=0V (ASK) 50% duty cycle (ASK) Data=+VDD (FSK and ASK) PA off, Data=0V (ASK) 50% duty cycle (ASK) Data=+VDD (FSK and ASK) 433 Mhz Band 315 Mhz Band Sym VDD Notes min 2.1 typ max 3.6 V Unit Test Conditions
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IX. AC Electrical Characteristic (Typical values taken at VDD = +3.0V, TA = +25C, unless otherwise noted)
Parameter Sym Notes Limit Values typ max Unit Test Conditions
min
PLL Performance VCO Gain KVCO 280 -75 -74 -98 -98 300 -40 -56 -52 -56 -65 fRF/32 50 3 FXTAL/N 300 4 tON tr 5 5 5 6.1 2.7 12.2 10 5.3 160 300 20 100 55 80 35 31 27 25 -77 4 TBD 450 16.1 12.4 MHz/V 315 Mhz Band 433 Mhz Band 315 Mhz Band 433 Mhz Band Freq Offset = 100kHz Freq Offset = 1MHz
Phase Noise
dBc/Hz
Loop BW Reference Spur 2nd Harmonic 3rd Harmonic Crystal Frequency Range Tolerance Internal Load Capacitance Clock Output Frequency System Characteristics Frequency Range Output Power Start-up time Rise Time Max Data Rate Frequency Deviation (FSK)
BW
kHz dBc dBc dBc 315 Mhz Band 433 Mhz Band 315 Mhz Band 433 Mhz Band fundamental mode, AT
fREF 3 2 CLKOUT
MHz ppm pF MHz MHz dBm s ns kbps kHz
Determined by CLK1 and CLK2
TA = -40C, VDD = +3.6V into 50 matched TA = +25C, VDD = +3.0V load TA = +125C, VDD = +2.1V STDBY to Tx FSK (50% Duty Cycle) ASK (50% Duty Cycle) 315 Mhz Band DEV[2..0]=111 433 Mhz Band 315 Mhz Band CW 433 Mhz Band 315 Mhz Band 50% duty cycle 433 Mhz Band ASK Mode -40C to +85C
Transmit Efficiency =POUT/(VDDxIDD) Power ON/OFF Ratio Frequency Stability vs. VDD Frequency Stability vs. Temp
4
%
dfVDD dfTA
dB kHz kHz
Notes: 1. 10kHz, 50% duty cycle 2. Dependent on PCB parasitic trace capacitance and crystal parameters. 3. Dependent on crystal parameters. 4. Transmit Efficiency, RF Output Power, and Supply Current are heavily dependent on proper output matching and PCB layout. 5. No Envelope Shaping.
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X. Typical Operating Characteristics
Supply Voltage vs Supply Current
15
Supply Voltage vs Supply Current
15 mA @ 315MHz 14
13 14
mA @ 433.92MHz
13
Supply Current, mA 12
Supply Current, mA
12
11
11
10
10
9
9
8
8
7 2 2.2 2.4 2.6 2.8 3 Supply Voltage, V 3.2 3.4 3.6 3.8 4
7 2 2.2 2.4 2.6 2.8 3 Supply Voltage, V 3.2 3.4 3.6 3.8 4
Supply Voltage vs Output Power
13
Supply Voltage vs Output Power
14 dBm @ 315MHz 13 12
Output Power (Po), dBm
11 12
dBm @ 433.92MHz
10 9 8
Output Power, dBm
11
10
9
8
7
7 6 5 2 2.2 2.4 2.6 2.8 3 Supply Voltage, V 3.2 3.4 3.6 3.8 4
6
5 2 2.1 2.2 2.3 2.4 2.5 2.6 2.7 2.8 2.9 3 3.1 3.2 3.3 3.4 3.5 3.6 3.7 3.8 3.9 4 Supply Voltage, V
Output Power vs Supply Current
15 mA @ 315MHz 14
Output Power vs Supply Current
15 mA @ 433.92MHz 14
13
13
Supply Current, mA
12
11
Supply Current, mA
6 7 8 9 10 11 12 13 Output Power (Po), dBm
12
11
10
10
9
9
8
8
7
7 5 6 7 8 9 Output Power, dBm 10 11 12 13
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Voltage vs Modulation Current
15
Supply Voltage vs Modulation Supply Current
15
14
315MHz,FSK,50% DC
14
433.92MHz,FSK,50% DC
13
13
12
12 Supply Current, mA
11 Current, mA
11
10 315MHz,ASK,50% DC 9
10 433.92MHz,ASK,50% DC 9
8
8
7
7
6
6
5 2 2.1 2.2 2.3 2.4 2.5 2.6 2.7 2.8 2.9 3 3.1 3.2 3.3 3.4 3.5 3.6 3.7 3.8 3.9 4 Voltage, V
5 2 2.1 2.2 2.3 2.4 2.5 2.6 2.7 2.8 2.9 3 3.1 3.2 3.3 3.4 3.5 3.6 3.7 3.8 3.9 4 Supply Voltage, V
Supply Current and Output Power vs ESout Resistor
16 12
Supply Current and Output Power vs ESout Resistor
16 12
f = 315MHz
15 14 10 8
f = 433.92MHz
15 10
Power (dBm)
14 13 12 11
Output Power, dBm
Power
13 12 11 Supply Current, mA 10 6 4 2
8 6 4 2 0 -2 -4 -6 -8 -10 -12 -14 -16 10000 Output Power, dBm
0
Supply Current, mA
10 9 8 7 6 5 4 3 2 0.1 1 10 Resistor, Ohms 100
Current
9 8 7 6 5 4 3 2 0.1 1 10 Resistor, Ohms 100 1000 -2 -4 -6 -8 -10 -12 -14 -16 10000
Current (mA)
1000
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XI. Theory of Operation
Introduction The TXC100 is a crystal-referenced transmitter designed to operate in the 315/433 MHz frequency spectrum. The carrier and crystal reference relation is given by: fC = fXTAL * 32 It is capable of supporting OOK/ ASK and FSK data transmissions at 100kbps and 20kbps, respectively. The output power is adjustable from -10dBm to +10dBm thru a resistor at the ESOUT (pin 7). The FSK frequency deviation is programmable with up to eight different deviation values. The IC also provides a buffered clock output of the reference crystal for use by an external processor. The clock output is also programmable. Frequency Synthesizer The frequency synthesizer is simply a Phase Locked Loop circuit with a loop bandwidth of 300 kHz. The PLL contains a phase detector, charge pump, VCO, integrated loop filter, /32 clock divider, and crystal oscillator drive circuit. The internal PLL is self contained and requires no external components for filtering or dividing. Only a reference crystal is needed. 50 Output Matching When properly matched, the TXC100 can output up to +12 dBm into a 50 load. The output is an open-drain configuration which requires a pull-up inductor for proper internal biasing. The pull-up inductance serves to provide biasing for the power amplifier and is a high frequency choke to reduce unwanted coupling back into the power supply. Maximum power transfer occurs when the output is closely matched to 250. For best performance use wirewound inductors instead of chip inductors. Wirewound inductors provide lower insertion loss as opposed to chip inductors. See Typical Application Circuit (section IV) for topology and matching component values. PCB Layout Considerations PCB layout is critical to proper and consistent operation. Always use controlled impedance lines from the PAOUT (pin 8). For a .062" thick FR4 board a 50 impedance line is approximately .110" wide. Component spacing is critical as well. Keep all output matching components as close together as possible to minimize stray inductance and capacitance that can detune the matching network. Keep ground planes at least a board thickness away from the signal output leading to the antenna or RF connector.
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Antenna Layout Considerations Most compact wireless designs have the need for a small, compact antenna. Typically, loop antennas are the ones of choice since they can be designed into tight spaces. Loop antenna design can become fairly lengthy and detailed discussion is beyond the scope of this datasheet. The object here is to provide a "rule of thumb" approach to achieve an appropriate starting point. Empirical data will provide the best path to take. The circumference of the antenna should be less than /4 so that the antenna appears inductive. For this, a series matching capacitor is used to tune out the inductance of the antenna, since the antenna appears inductive. The capacitor may be located at the feed point of the antenna or at the "grounded" end. The capacitor may be a variable type or several fixed values may be attempted until an optimal match is reached. The use of a good network analyzer is essential for proper matching and maximum power transfer. For additional information on antenna design see the Application Notes section of our website: http://www.rfm.com/corp/apnotes.htm.
XII. Typical Test Circuit
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Package Dimensions - 3x3mm 16-pin TQFN Package
(all values in mm)
TOP VIEW
SEATING PLANE
SIDE VIEW
0.0~0.05 0.50
BOTTOM VIEW
3.00
0.5 TYP.
0.23 TYP.
PIN 1 Indicator PIN # 1 0.5 TYP.
3.00
1.50
0.23 TYP.
0.40
0.25 0.75 MAX 1.50 0.40
4441 Sigma Road Dallas, Texas 75244 (800) 704-6079 toll-free in U.S. and Canada Email: info@rfm.com www.rfm.com www.wirelessis.com (c) 2005 RF Monolithics, Inc. TXC100 012706
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