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TA0105A STEREO CLASS-T DIGITAL AUDIO AMPLIFIER DRIVER USING DIGITAL POWER PROCESSING (DPP T M ) TECHNOLOGY
Technical Information Revision 2.2 - May 2005
GENERAL DESCRIPTION
The TA0105A is a two-channel Amplifier Driver IC that uses Tripath's proprietary Digital Power Processing (DPPTM) technology. Class-T amplifiers offer both the audio fidelity of Class-AB and the power efficiency of Class-D amplifiers. The typical application for the TA0105A is direct drive (no output transformer) in 70V and 100V constant voltage amplifiers used for public address systems. The feedback and voltage range of the TA0105A can be configured externally unlike previous Tripath modules such as TA0104A.
APPLICATIONS FEATURES
Constant Voltage Amplifiers Distribution Amplifiers Pro-audio Amplifiers
BENEFITS
Reduced system cost with smaller/less expensive power supply and heat sink Signal fidelity equal to high quality ClassAB amplifiers No output transformer is needed due to high supply voltage range High dynamic range compatible with digital media such as CD and DVD
C lass- T architec ture Proprietary Digital Power Processing technology High Supply Voltage Range "Audiophile" Sound Quality High Efficiency Supports wide range of output power levels Output over-current protection Over- and under-voltage protection 38-pin Quad package
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Absolute Maximum Ratings (Note 1)
SYMBOL VPP, VNN Supply Voltage V5 VN12 TA TJ TSTORE ESDHB ESDMM Positive 5V Controller Voltage Voltage at Input Pins (pins 4-8, 10-11) Voltage for FET drive Operating Free-air Temperature Range Junction Temperature Storage Temperature Range ESD Susceptibility - Human Body Model (Note 2) All Pins ESD Susceptibility - Machine Model (Note 3) All Pins PARAMETER Value +/-200 6 -0.3 to (V5+0.3) VNN+18 0 to 70 150 -40 to 150 2000 200 UNITS V V V V C C C V V
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. See the table below for Operating Conditions. Note 2: Human body model, 100pF discharged through a 1.5K resistor. Note 3: Machine model, 220pF - 240pF discharged through all pins.
Operating Conditions (Note 4)
SYMBOL VPP, VNN Supply Voltage (Note 4) V5 VN12 Positive 5V Controller Voltage Voltage for FET drive (Volts about VNN) PARAMETER MIN. +/-125 4.5 10.8 TYP. +/-148 5 12 MAX. +/-185 5.5 13.2 UNITS V V V
Note 4: Recommended Operating Conditions indicate conditions for which the device is functional. The VPP and VNN supply limits are based on the internal OV/UV sensing resistor values. The supply voltage range can be lowered via external resistors. Please refer to the Application information section for a detailed discussion of changing the operating supply voltage range. See Electrical Characteristics for guaranteed specific performance limits.
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Electrical Characteristics (Note 5)
TA = 25 C. See Application/Test Circuit on page 7. Unless otherwise noted, the supply voltage is VPP=|VNN|=148V. See note 8.
SYMBOL Iq PARAMETER Quiescent Current (No load, BBM0=1,BBM1=0, Mute = 0V) Quiescent Current (No load, BBM0=1,BBM1=0, Mute = 0V) Mute Supply Current (No load, Mute = 5V) Power Supply Current (Vo = 100Vrms, RL = 50) Power Supply Current (Vo = 70.7Vrms, RL = 25) High-level input voltage (MUTE) Low-level input voltage (MUTE) High-level output voltage (HMUTE) RL = 10kohm Low-level output voltage (HMUTE) RL = 10kohm Output Offset Voltage Over Current Sense Voltage Threshold VPP Threshold Voltages No Load, MUTE = Logic low, Measured without external trim circuit connected Exceeding this threshold causes a latched mute condition Over-voltage turn on (muted) Over-voltage restart (mute off) Under-voltage restart (mute off) Under-voltage turn on (muted) Over-voltage turn on (muted) Over-voltage restart (mute off) Under-voltage restart (mute off) Under-voltage turn on (muted) Over-voltage turn on (muted) Over-voltage restart (mute off) Under-voltage restart (mute off) Under-voltage turn on (muted) Over-voltage turn on (muted) Over-voltage restart (mute off) Under-voltage restart (mute off) Under-voltage turn on (muted) -2.5 0.85 193 185 80 -193 -185 -80 147 140 60 -147 -140 -60 0.97 227 216 111 101 -221 -215 -110 -98 167 159 82 74 -166 -161 -82 -73 3.5 0.5 2.5 1.09 250 125 118 -250 -125 -118 185 95 85 -185 -95 -85 CONDITIONS VPP = +148V VNN = -148V V5 = 5V VN12 = 12V VPP = +106V VNN = -106V V5 = 5V VN12 = 12V VPP = +148V VNN = -148V V5 = 5V VN12 = 12V VPP = +148V (Both Channels On) VNN = -148V (Both Channels On) VPP = +106 (Both Channels On) VNN = -106 (Both Channels On) 3.5 1.0 MIN. TYP. 35 40 45 120 30 35 45 130 1 1 20 1 1.5 1.5 2.1 2.1 MAX. 100 100 80 250 100 100 80 250 30 1.6 1.6 2.22 2.22 UNITS mA mA mA mA mA mA mA mA mA mA mA mA A A A A V V V V V V V V V V V V V V V V V V V V V V
Iq
IMUTE
IPo IPo VIH VIL VOH VOL VOFFSET IOC VVPPSENSE
VVNNSENSE VNN Threshold Voltages
VVPPSENSE VPP Threshold Voltages (Externally shifted) (Note 6) VVNNSENSE VNN Threshold Voltages (Externally shifted) (Note 6)
Note 5: Minimum and maximum limits are guaranteed but may not be 100% tested. Note 6: These voltage values are calculated and not 100% tested. The voltages are based on 100% tested sense currents, an external "shift" resistor of 3.83M from VLOW to VNN and another 3.83M resistor from VHIGH to VPP, and the on board sense resistor values of 1.27M for VNN, and 1.4M for VPP. In addition, worse case resistor tolerances (+/-1%) were used to calculate the minimum and maximum values. Please refer to the Overvoltage and Undervoltage section of the Applications Information for a more detailed explanation.
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Electrical Characteristics (Notes 7 and 8)
TA = 25 C. Unless otherwise noted, the supply voltage is VPP=|VNN|=148V, the input frequency is 1kHz and the measurement bandwidth is 20kHz. See Application/Test Circuit on page 7.
SYMBOL POUT PARAMETER Output Power (Continuous Output/Channel) CONDITIONS VPP=|VNN|=148V THD+N = 0.1%, RL = 25 THD+N = 1.0%, RL = 25 VPP=|VNN|=106V THD+N = 0.1%, RL = 12.5 THD+N = 1.0%, RL = 12.5 VOUT = 50Vrms, f = 1kHz, RL = 12.5, VPP=|VNN|=106V VOUT = 50Vrms, f = 7kHz, RL = 12.5, VPP=|VNN|=106V VOUT = 70.7Vrms, f = 1kHz, RL = 25.0, VPP=|VNN|=148V VOUT = 70.7Vrms, f = 7kHz, RL = 25.0, VPP=|VNN|=148V 19kHz, 20kHz, 1:1 (IHF), RL = 50 VOUT = 25Vrms/Channel A Weighted, RL = 25, POUT = 400W/Channel 0dBr = 100W, RL = 25, f = 1kHz VOUT = 100Vrms/Channel, RL = 50, VPP=|VNN|=148V VOUT = 70.7Vrms/Channel, RL = 25, VPP=|VNN|=106V POUT = 10W/Channel, RL = 25, Rin = 34.8k, See Application / Test Circuit POUT = 10W/Channel, RL = 25 See Application / Test Circuit A-Weighted, input shorted, DC offset nulled to zero 85 85 MIN. TYP. 300 400 300 400 0.06 0.2 0.06 0.2 0.02 103 100 90 90 40.5 0.25 1.0 0.25 1.0 MAX. UNITS W W W W % % % % % dB dB % % V/V
THD + N THD + N THD + N THD + N IHF-IM SNR CS AV
Total Harmonic Distortion Plus Noise Total Harmonic Distortion Plus Noise Total Harmonic Distortion Plus Noise Total Harmonic Distortion Plus Noise IHF Intermodulation Distortion Signal-to-Noise Ratio Channel Separation Power Efficiency Power Efficiency Amplifier Gain
AVERROR eNOUT
Channel to Channel Gain Error Output Noise Voltage
-1 700
1
dB V
Note 7: Minimum and maximum limits are guaranteed but may not be 100% tested. Note 8: Specific Components used: Output MOSFETs (QO): ST Microelectronics STW20NM50FD Output Diodes (DO): International Rectifier MUR460 Feedback Resistors (RFB): 39.2Kohm, 1W Gate Diodes (DG): General Semiconductor SS16
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TA0105A Pinout
38
37
36
35
34
33
32
31
30
29
28
OCS2LP
LO2COM
HMUTE
OCS2LN
OCS2HN
OCS2HP
FDBKN2
VLOW
VHIGH
NC
1
AGND OVERLOADB
PGND
LO2
27
2
HO2COM
26
3
V5
HO2
25
4
MUTE
VNN
24
5
IN2 IN1 BBM0
VPP HO1 H01COM
23 22 21 20
6 7 8
GND KELVIN1
OCS1HN
LO1COM
BBM1
GND KELVIN2
OCS1HP
OCS1LN
OCS1LP
LO1
FDBKN1
OCR2
OCR1
9
10
11
12
13
14
15
16
17
18
5
VN12
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Pin Description
Pin 1 2 3 4 5, 6 7, 8 9, 12 10, 11 13, 14 15, 16 17,30 18, 29 19 20,27 21,26 22,25 23 24 28 31, 32 33, 34 35 36 37 Function AGND OVERLOADB V5 MUTE IN2, IN1 BBM0, BBM1 GNDKELVIN1, GNDKELVIN2 OCR2, OCR1 OCS1LP, OCS1LN OCS1HN, OCS1HP LO1COM, LO2COM FDBKN1, FDBKN2 VN12 LO1, LO2 HO1COM, HO2COM HO1, HO2 VPP VNN PGND OCS2LN, OCS2LP OCS2HN, OCS2HP HMUTE NC VHIGH Description Analog ground. This should be the "star" point for all connections to analog ground. Normally logic high. Logic low signals onset of clipping. Pin output impedance is approximately 100k. 5V power supply input. Logic input. A logic high puts the amplifier in mute mode. Ground pin if not used. Please refer to the section, Mute Control, in the Application Information. Audio inputs. (Channels 2 & 1) Break-before-make timing control to prevent shoot-through in the output MOSFETs. Output ground feedback (Channels 1 & 2) Over-current threshold adjustment (Channels 2 & 1) Over Current Sense inputs, Channel 1 low-side Over Current Sense inputs, Channel 1 high-side Kelvin connection to source of low-side transistor (Channel 1 & 2) Switching feedback (Channels 1 & 2) "Floating" supply input for the FET drive circuitry. This voltage must be stable and referenced to VNN. Low side gate drive output (Channel 1 & 2) Kelvin connection to source of high-side transistor (Channel 1 & 2) High side gate drive output (Channel 1 & 2) Positive supply voltage input. Connect to positive power supply. Used for power supply sensing. Negative supply voltage input. Connect to positive power supply. Used for power supply sensing. Power ground. This should be connected to the "star" point for the power (output) ground. Over Current Sense inputs, Channel 2 low-side Over Current Sense inputs, Channel 2 high-side Logic Output. A logic high indicates both amplifiers are muted, due to the mute pin state, or a "fault" such as an overcurrent, undervoltage, or overvoltage condition. Do not connect. Positive supply voltage sense input. This pin is biased at 2.5V nominally and left floating in typical applications. An external resistor may also be connected from VPP to VHIGH to lower the supply voltage operation range. See the Application Information for a detailed description on how to lower the supply voltage range. Negative supply voltage sense input. This pin is biased at 1.25V nominally and left floating in typical applications. An external resistor may also be connected from VNN to VLOW to lower the supply voltage operation range. See the Application Information for a detailed description on how to lower the supply voltage range.
38
VLOW
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Application/Test Circuit
TA0105A
16 OCS1HP 15 OCS1HN
CI 3.3uF + 20K RI 34.6K IN1 6 4.99K V5 RS 0.01, 1W RG 33,1W DG RG 33,1W DG QO DO CS 0.1uF CHBR 1.0uF DO LO 33uH CO 0.22uF RZ 15, 10W CZ 0.22uF
RL
+
VPP CS 220uF
+
AGND Offset Trim V5 Circuit ROFB 1M ROFA 10K AGND V5 5V
MUTE 4
Processing & Modulation VN12
22 HO1 21 HO1COM
CHBR QO 0.1uF
ROFB 1M 2.5V COF 0.1uF
20 LO1 17 LO1COM 13 OCS1LP 14 OCS1LN 11 OCR1
RS 0.01, 1W CS 0.1uF VNN CS 220uF
ROCR 20K AGND
18 FDBKN1 9 GNDKELVIN1
CFB
RFB 39.2K, 1W
AGND 35 HMUTE 5V BBM0 BBM1 AGND 20K RI 34.6K IN2 5 4.99K V5 7 8
RFB 39.2K
AGND 2 OVERLOADB
34 OCS2HP 33 OCS2HN 25 HO2 26 HO2COM
RS 0.01, 1W CS 0.1uF CHBR 1.0uF DO DG RG 33,1W DG QO DO
+
CI 3.3uF +
RG 33,1W
CHBR QO 0.1uF
+
AGND Offset Trim V5 Circuit ROFB 1M ROFA 10K AGND ROFB 1M
Processing & Modulation VN12
27 LO2 30 LO2COM 32 OCS2LP 31 OCS2LN
RS 0.01, 1W CS 0.1uF VNN CS 220uF
5V
ROCR 20K AGND
V5 3
CS 0.1uF AGND VN12 19 VNN VPP VNN 24 VPP 23 NC 36 1 AGND
29 FDBKN2 12 GNDKELVIN2
CFB
RFB 39.2K, 1W
RFB 39.2K
Over / Under 37 VHIGH Voltage 38 VLOW Detection CVB
1000pF 28 PGND
AGND
CVB 1000pF AGND
AGND
NC - Not Connected (Must Be Left Floating)
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+
COF 0.1uF
10 OCR2
+
VPP CS 220uF
LO 33uH CO 0.22uF RZ 15, 10W CZ 0.22uF
RL
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External Components Description (Refer to the Application/Test Circuit)
Components RI CI RFB Description Inverting input resistance to provide AC gain in conjunction with RF. This input is biased at the BIASCAP voltage (approximately 2.5VDC). AC input coupling capacitor which, in conjunction with RI, forms a highpass filter at fC = 1 (2RICI ) . Feedback resistor connected from either the half-bridge output to FDBKN1 (FDBKN2) or speaker ground to GNDKELVIN1 (GNDKELVIN2). The value of this depends on the supply voltage range and sets the TA0105A gain in conjunction with RI. It should be noted that the feedback resistor from the half-bridge output must have a power rating of greater that PDISS = VPP2/2RFB. Please see the Modulator Feedback Design paragraphs in the Application Information Section. Feedback delay capacitor that both lowers the idle switching frequency and filters very high frequency noise from the feedback signal, which improves amplifier performance. The value of CFB should be offset between channel 1 and channel 2 so that the idle switching difference is greater than 40kHz. Please refer to the Application / Test Circuit. Potentiometer used to manually trim the DC offset on the output of the TA0105A. Resistor that limits the manual DC offset trim range and allows for more precise adjustment. Decoupling capacitor which low pass filters the offset trim voltage from noise and power supply fluctuations. Supply decoupling for the power supply pins. For optimum performance, these components should be located close to the TA0105A and returned to their respective ground as shown in the Application/Test Circuit. Over-current sense resistor. Please refer to the section, Setting the Over-current Threshold, in the Application Information for a discussion of how to choose the value of RS to obtain a specific current limit trip point. Over-current "trim" resistor, which, in conjunction with RS, sets the current trip point. Please refer to the section, Setting the Over-current Threshold, in the Application Information for a discussion of how to calculate the value of ROCR. Supply decoupling for the high current Half-bridge supply pins. These components must be located as close to the output MOSFETs as possible to minimize output ringing which causes power supply overshoot. By reducing overshoot, these capacitors maximize both the TA0105A and output MOSFET reliability. These capacitors should have good high frequency performance including low ESR and low ESL. In addition, the capacitor rating must be twice the maximum VPP voltage. Output MOSFET. This is the main output switching device and to a large extent, sets the amplifier's limitations. This device must be a switching grade device with a good compromise between gate charge and on resistance while being able to withstand the full supply range. Please refer to the recommended devices in the Applications Information section. Output diode, which is used to minimizes output overshoots/undershoots on the output node. These devices clamp the output to low impedance node formed by the close connection of CHBR. Note the connection shown in the Application/Test Circuit. The "drain to drain" diode protects the bottom side device from excessive BVDSS due to overshoots on the output node. The "source to source" diode protects the top side device from excessive BVDSS due to undershoots on the output node. This device must be an ultra fast rectifier capable of sustaining the entire supply range (VPP-VNN) and high peak currents. Gate resistor, which is used to control the MOSFET rise/ fall times. This resistor serves to dampen the parasitics at the MOSFET gates, which, in turn, minimizes ringing and output overshoots. The typical power rating is 1 watt. Gate diode, which is used to "speed-up" the turn off of the MOSFET. This minimizes cross conduction and idle VPP/VNN supply current. This device should be a switching grade type such as Schottky or ultra-fast rectifier.
TA0105A - RW/ Rev. 2.2/05.05
CFB
ROFA ROFB COF CS RS ROCR CHBR
QO
DO
RG DG
8
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CZ RZ
LO
Zobel capacitor, which in conjunction with RZ, terminates the output filter at high frequencies. Use a high quality film capacitor capable of sustaining the ripple current caused by the switching outputs. Zobel resistor, which in conjunction with CZ, terminates the output filter at high frequencies. The combination of RZ and CZ minimizes peaking of the output filter under both no load conditions or with real world loads, including loudspeakers which usually exhibit a rising impedance with increasing frequency. Depending on the program material, the power rating of RZ may need to be adjusted. Typically 10 watts. If the system requires full power operation at 20kHz then the power rating for RZ will likely need to be increased. Output inductor, which in conjunction with CO, demodulates (filters) the switching waveform into an audio signal. Forms a second order filter with a cutoff frequency of f C = 1 ( 2 L O C O ) and a quality factor of Q = R L C O L O C O . Output capacitor, which, in conjunction with LO, demodulates (filters) the switching waveform into an audio signal. Forms a second order low-pass filter with a cutoff frequency of f C = 1 ( 2 L O C O ) and a quality factor of Q = R L C O L O C O . Use a high quality film capacitor capable of sustaining the ripple current caused by the switching outputs. Supply decoupling for the power supply sensing pins. For optimum performance, these components should be located close to the TA0105A and returned to analog ground.
CO
CVB
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Typical Performance
Noise Floor
VPP = |VNN| = +/-148V RL = 25 32k FFT FS = 65kHz BW = 22Hz - 20kHz(AES17) RFBC = 39k
+0 -10 -20 -30 -40 d B V -50 -60 -70 -80 -90 -100 -110 -120 20
d B r A
50
100 200
500 1k Hz
2k
5k
10k 20k
+0 VPP = |VNN| = +/-148V -10 RL = 25 -20 Po = 100Wrms -30 Vo = 50Vrms -40 BW = 22Hz - 22kHz RFBC = 39k -50 -60 -70 -80 -90 -100 -110 -120 50 100 200 500 1k 20 Hz
Channel Separation
2k
5k
10k 20k
10
THD+N vs Frequency
VPP = |VNN| = +/-106V 5 R = 25 L V = 25Vrms 2 RO = 26k FBC
10 VPP = |VNN| = +/-148V 5 R = 50 L 2 RO = 39k FBC 1 0.5
V = 50Vrms
THD+N vs Frequency
1 % 0.2
0.5
BW = 30kHz
%
0.2 0.1 0.05
0.1 0.05 0.02 0.01 0.005 20 50 100 200
BW = 30kHz
BW = 22kHz
0.02 0.01 0.005 20
BW = 22kHz
500 1k Hz
2k
5k
10k 20k
50
100 200
500 1k Hz
2k
5k 10k 20k
THD+N vs Output Voltage
10 5 2 1 0.5 % 0.2 0.1 0.05 0.02 0.01 1 2 5 10 V 20 50 100 200
f = 1kHz f = 7kHz
VPP = |VNN| = +/-106V R L = 12.5 AES 17 FILTER R FBC = 26k
10 5 2 1 0.5 % 0.2 0.1 0.05 0.02 0.01 1
THD+N vs Output Voltage
VPP = |VNN| = +/-106V RL = 25 AES 17 FILTER RFBC = 26k
f = 7kHz
f = 1kHz
2
5
10 V
20
50
100
200
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Typical Performance
THD+N vs Output Voltage
VPP = |VNN| = +/-148V R L = 25 AES 17 FILTER R FBC = 39k
10 5 2 1 0.5 % 0.2 0.1 0.05
10 5
THD+N vs Output Voltage
VPP = |VNN| +/-148V R L = 50 AES 17 FILTER 2R = 39k FBC 1
0.5 %
f =7kHz
0.2 0.1
f =1kHz
f =7kHz
0.05 0.02
f =1kHz
0.02 0.01 1 2 5 10 V 20 50 100 200
0.01
1
2
5
10 V
20
50
100
200
10 5 2 1 0.5 % 0.2 0.1 0.05 0.02 0.01 1
THD+N vs Output Voltage
RL = 12.5 f = 1kHz AES 17 FILTER RFBC = 26k Note: VPP = |VNN| = +/- 135V uses RFBC = 30k
VPP = |VNN| = +/-106V
10 5
VPP = |VNN| = +/-135V
THD+N vs Output Voltage
RL = 25 f = 1kHz AES 17 FILTER RFBC = 39k
2 1 0.5 % 0.2 0.1
VPP = |VNN| = +/-175V
VPP = |VNN| = +/-125V
VPP = |VNN| = +/-120V
0.05 0.02
VPP = |VNN| = +/-150V
2
5
10 V
20
50
100
200
0.01 1
2
5
10 V
20
50
100
200
10 5
THD+N vs Output Power
RL = 12.5 f = 1kHz AES 17 FILTER 2 RFBC = 26k Note: VPP = |VNN| = +/-135V 1 uses R = 30k FBC
10
THD+N vs Output Power
VPP = |VNN| = +/-135V
RL = 25 5 f = 1kHz AES 17 FILTER 2R FBC = 39k 1
VPP = |VNN| = +/-175V
0.5 % 0.2 0.1 0.05 0.02 0.01 2 5 10 20 50 100 200 W 500 1k 2k
VPP = |VNN| = +/-106V
0.5 % 0.2 0.1
VPP = |VNN| = +/-120V
VPP = |VNN| = +/-125V
0.05
VPP = |VNN| = +/-150V
0.02 0.01 1 2 5 10 20 50 100 200 W 500 1k 2k
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Typical Performance
Intermodulation Distortion
d B r A
+0 -10 19kHz, 20kHz 1:1 VO = 25Vrms -20 VPP = |VNN| = +/-106V -30 R = 50 L -40 32k FFT FS = 65kHz -50 -60 BW = <10Hz - 80kHz RFBC = 26k -70 -80 -90 -100 -110 -120 -130 -140 20 50 100 200 500 1k Hz
100 90 80
d B r A
2k
5k 10k
30k
+0 -10 19kHz, 20kHz 1:1 VO = 25Vrms -20 VPP = |VNN| = +/-148V -30 RL = 50 -40 32k FFT FS = 65kHz -50 BW = <10Hz - 80kHz -60 RFBC = 39k -70 -80 -90 -100 -110 -120 -130 20 50 100 200 500 1k Hz
100
Intermodulation Distortion
2k
5k
10k
30k
Efficiency vs Output Power RL = 25 RL = 12.5
Efficiency vs Output Power 90 80 Efficiency (%) 70 60 50 40 30 20 10 0
600
RL = 50 RL = 25
Efficiency (%)
70 60 50 40 30 20 10 0 0 100 200 300 400 Output Power (W) 500 VPP = |VNN| = +/-106V THD < = 10% f = 1kHz BW = 22Hz - 20kHz(AES17)
VPP = |VNN| = +/-148V THD < = 10% f = 1kHz BW = 22Hz - 20kHz(AES17) 0 100 200 300 Output Power (W)
E fficiency vs O utput V oltage
400
500
600
E fficiency vs O V utput oltage
100 90 80
100 90 80 70
Efficiency (%)
70 60 50 40 30 20 10 0 0 10 20 30 40 50 60 70 80 90
Efficiency (%)
60 50 40 30 20 10 0 0 20 40 60 80 100 120
V P=|V N =+/-106V P N| TH <=10% D f =1kH z B =22H - 20kH E 17) W z z(A S R =12.5 L
OV utput oltage(V s) rm
VPP=|VN | =+/-148V N TH <=10% D f =1kH z BW=22H - 20kH z z(AES17) R =25 L
O utput V oltage (Vrm s)
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Application Information
Figure 1 is a simplified diagram of one channel (Channel 1) of a TA0105A amplifier to assist in understanding its operation.
BBM0 BBM1
7 8
OVER CURRENT DETECTION V5
16 OCS1HP 15 OCS1HN 22 HO1 21 HO1COM
VN12 RG RS QO CHBR 0.1uF RG QO CS
+
VPP CS
CI
+
RI
IN1 6
+
AGND Offset Trim V5 Circuit ROFB ROFB 2.5V
LO CO RZ CZ
RL
ROFA
Processing & Modulation
COF OVER CURRENT DETECTION V5
20 LO1 17 LO1COM 13 OCS1LP 14 OCS1LN 11 OCR1
ROCR
RS VNN
+
CS
CS
5V
MUTE 4
18 FDBKN1 9 GNDKELVIN1
CFB AGND VPP 23 VNN 24 OVER/ UNDER VOLTAGE DETECTION 37 VHIGH 38 VLOW CVB AGND 35 HMUTE 2 OVERLOADB 1 AGND 28 PGND
RFB
RFB
CVB AGND
VN12 19
5V V5 3
CS
Figure 1: Simplified TA0105A Amplifier TA 0105A BA SIC AMPLIFIER OPERATION
The audio input signal is fed to the processor internal to the TA0105A, where a switching pattern is generated. The average idle (no input) switching frequency is approximately 700kHz and can be adjusted by changing the CFB value. The idle switching frequency must be maintained above 550kHz to ensure proper device operation. With an input signal, the pattern is spread spectrum and varies between approximately 200kHz and 1.5MHz depending on input signal level and frequency. Complementary copies of the switching pattern are level-shifted by the MOSFET drivers and output from the TA0105A where they drive the gates (HO1 and LO1) of external power MOSFETs that are connected as a half bridge. The output of the half bridge is a power-amplified version of the switching pattern that switches between VPP and VNN. This signal is then low-pass filtered to obtain an amplified reproduction of the audio input signal. The processor portion of the TA0105A is operated from a 5-volt supply. In the generation of the switching patterns for the output MOSFETs, the processor inserts a "break-before-make" dead time between the turn-off of one transistor and the turn-on of the other in order to minimize shoot-through currents in the MOSFETs. The dead time can be programmed by setting the break-before-make control bits, BBM1 and BBM0. Feedback information from the output of the half-bridge is supplied to the processor via FBKOUT1. Additional feedback information to account for ground bounce is supplied via FBKGND1.
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The MOSFET drivers in the TA0105A are operated from voltages obtained from VN12 and LO1COM for the low-side driver, and bootstrap voltage (internally generated) and HO1COM for the high-side driver. VN12 must be a regulated 12V above VNN. N-Channel MOSFETs are used for both the top and bottom of the half bridge. The gate resistors, RG, are used to control MOSFET slew rate and thereby minimize voltage overshoots. Though not shown, the gate diodes, DG, reduce the MOSFET turn-off time, thus resucing cross conduction and idle supply current.
C IRCU IT BOARD LA YOU T
The TA0105A is a power (high current) amplifier that operates at relatively high switching frequencies. The output of the amplifier switches between VPP and VNN at high speeds while driving large currents. This high-frequency digital signal is passed through an LC low-pass filter to recover the amplified audio signal. Since the amplifier must drive the inductive LC output filter and speaker loads, the amplifier outputs can be pulled above the supply voltage and below ground by the energy in the output inductance. To avoid subjecting the TA0105A and external mosfets to potentially damaging voltage stress, it is critical to have a good printed circuit board layout. It is recommended that Tripath's layout and application circuit be used for all applications and only be deviated from after careful analysis of the effects of any changes. Please refer to the TA0105A evaluation board document, RB-TA0105A, available on the Tripath website, at www.tripath.com. The following components are important to place near either their associated TA0105A or output MOSFET pins. The recommendations are ranked in order of layout importance, either for proper device operation or performance considerations.
-
The impedance of the output node (the connection between the top side MOSFET source to bottom side MOSFET drain) must be minimized. Reducing the parasitic trace inductance is the most effective way of limiting output node ringing. A flat, bar conductor, in parallel with the PCB output node trace, is quite effective at minimizing the inductance thereby reducing output transients due to the switching architecture. The capacitors, CHBR, provide high frequency bypassing of the amplifier power supplies and will serve to reduce spikes and modulation of the power supply rails. Please note that both mosfet half-bridges must be decoupled separately. In addition, the voltage rating for CHBR should be at least 400V as this capacitor is exposed to the full supply range, VPP-VNN. The output diodes, DO, are used to minimize overshoots/undershoots on the output node. Please note that the proper connection of these is "Drain to Drain" and "Source to Source" as shown in the Application/Test Circuit. Improper routing of these diodes will render them useless due to PCB trace inductance. The gate resistors, RG, should be located as close to the output MOSFET gates leads as possible. In addition, the trace length from the pins LOx/HOx to the gate resistor should be minimized. To reduce the loop area, a parallel trace from LOxCOM/HOxCOM should be routed directly to the respective MOSFET source lead. CFB removes very high frequency components from the amplifier feedback signals and lowers the output switching frequency by delaying the feedback signals. In addition, the value of CFB is different for channel 1 and channel 2 to keep the average switching frequency difference greater than 40kHz. This minimizes in-band audio noise. Locate these capacitors as close to their respective TA0105A pin as possible.
-
-
-
-
Some components are not sensitive to location but are very sensitive to layout and trace routing.
-
The routing of the sense resistors, RS, must be Kelvin connected. This implies a direct trace from the respective TA0105A pin to the sense resistor lead without interruption. If additional
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connections are made to the TA0105A overcurrent sense pins or the traces, the overcurrent sense circuit may prematurely trigger.
-
To maximize the damping factor and reduce distortion and noise, the modulator feedback connections should be routed directly to the pins of the output inductors. LO. Please refer to the RB-TA0105AThis was done on the RB-TA0105A for additional information. The output filter capacitor, CO, and zobel capacitor, CZ, should be star connected with the load return. The output ground feedback signal should be taken from this star point. To minimize the possibility of any noise pickup, the trace lengths of IN1 and IN2 should be kept as short as possible. This is most easily accomplished by locating the input resistors, RI as close to the TA0105A as possible. In addition, the offset trim resistor, ROFB, which connects to either IN1,or IN2, should be located close to the TA0105A input section.
-
TA 01 05A GR OUND ING
Proper grounding techniques are required to maximize TA0105A functionality and performance. Parametric parameters such as THD+N, Noise Floor and Crosstalk can be adversely affected if proper grounding techniques are not implemented on the PCB layout. The following discussion highlights some recommendations about grounding both with respect to the TA0105A as well as general "audio system" design rules. The TA0105A is divided into two sections: the input section, which spans pins 1-12 and pins 35-38 and the output (high voltage) section, which spans pins 13 through pin 34. On the TA0105A evaluation board, the ground is also divided into distinct sections, one for the input and one for the output. To minimize ground loops and keep the audio noise floor as low as possible, the input and output ground should not be externally connected. They are already connected internally via a ferrite bead between pin 1 and pin 28. Additionally, any external input circuitry such as preamps, or active filters, should be referenced to pin 1. For the power section, Tripath has traditionally used a "star" grounding scheme. Thus, the load ground returns and the power supply decoupling traces are routed separately back to the power supply. In addition, any type of shield or chassis connection would be connected directly to the ground star located at the power supply. These precautions will both minimize audible noise and enhance the crosstalk performance of the TA0105A. The TA0105A incorporates a differential feedback system to minimize the effects of ground bounce and cancel out common mode ground noise. As such, the feedback from the output ground for each channel needs to be properly sensed. This can be accomplished by connecting the output ground "sensing" trace directly to the star formed by the output ground return, output capacitor, CO, and the zobel capacitor, CZ. Refer to the Application / Test Circuit for a schematic description.
TA 0105A TH ERMA L MANAGEMENT
The bottom of the TA0105A module is a metal plate and serves as a heat sink for the internal MOSFET drivers. The temperature of this plate is directly related to the power dissipated in the output drivers. The power dissipated is broken up into two main areas, the VN12 power, and the power needed to charge the parasitic capacitances. These capacitances are internal to the MOSFET driver and the power to charge these comes from VPP and flows to VNN. Thus, as the supply voltage difference VPP-VNN increases, the amount of dissipation also increases. Due to the increase in supply voltage, the TA0105A will run hotter than previous Tripath hybrids such as the TA0104A. Thus, depending on system airflow, and the actual power supply voltages, it may be necessary to attach an additional heat sink to the back plate or install a small fan to increase airflow directly around the hybrid. Of note, the back plate has a high impedance connection to VNN.
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TA 01 05A A MPL IF IER GA IN
The gain of the TA0105A is the product of the input stage gain and the modulator gain. Please refer to the sections, Input Stage Design, and Modulator Feedback Design, for a complete explanation of how to determine the external component values.
A VTA0105A = A VINPUTSTAG
E
* A V MODULATOR
A VTA0105A -
20k (1.0k + R FB ) * 2.02 + 1 4.99k + R I 1020
For example, using a TA0105A with the following external components, RI = 34.8k RFB = 39.2k
AVTA0105A -
20k 40.2k * 2.02 V + 1 = - 40.52 39.79k 1020 V
INPUT STAGE DESIGN
The TA0105A input stage is an inverting amplifier, with a maximum gain of 4. Figure 2 shows a typical application where the input stage is a constant gain inverting amplifier. The input stage gain should be set so that the maximum input signal level will drive the input stage output to 4Vpp. Please note that the input is biased between V5 and AGND. Thus, the polarity of CI must be observed. The gain of the input stage, above the low frequency high pass filter point, is that of a simple inverting amplifier:
A VINPUTSTAG
E
=-
20k 4.99k + R I
TA0105A
V5 CI INPUT1 RI IN1 20K AGND V5 + 20K IN2 4.99K AGND + 2.5V CI INPUT2 RI 4.99K
Figure 2: Input Stage
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IN PUT CAPAC ITOR SELECTION
CI can be calculated once a value for RIN has been determined. CI and RI determine the input lowfrequency pole. Typically this pole is set at 10Hz. CI is calculated according to: CI = 1 / (2 x FP x RI) where: RI = Input resistor value in ohms FP = Input low frequency pole (typically less than 10Hz)
MODULA TOR FEEDBACK D ESIGN
The modulator converts the signal from the input stage to the high-voltage output signal. The optimum gain of the modulator is determined from the maximum allowable feedback level for the modulator and maximum supply voltages for the power stage. Depending on the maximum supply voltage, the feedback ratio will need to be adjusted to maximize performance. The value of RFB, in conjunction with resistors internal to the TA0105A hybrid, (see explanation below) define the gain of the modulator. Once these values are chosen, based on the maximum supply voltage, the gain of the modulator will be fixed even as the supply voltage fluctuates due to current draw. For the best signal-to-noise ratio and lowest distortion, the maximum modulator feedback voltage should be approximately 4.5Vpp. This will keep the gain of the modulator as low as possible and still allow headroom so that the feedback signal does not clip the modulator feedback stage. It should be noted that the modulator works over basically a 2:1 supply voltage ratio with optimum performance around 3.5Vpp4Vpp of feedback. Thus, the actual value of RFB may need to be adjusted from the typical value (39.2k) shown in the Application/Test Circuit to achieve maximum performance. Figure 3 shows how the feedback from the output of the amplifier is returned to the input of the modulator. The input to the modulator (FDBKN1/GNDKELVIN1 for channel 1) can be viewed as inputs to an inverting differential amplifier. The internal 1k and 1.02k resistors bias the feedback signal to approximately 2.5V and RFB, along with the internal series 1k, scales the large output1 signal to down to approximately 4Vpp, depending on the supply voltage, VPP and VNN.
1/2 TA0105A
V5 1.02K 1.02K
Processing & Modulation
1.0K 1.0K
FDBKN1 GNDKELVIN1
RFB OUTPUT 1 RFB OUTPUT 1 GROUND
1.02K
1.02K
AGND
Figure 3: Modulator Feedback
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The feedback resistors, RFB, can be calculated using the following formula:
R FB =
1.0k * VPP - 1.0k 4.5
The above equation assumes that VPP=|VNN|. The gain of the modulator can be calculated using the following formula:
A V - MODULATOR
(R FB + 1.0k ) * 2.02 +1 1020
For example, in a system with VPPMAX=185V and VNNMAX=-185V, RFB = 40.11k, use 39.2k, 1% The resultant modulator gain is:
A V - MODULATOR
MUTE
40.2k * 2 . 02 + 1 = 80.61V/V 1020
When a logic high signal is supplied to MUTE, both amplifier channels are muted (both high- and low-side transistors are turned off). When a logic level low is supplied to MUTE, both amplifiers are fully operational. There is a delay of approximately 200 milliseconds between the de-assertion of MUTE and the un-muting of the TA0105A. Please note that when the amplifier is in mute, the outputs are in a high impedance state and thus, the feedback resistors will set the output at approximately 2.5V without a load connected. To ensure proper device operation, including minimization of turn on/off transients that can result in undesirable audio artifacts, Tripath recommends that the TA0105A device be muted prior to power up or power down of the 5V supply. The "sensing" of the V5 supply can be easily accomplished by using a "microcontroller supervisor" or equivalent to drive the TA0105A mute pin high when the V5 voltage is below 4.5V. This will ensure proper operation of the TA0105A input circuitry. A micro-controller supervisor such as the MCP101-450 from Microchip Corporation has been used by Tripath to implement clean power up/down operation.
H MUT E
The HMUTE pin is a 5V logic output that indicates various fault conditions within the device. These conditions include: over-current, overvoltage and undervoltage. The HMUTE output is capable of directly driving an LED through a series 2k resistor.
TU RN-ON & TU RN-OFF NOISE
If turn-on or turn-off noise is present in a TA0105A amplifier, the cause is frequently due to other circuitry external to the TA0105A. While the TA0105A has circuitry to suppress turn-on and turn-off transients, the combination of the power supply and other audio circuitry with the TA0105A in a particular application may exhibit audible transients. In addition, a non-trimmed output offset will created an audible click on turn-on and turnoff. One solution that will completely eliminate turn-on and turn-off pops and clicks (assuming a nulled output offset) is to use a relay to connect/disconnect the amplifier from the speakers with the appropriate timing at power on/off. The relay can also be used to protect the speakers from a component failure (e.g. shorted output MOSFET). "DC protection" circuitry would need to be implemented external to the TA0105A detect such failures.
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As stated in the Mute section above, a common cause of turn off pops can be attributed to the 5V supply collapsing while the other supply rails are still present. On power down, mute should be activated (pulled high) before the power supplies, especially the 5V, begin to collapse. A microcontroller supervisor, now available from multiple manufacturers, is a good way to insure proper control of the mute during power supply sequencing.
DC OFFSET
While the DC offset voltages that appear at the speaker terminals of a TA0105A amplifier are typically small, Tripath recommends that any offsets during operation be nulled out of the amplifier with a circuit like the one shown connected to IN1 and IN2 in the Application/Test Circuit. It should be noted that the DC voltage on the output of a TA0105A amplifier with no load in mute will not be zero. This offset does not need to be nulled. The output impedance of the amplifier in mute mode is approximately 40K(RFB + 1.0k). This means that the DC voltage drops to essentially zero when a typical load is connected.
OVER-CURR ENT PROTEC TION
The TA0105A has over-current protection circuitry to protect itself and the output transistors from shortcircuit conditions. The TA0105A measures the voltage across a resistor, RS (via OCSxHP, OCSxHN, OCSxLP and OCSxLN) that is in series with each output MOSFET to detect an over-current condition. RS and ROCR are used to set the over-current threshold. The OCS pins must be Kelvin connected for proper operation. This implies connecting a trace directly from the resistor lead to the respective sense pin. No other current or power supply connections should be made to the OCS pins of the TA0105A. Doing so will result in false overcurrent events due to the IR losses of the PCB trace. See "Circuit Board Layout" in Application Information for additional details. When the voltage across ROCR becomes greater than VTOC (typically 0.97) the TA0105A will shut off the output stages of its amplifiers. The occurrence of an over-current condition is latched in the TA0105A and can be cleared by toggling the MUTE input or cycling power.
SETTING OVER-CURR ENT THRESHOLD
RS and ROCR determine the value of the over-current threshold, IOC: IOC = 4990 x (VTOC - IBIAS * (9100+ROCR))/((9100+R OCR) * RS) ROCR = ((4990 x VTOC)/(IOC * RS+ 4990 * IBIAS)) - 9100 where: RS and ROCR are in VTOC = Over-current sense threshold voltage (See Electrical Characteristics Table) = 0.97V typically IBIAS = 15uA For example, to set an IOC of 10A, ROCR = 18.58K (use 20K, 1%) and RS will be 10m. As high-wattage resistors are usually only available in a few low-resistance values (10m, 25m and 50m), ROCR can be used to adjust for a particular over-current threshold using one of these values for RS. It should be noted that the overcurrent trip level has a "duty cycle" dependence of roughly 2:1. This is due to the peak current detection (with some filtering) nature of the protection circuit implemented on the TA0105A. Thus, a current limit into a "short" will produce a peak current level roughly twice that of an over-current into a 12.5 (or higher) load. Most mosfets can withstand 3-4 times the rated continuous current for short durations (less than 100uS).
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O V ER- A N D U N D ER- V O LTAG E P R O TEC T ION
The TA0105A senses the power rails through the VPP and VNN pins on the module. These voltages are converted to currents by internal resistor networks connected to VLOW and VHIGH. The over- and undervoltage limits are determined by the internal bias currents, the values of the resistors in the networks, along with process variations. If the supply voltage falls outside the upper and lower limits determined by the resistor networks, the TA0105A shuts off the output stages of the amplifiers. The removal of the overvoltage or under-voltage condition returns the TA0105A to normal operation. Please note that trip points specified in the Electrical Characteristics table are at 25C and may change over temperature. Once the supply comes back into the supply voltage operating range (as defined by the power supply sense resistors), the TA0105A will automatically be un-muted and will begin to amplify. There is a hysteresis range on both the VPP and VNN supplies. If the amplifier is powered up in the hysteresis band, the TA0105A will be muted. Thus, the usable supply range is the difference between the overvoltage restart and under-voltage restart points for both the VPP and VNN supplies. It should be noted that there is a timer of approximately 200mS with respect to the over and under voltage sensing circuit. Thus, the supply voltage must be outside of the user defined supply range for greater than 200mS for the TA0105A to be muted. The overvoltage and undervoltage resistor values were chosen for the maximum supply range possible based on the internal hybrid components in conjunction with internal bias current settings. It is possible to lower the supply range via an external "parallel" resistor connected from VPP (pin23) to VHIGH (pin 37) and a second resistor connected from VNN (pin 24) to VLOW (pin 38). The delta between each of the trip points is a fixed ratio and not externally controllable. The current flowing into VHIGH controls the supply range for VPP while the current flowing out of VLOW controls the supply range for VNN. The procedure for shifting the VPP range is as follows. 1) Choose the maximum VPP undervoltage turn on voltage point, VPPUVTONMAX 2) Use the following equation to calculate the external parallel resistor, RVPP1
R VPP1 =
(VPP UVTONMAX - 2.5V) 80 A - ( VPP UVTONMAX ) 1.4M
3) Use the following equation to calculate the resulting minimum VPP overvoltage restart point, VPPOVRSTMIN
VPP OVRSTMIN
4)
=
2.5 1.4M + (1.4M * R VPP1 138 A) 1.4M + R VPP1
Use the following equation to calculate the resulting maximum VPP undervoltage restart point, VPPUVRSTMAX
VPP UVRSTMAX
=
2.5 1.4M + (1.4M * R VPP1 86 A) 1.4M + R VPP1
The usable (inside the hysteresis band) positive supply range is defined by VPPOVRSTMIN minus VPPUVRSTMAX. A similar procedure for shifting the VNN range is as follows. 1) Choose the maximum VNN undervoltage turn on voltage point, VNNUVTONMAX. 2) Use the following equation to calculate the external parallel resistor, RVNN1.
R VNN1 =
(1.25V + | VNN UVTONMAX | ) |VNN UVTONMAX | 87 A 1.27M
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3) Use the following equation to calculate the resulting minimum VNN overvoltage restart point, VNNOVRSTMIN
VNN OVRSTMIN
=
1.25 - R VNN1 152 A R VNN1 +1 1.27M
4) Use the following equation to calculate the resulting maximum VPP undervoltage restart point, VNNUVRSTMAX
VNN UVRSTMAX
=
1.25 - R VNN1 95 A R VNN1 +1 1.27M
The usable (inside the hysteresis band) negative supply range is defined by VNNOVRSTMIN minus VNNUVRSTMAX.
TA0105A
VNN 24 VNN
RVNN1 38 1000pF AGND VPP 23 VLOW
VPP
RVPP1 37 1000pF AGND VHIGH
Figure 4: External Overvoltage and Undervoltage Shift
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VN1 2 SU PPL Y
VN12 is an additional supply voltage required by the TA0105A. VN12 must be 12 volts more positive than the nominal VNN. VN12 must track VNN. Generating the VN12 supply requires some care. The proper way to generate the voltage for VN12 is to use a 12V-postive supply voltage referenced to the VNN supply. Figure 5 shows the correct way to power the TA0105A:
VPP V5 5V PGND VNN 12V VNN AGND VN12
VPP
Figure 5: Proper Power Supply Connection
One apparent method to generate the VN12 supply voltage is to use a negative IC regulator to drop PGND down to 12V (relative to VNN). This method will not work since negative regulators only sink current into the regulator output and will not be capable of sourcing the current required by VN12. Furthermore, problems will arise since VN12 will not track movements in VNN. A common approach is to use an additional secondary on the power transformer to generate an isolated, say 15VAC voltage. This AC voltage is then full bridge rectified and filtered to produce a DC input voltage for a LM7812 or similar. The "ground" of the LM7812 is then connected to VNN and thus VN12 will be properly referenced. Please refer to Figure 6.
IN
LM7812
GND
OUT +
15VAC
+
VN12
AC LINE INPUT
+
VPP
+
PGND VNN
Figure 6: Proper VN12 Supply Generation OU TPUT TRAN SISTOR SELECTION
The key parameters to consider when selecting what MOSFET to use with the TA0105A are drain-source breakdown voltage (BVdss), gate charge (Qg), and on-resistance (RDS(ON)). The BVdss rating of the MOSFET needs to be selected to accommodate the voltage swing between VSPOS and VSNEG as well as any voltage peaks caused by voltage ringing due to switching transients. With a `good' circuit board layout, a BVdss that is 25% higher than the VPP and VNN voltage swing is a reasonable starting point. The BVdss rating should be verified by measuring the actual voltages
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experienced by the MOSFET in the final circuit. Thus, for TA0105A "typical" applications a mosfet with 500V rating is required. Ideally a low Qg (total gate charge) and low RDS(ON) are desired for the best amplifier performance. Unfortunately, these are conflicting requirements since RDS(ON) is inversely proportional to Qg for a typical MOSFET. The design trade-off is one of cost versus performance. A lower RDS(ON) means lower I2RDS(ON) losses but the associated higher Qg translates into higher switching losses (losses = Qg x 12 x 1.2MHz). A lower RDS(ON) also means a larger silicon die and higher cost. A higher RDS(ON) means lower cost and lower switching losses but higher I2RDSON losses. The following table lists BVdss, Qg and RDS(ON) for MOSFETs that Tripath has used with the TA0105A.
Part Number STW20NM50FD STW20NM50 STW18NB40 Manufacturer ST Microelectronics ST Microelectronics ST Microelectronics BVDSS (V) 500 500 400 ID (A) 20 20 18.4 Qg (nC) 38 40 60 RDS(on) () 0.22 0.22 0.19 PD (W) 214 214 190 Package TO247 TO247 TO247
GA T E RESIST OR / GAT E D IODE SEL ECT ION
The gate resistors, RG, are used to control MOSFET switching rise/fall times and thereby minimize voltage overshoots. They also dissipate a portion of the power resulting from moving the gate charge each time the MOSFET is switched. If RG is too small, excessive heat can be generated in the driver. Large gate resistors lead to slower MOSFET switching, which requires a larger break-before-make (BBM) delay. In addition, it is strongly recommended to use a schottky or ultra-fast PN junction diode in parallel with the gate resistor as shown in the Application/Test Schematic. This diode serves to "speed up" the turn-off of the output devices further reducing cross conduction and minimizing output stage idle current. A typical gate resistor value for the mosfets recommended above is 33ohms. This resistor value assumes the use of a 1A 40V(or greater) schottky diode such as an IRF 11DQ04 or General Semiconductor SS16. Ultra fast recovery diodes will also work adequately for the gate diode, DG.
BR EAK-B EFOR E-MAK E (BB M) TIMING CON TROL
The half-bridge power MOSFETs require a deadtime between when one transistor is turned off and the other is turned on (break-before-make) in order to minimize shoot through currents. BBM0 and BBM1 are logic inputs (connected to logic high or pulled down to logic low) that control the break-before-make timing of the output transistors according to the following table.
BBM1 0 0 1 1
BBM0 0 1 0 1
Delay 145 ns 105 ns 65 ns 25 ns
Table 1: BBM Delay
The tradeoff involved in making this setting is that as the delay is reduced, distortion levels improve but shoot-through and power dissipation increase. The actual amount of BBM required is dependent upon components such as MOSFET type and gate resistor value as well as circuit board layout. The BBM value selected should be verified in the actual application circuit board. It should also be verified under maximum temperature and power conditions since shoot-through in the output MOSFETs can increase under these conditions, possibly requiring a higher BBM setting than at room temperature.
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OU T PU T FIL T ER D ESIGN
One advantage of Tripath amplifiers over PWM solutions is the ability to use higher-cutoff-frequency filters. This means load-dependent peaking/droop in the 20kHz audio band potentially caused by the filter can be made negligible. Furthermore, speakers are not purely resistive loads and the impedance they present changes over frequency and from speaker model to speaker model. Tripath recommends designing the filter as a 2nd order, LC filter. Tripath has obtained good results with LO = 33uH and CO = 0.22uF (resonant frequency of 59kHz). The filter capacitor must be able of sustain the ripple current caused by the high frequency switching. Thus, a high quality film capacitor is strongly recommended. The typical application of the TA0105A is driving "high impedance" loads from 12.5 ohms and above. This dictates the use of a larger value output inductor, LO, as compared to other Tripath amplifiers to minimize in band output filter peaking and match better to the intended load impedance. There is a compromise between inductor value and amplifier efficiency. Tripath amplifiers count on the inductor current making "free" transitions. Take the case where the inductor current is flowing out towards the load. This is the case where there is a positive going output waveform. When the top side device turns off, the output voltage will "flip" to keep the inductor current in the same direction. If the entire transition of the output voltage (from VPP to VNN) occurs before the bottom side device is enhanced, then the transition is free. This has a positive effect on amplifier efficiency. If the bottom side device turns on before the transition is completed then power is wasted and the amplifier efficiency suffers. The output transition time is directly proportional to the inductor value and the supply voltage. Thus, larger values of inductance (for a given fet output capacitance) will result in longer transition times and decreased efficiency for a fixed supply rail. The value of LO, 33uH, recommended above was chosen as a reasonable compromise between efficiency and load "damping." An upper bound on LO without totally sacrificing efficiency, is 47uH for typical TA0105A supply voltages and the STW20NM50FD fets. Above this value, the designer should fully characterize the amplifier efficiency before settling on the inductor value. The peaking exhibited by a lightly loaded LC filter can be equalized out (to some degree) by an input RC filter located before the input coupling capacitor, CI. This will result in a flatter magnitude response over a wider range of output loads. In addition, it will provide additional protection (beyond that provided by the zobel network) against high frequency signals that can cause the output filter to resonate. The core material of the output filter inductor has an effect on the distortion levels produced by a TA0105A amplifier. Tripath recommends low-mu type-2 iron powder cores because of their low loss and high linearity (available from Micrometals, www.micrometals.com). The specific core used on the RBTA0105A was a T106-2 wound with 49 turns of 18AWG wire. Tripath also recommends that an RC damper be used after the LC low-pass filter. No-load operation of a TA0105A amplifier can create significant peaking in the LC filter, which produces strong resonant currents that can overheat the output MOSFETs and other components. The RC dampens the peaking and prevents problems. Tripath has obtained good results with RD = 15 and CD = 0.22uF. The zobel resistor must be able dissipate the power of the LC resonance as well as the remainder of high frequency energy that passes through the LC filter. A typical power rating for this resistor is 10W. The zobel resistor power capability will need to increased if the application requires full power at 20kHz. The zobel capacitor must be able to sustain the ripple current caused by the high frequency switching. Thus, a high quality film capacitor is recommended.
L OW-FR EQU ENC Y POW ER SUPPL Y PUMPING
A potentially troublesome phenomenon in single-ended switching amplifiers is power supply pumping. This phenomenon is caused by current from the output filter inductor flowing into the power supply output filter capacitors in the opposite direction as a DC load would drain current from them. Under certain conditions (usually low-frequency input signals), this current can cause the supply voltage to "pump" (increase in magnitude) and eventually cause over-voltage/under-voltage shut down. Moreover, since
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over/under-voltage are not "latched" shutdowns, the effect would be an amplifier that oscillates between on and off states. If a DC offset on the order of 0.3V is allowed to develop on the output of the amplifier (see "DC Offset Adjust"), the supplies can be boosted to the point where the amplifier's over-voltage protection triggers. One solution to the pumping issue it to use large power supply capacitors to absorb the pumped supply current without significant voltage boost. The low-frequency pole used at the input to the amplifier determines the value of the capacitor required. This works for AC signals only. A no-cost solution to the pumping problem uses the fact that music has low frequency information that is correlated in both channels (it is in phase). This information can be used to eliminate boost by putting the two channels of a TA0105A amplifier out of phase with each other. This works because each channel is pumping out of phase with the other, and the net effect is a cancellation of pumping currents in the power supply. The phase of the audio signals needs to be corrected by connecting one of the speakers in the opposite polarity as the other channel.
PERFOR MANC E MEASUR EMENT S OF A TA0 105A AMPL IF IER
Tripath amplifiers operate by modulating the input signal with a high-frequency switching pattern. This signal is sent through a low-pass filter (external to the TA0105A) that demodulates it to recover an amplified version of the audio input. The frequency of the switching pattern is spread spectrum and typically varies between 200kHz and 1.5MHz, which is well above the 20Hz - 22kHz audio band. The pattern itself does not alter or distort the audio input signal but it does introduce some inaudible noise components. The measurements of certain performance parameters, particularly those that have anything to do with noise, like THD+N, are significantly affected by the design of the low-pass filter used on the output of the TA0105A and also the bandwidth setting of the measurement instrument used. Unless the filter has a very sharp roll-off just past the audio band or the bandwidth of the measurement instrument ends there, some of the inaudible noise components introduced by the Tripath amplifier switching pattern will get integrated into the measurement, degrading it. Tripath amplifiers do not require large multi-pole filters to achieve excellent performance in listening tests, usually a more critical factor than performance measurements. Though using a multi-pole filter may remove high-frequency noise and improve THD+N type measurements (when they are made with widebandwidth measuring equipment), these same filters can increase distortion due to inductor non-linearity. Multi-pole filters require relatively large inductors, and inductor non-linearity increases with inductor value.
EMU LAT ING A TA01 04A U SING A TA 01 05A MODUL E This following information is provided as a legacy set of instructions. Tripath has recently released a product named the TDA2500. The over-current circuit in the TDA2500 is much closer to that in the TA0104A, as compared to the TA0105A. Thus, for new designs, when trying to replace a TA0104A (or TA0102A or TA0103A), please use the TDA2500. A data sheet for the TDA2500 is available at www.tripath.com.
The TA0105A and TA0104A are structurally very similar employing the same block diagram. The TA0105A gain and Overvoltage/Undervoltage range is roughly double that of the TA0104A. The voltage rating on the TA0105A hybrid components are 200V, thus operating at lower voltages does not cause any problem assuming that the external, user selectable, components are properly chosen. For ease of use, the "voltage shifting" components are external to theTA0105A, allowing the user to choose the voltage range, depending on the specific application. A common application is emulating a TA0104A with its associated gain and voltage range. Below is a list of instructions along with diagrams of the modifications needed to implement a "TA0104A" design. It should be noted that if some intermediate range is needed, that the feedback and overvoltage/undervoltage resistors can be adjusted based on the equations given in previous sections of the Application Information.
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Change the feedback resistors, RFB, to 18.7K, 1/4W. This requires a total of four resistors (2 per channel) as both the FDBKNx and GNDKELVINx nodes need to have the series resistors inserted. This scales the amplifier feedback properly for the TA0104A supply range and results in the same gain as a standard TA0104A design. The resulting gain equation is as follows. The modifications needed for channel 1 are shown in Figure 7.
AV -
20k 19.7k * 2.02 + 1 4.99k + R I 1020
1/2 TA0105A
V5 1.02K 1.02K
Processing & Modulation
1.0K 1.0K
GNDKELVIN1 9 FDBKN1 18
18.7K 1/4W 18.7K 1/4W CFB AGND
OUTPUT 1 GROUND OUTPUT 1
1.02K
1.02K
AGND
Figure 7: Feedback Structure for TA0104A Emulation -
Add the resistor dividers to both VLOW and VHIGH as shown in Figure 8. These resistors lower the supply range of the TA0105A to roughly +/-59V to +/-93V, with a maximum undervoltage turn on voltage of +/-55V, assuming worse case tolerances. It should be noted that the TA0104A voltage specification of +/-55V to +/-92V were the undervoltage and overvoltage turn on points, not the inner hysteresis band. The "hot side" of the VNN and VPP resistors should be connected to pin 24 and pin 23, respectively. Surface mount types can be used (1/8W is fine) though the resistors need to 1% tolerance. Please note that the recommended resistor values are slightly different than those used in the TA0104A. This was done intentionally to produce a symmetrical supply range for VPP and VNN. The overvoltage and undervoltage values used on the TA0104A resulted in a slightly asymmetrical voltage supply range that is clearly undesirable. Using 4 external resistors (as opposed to two shown earlier in this data sheet) results in the most symmetrical supply range possible.
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V5 VNN
TA0105A
3.57M 1.21M 38 1000pF AGND V5 VPP VLOW
1.33M
1.33M 37 1000pF AGND VHIGH
Figure 8: Voltage Supply Sensing Structure for TA0104A Emulation -
Add the 1000pF capacitors (CVB). These capacitors stabilize the sensing circuit resulting in repeatable voltage trip points. Please note that the return point is to analog ground (pin 1 on the TA0105A). The values of CFB should be reevaluated. It is likely that the value for channel 2 will need to be increased as compared to the previous TA0104A design due to slightly different internal compensation. For best performance make sure that the difference between the two channels idle switching frequency is greater than 40kHz. In addition, make sure that the idle switching frequency of both channels is maintained above 575kHz. Other components such as output filter values, MOSFET type, gate resistor values, etc. should remain unchanged from the TA0104A design. Typical output filter components are 11uH, 0.22uF along with appropriate zobel compensation (15ohm/5W and 0.22uF). Typical MOSFET choice is the STW34NB20 or similar along with 5.6ohm gate resistors. The Application/Test Circuit provided earlier in this data sheet is intended for +/-185V (maximum), "high impedance" operation, not for driving low impedance loads like those typically used in TA0104A applications. It is highly recommended that the supply bypassing (CHBR) and diode (DO) clamping structure shown in the Application/Test circuit is utilized for new designs. This structure has been shown to minimize output node transients during high current events and will result in a more robust design.
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Package Information
38 Pin Quad Module
180mil. (4.6mm) 750mil. (19mm) 180mil. (4.6mm) 485mil. (12.3mm) 1 2 100mil. (2.54mm) 2030mil. (51.6mm) MAX 2087mil. (53mm) 3 4 5 1670mil. (42.4mm) 6 7 8 27 26 25 24 23 22 21 20 38 37 36 35 34
2500mil. (63.5mm)
33
32
31
30
29
28
9
10
11
12
13
14
15
16
17
18
19
2858mil. (72.6mm) MAX 2913mil. (74mm)
565mil. (14.34mm) MAX 610mil (15.5mm) 336mil. (8.54mm) 236mil. (6mm)
30mil. (0.85mm) 100mil. (2.54mm)
Phyco Socket: 4150-1 x 8SF1 8 position header female 4150-1 x 1SF1 11 position header female
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Tripath and Digital Power Processing are trademarks of Tripath Technology Inc. referenced in this document are owned by their respective companies.
Other trademarks
Tripath Technology Inc. reserves the right to make changes without further notice to any products herein to improve reliability, function or design. Tripath does not assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent rights, nor the rights of others. TRIPATH'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN CONSENT OF THE PRESIDENT OF TRIPATH TECHNOLOGY INC. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and whose failure to perform, when properly used in accordance with instructions for use provided in this labeling, can be reasonably expected to result in significant injury to the user. 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.
Contact Information
TRIPATH TECHNOLOGY, INC
2560 Orchard Parkway, San Jose, CA 95131 408.750.3000 - P 408.750.3001 - F For more Sales Information, please visit us @ www.tripath.com/cont_s.htm For more Technical Information, please visit us @ www.tripath.com/data.htm
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