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STS3DPFS40 P-CHANNEL 40V - 0.070 - 3A SO-8 STripFETTM MOSFET PLUS SCHOTTKY RECTIFIER PRELIMINARY DATA MAIN PRODUCT CHARACTERISTICS MOSFET VDSS 40 V SCHOTTKY IF(AV) 3A RDS(on) < 0.1 VRRM 40 V ID 3A V F(MAX) 0.51 V SO-8 DESCRIPTION This product associates the latest low voltage STripFETTM in p-channel version to a low drop Schottky diode. Such configuration is extremely versatile in implementing, a large variety of DC-DC converters for printers, portable equipment, and cellular phones. INTERNAL SCHEMATIC DIAGRAM MOSFET ABSOLUTE MAXIMUM RATINGS Symbol VDS VDGR VGS ID ID IDM (q) PTOT Parameter Drain-source Voltage (VGS = 0) Drain-gate Voltage (RGS = 20 k) Gate- source Voltage Drain Current (continuos) at TC = 25C Drain Current (continuos) at TC = 100C Drain Current (pulsed) Total Dissipation at TC = 25C Value 40 40 16 3 1.9 12 2 Unit V V V A A A W SCHOTTKY ABSOLUTE MAXIMUM RATINGS Symbol VRRM IF(RMS) IF(AV) IFSM IRRM IRSM dv/dt Parameter Repetitive Peak Reverse Voltage RMS Forward Current Average Forward Current Surge Non Repetitive Forward Current Repetitive Peak Reverse Current Non Repetitive Peak Reverse Current Critical Rate Of Rise Of Reverse Voltage TL = 125C = 0.5 tp = 10 ms Sinusoidal tp = 2 s F = 1kHz tp = 100 s Value 40 20 3 75 1 1 10000 Unit V A A A A A V/s 1/6 (*)Pulse width limited by safe operating area November 2000 Note: For the P-CHANNEL MOSFET actual polarity of Voltages and current has to be reversed STS3DPFS40 THERMAL DATA Rthj-amb Rthj-amb Tstg Tl (*)Thermal Resistance Junction-ambient MOSFET (*)Thermal Resistance Junction-ambient SCHOTTKY Maximum Storage Temperature Range Junction Temperature (*) Mounted on FR-4 board (Steady State) 62.5 100 -65 to 150 150 C/W C/W C C MOSFET ELECTRICAL CHARACTERISTICS (TCASE = 25 C UNLESS OTHERWISE SPECIFIED) OFF Symbol V(BR)DSS IDSS IGSS Parameter Drain-source Breakdown Voltage Zero Gate Voltage Drain Current (V GS = 0) Gate-body Leakage Current (VDS = 0) Test Conditions ID = 250 A, VGS = 0 VDS = Max Rating VDS = Max Rating, TC = 125 C VGS = 16 V Min. 40 1 10 100 Typ. Max. Unit V A A nA ON (1) Symbol VGS(th) R DS(on) ID(on) Parameter Gate Threshold Voltage Static Drain-source On Resistance On State Drain Current Test Conditions VDS = VGS, ID = 250A VGS = 10V, ID = 1.5 A VDS > ID(on) x RDS(on)max, VGS = 10V 3 Min. 2 Typ. 3 0.070 Max. 4 0.1 Unit V A DYNAMIC Symbol gfs (1) C iss Coss Crss Parameter Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Test Conditions VDS > ID(on) x RDS(on)max, ID = 1.5 A VDS = 25V, f = 1 MHz, VGS = 0 Min. Typ. 6 1190 200 56 Max. Unit S pF pF pF 2/6 STS3DPFS40 ELECTRICAL CHARACTERISTICS (CONTINUED) SWITCHING ON Symbol td(on) tr Qg Qgs Q gd Parameter Turn-on Delay Time Rise Time Total Gate Charge Gate-Source Charge Gate-Drain Charge Test Conditions VDD = 20 V, I D = 1.5 A RG = 4.7 VGS = 10 V (see test circuit, Figure 3) VDD = 20 V, I D = 3 A, VGS = 10 V Min. Typ. 20 25 24.5 4 5.5 33 Max. Unit ns ns nC nC nC SWITCHING OFF Symbol td(off) tf td(off) tf tc Parameter Turn-off Delay Time Fall Time Off-voltage Rise Time Fall Time Cross-over Time Test Condit ions VDD = 20 V, ID = 1.5 A, R G = 4.7, VGS = 10 V (see test circuit, Figure 3) Vclamp = 32 V, ID = 3 A, R G = 4.7, VGS = 10 V Min. Typ. 100 22 20 11 35 Max. Unit ns ns SOURCE DRAIN DIODE Symbol ISD ISDM (2) VSD (1) trr Qrr IRRM Parameter Source-drain Current Source-drain Current (pulsed) Forward On Voltage Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current ISD = 3 A, VGS = 0 ISD = 3 A, di/dt = 100A/s, VDD = 15 V, T j = 150C (see test circuit, Figure 5) 34 45 2.6 Test Conditions Min. Typ. Max. 3 12 2 Unit A A V ns nC A Note: 1. Pulsed: Pulse duration = 300 s, duty cycle 1.5 %. 2. Pulse width limited by safe operating area. SCHOTTCKY STATIC ELETTRICAL CHARACTERISTICS Symbol IR(*) VF(*) Parameter Reversed Leakage Current Forward Voltage Drop Test Conditions TJ = 25 C , VR = 30 V TJ = 125 C , VR = 30 V TJ = 25 C , IF = 3 A TJ = 125 C , IF = 3 A Min. Typ. 0.03 0.42 Max. 0.2 100 0.51 0.46 Unit mA mA V V 3/6 STS3DPFS40 Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform Fig. 3: Switching Times Test Circuits For Resistive Load Fig. 4: Gate Charge test Circuit Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times 4/6 STS3DPFS40 SO-8 MECHANICAL DATA DIM. MIN. A a1 a2 a3 b b1 C c1 D E e e3 F L M S 3.8 0.4 4.8 5.8 1.27 3.81 4.0 1.27 0.6 8 (max.) 0.14 0.015 5.0 6.2 0.65 0.35 0.19 0.25 0.1 mm TYP. MAX. 1.75 0.25 1.65 0.85 0.48 0.25 0.5 45 (typ.) 0.188 0.228 0.050 0.150 0.157 0.050 0.023 0.196 0.244 0.025 0.013 0.007 0.010 0.003 MIN. inch TYP. MAX. 0.068 0.009 0.064 0.033 0.018 0.010 0.019 0016023 5/6 STS3DPFS40 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a trademark of STMicroelectronics (c) 2000 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A. http://www.st.com 6/6 |
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