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ST2226A
Version Issue Date File Name Total Pages : A.010 : 2004/04/12 : SP-ST2226A-A.010.doc : 23
PWM-Controlled Constant Current Driver for LED Displays
9 7 1
SILICON TOUCH TECHNOLOGY INC.
9-7F-1, Prosperity Road I, Science Based Industrial Pard, Hsin-Chu, Taiwan 300, R.O.C Fax886-3-5645626 Tel886-3-5645656
SILICON TOUCH TECHNOLOGY INC.
ST2226A
ST2226A PWM-Controlled Constant Current Driver for LED Displays
General Description
The ST2226A is a LED driver incorporating shift registers, data latches, 16-channel constant current circuitry with current value set by an external resistor, 1024 gray level PWM (Pulse Width Modulation) functional unit and time division capability. Each channel can provide a maximum current of 60 mA. Time division operation allows driving up to 1 or 2 LEDs with a single output channel (mode-1 and mode-2 respectively).
Block Diagram
IOUT0
......
IOUT15
Rext
Voltage Reference
Driver (16-Channel)
GCLK
PWM Counter
Comparator (16-Channel)
CMD[2:0]
Operation Control
Shift Register and Latch (10 Bit 16-Channel 2LED)
DCLK DIN
DOUT
Figure 1. Functional block diagram
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Features
Constant current outputs with current value settings by an external resistor Maximum output current: 60 mA Time division output allows the driving of 1 or 2 LEDs with a single output Maximum / minimum output voltage: 10V / 1.25V 10 bits luminance data with PWM current outputs Serial shift-in architecture for luminance data in time division Mode 1 and Mode 2
Absolute Maximum Ratings
Supply Voltage (AVDD, DVDD) Input Voltage Range (VIN) Driver Output Voltage Range (VOUT) Driver Output Current (IOUT) Power Dissipation (Ta = 50 or less) Thermal Resistance (ja) Operating temperature range (Top) Storage temperature range (Tstg) -0.3 to 6 -0.3 to DVDD+0.3 -0.3 to 10 0 to 60 2.50, SDIP28 1.32, SOP28 2.92, QFN32 40.0, SDIP28 75.9, SOP28 34.2, QFN32 -40 to 85 -55 to 150 V V V mA W
/W

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Pin Connection (SDIP28 / SOP28 Top View)
Pin Assignment (SDIP28 / SOP28)
Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 NAME IOUT2 IOUT3 IOUT4 IOUT5 IOUT6 IOUT7 IGND IGND IOUT8 IOUT9 IOUT10 IOUT11 IOUT12 IOUT13 Pin No. 15 16 17 18 19 20 21 22 23 24 25 26 27 28 NAME IOUT14 IOUT15 GND DOUT GCLK DCLK REXT CMD[2] CMD[1] CMD[0] DIN VDD IOUT0 IOUT1
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Pin Connection (QFN32 Bottom View)
CMD[1]
CMD[0]
CMD[2]
REXT DCLK
IGND
GCLK 25 24 23 22 21 20 19 18 17 16 15 26
IGND
27
28
29
30
31
32 1 2 3 DIN VDD IOUT0 IOUT1 IOUT2 IOUT3 IOUT4 IOUT5
DOUT GND IOUT15 IOUT14 IOUT13 IOUT12 IOUT11 IOUT10
Thermal PAD
4 5 6 7 8
14
13
12
11
10
9
IOUT6
IOUT7
IGND
IGND
IGND
IGND
IOUT8
Pin Assignment (QFN32)
Pin No. 1 2 3 4 5 6 7 8 9 10 11 NAME DIN VDD IOUT0 IOUT1 IOUT2 IOUT3 IOUT4 IOUT5 IOUT6 IOUT7 IGND Pin No. 12 13 14 15 16 17 18 19 20 21 22 NAME IGND IGND IGND IOUT8 IOUT9 IOUT10 IOUT11 IOUT12 IOUT13 IOUT14 IOUT15 Pin No. 23 24 25 26 27 28 29 30 31 32
Thermal PAD
IOUT9
NAME GND DOUT GCLK DCLK REXT IGND IGND CMD[2] CMD[1] CMD[0] IGND
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Pin Description
NAME PIN NO. CMD[2:0] SDIP/SOP: 22, 23, 24 QFN: 30, 31, 32 I/O DESCRIPTION I Encoded commands for data transfer, time division operation and PWM display: CMD[2:0] Command [000]: Mode-1 time division operation / No operation for display [001]: Mode-2 time division operation / No operation for display [010]: Data transfer enable (Shift-In) [011]: Data latch strobe (Capture) [100]: First LED emitting [101]: Second LED emitting [110]: LED emitting disable / IOUT disable (Stop) [111]: Test mode CMD commands are latched at the rising edges of DCLK. There is one DCLK latency between Shift-in command latched and data shift-in. I Serial input for luminance data (time division mode-1/2)
SDIP/SOP: 25 QFN: 1 DOUT SDIP/SOP: 18 QFN: 24 DCLK SDIP/SOP: 20 QFN: 26 GCLK SDIP/SOP: 19 QFN: 25 IOUT0-15 SDIP/SOP: 27, 28, 1, 2 3, 4, 5, 6, 9, 10, 11, 12 13, 14, 15, 16 QFN: 3, 4, 5, 6, 9, 10, 15, 16, 17, 18, 19, 20, 21, 22
ST2226A
DIN
O Serial output for luminance data (time division mode-1/2).
I Synchronous clock input for command and serial data transfer. The input data of DIN is synchronous to rising edges of DCLK, and transferred to DOUT on falling edges of DCLK. I Clock input for PWM operation.
O LED driver outputs.
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REXT
VDD
GND
IGND
SDIP/SOP: 21 QFN: 27 SDIP/SOP: 26 QFN: 2 SDIP/SOP: 17 QFN: 23 SDIP/SOP: 7, 8 QFN: 11, 12, 13, 14, 28, 29, Thermal pad
O Driver current setting. LED current is set to a current value by connecting an external resistor between REXT and GND. - Power supply
- Analog and digital ground
- Two ground-pin for driver outputs.
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Recommended Operating Conditions
DC Characteristics PARAMETER Supply voltage, DVDD, AVDD Driver output voltage when driver on, VOUT Driver output voltage when driver off1, VOUT Driver output current, IOUT High-level input voltage, VIH Low-level input voltage, VIL High-level output current, IOH Low-level output current, IOL Operating free-air temperature2, Top AC Characteristics PARAMETER DCLK clock frequency, fDCLK DCLK pulse duration, twh / twl DCLK rise/fall time tr / tf GCLK clock frequency, fGCLK GCLK pulse duration, twh / twl GCLK rise/fall time tr /tf Setup time, tsu Hold time, th / twh TEST CONDITIONS High or low level High or low level CMD to DCLK DIN to DCLK DCLK to CMD CMD to DCLK DIN to DCLK DCLK to CMD MIN 20 15 25 25 25 25 25 25 NOM MAX 15 40 20 20 ns UNIT MHz ns ns MHz ns ns ns MIN 4.75 1.25 0 5 0.8DVDD 0 -20 NOM 5 MAX 5.25 5 10 60 DVDD 0.2 DVDD -1 1 80 UNIT V V V mA V V mA mA
1. The driver output voltage including any overshoot stress has to be compliant with the maximum voltage (10V). 2. Recommended junction temperature range is from -20 to 150 . ST2226A VersionA.010 Page7
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ST2226A
Electrical Characteristics
PARAMETER TEST CONDITIONS MIN DVDD0.5 NOM 0.5 14 1.26 32.2 3 6 MAX 0.5 1 UNIT V V A mA mA V mA A % %
High-level digital output voltage, VOH Low-level digital output voltage, VOL Input current, II Supply current (Digital) DCLK = 10MHz, GCLK = 10MHz Supply current (Analog) REXT = 2K Voltage reference, VBG Rext = 2K Driver output current, IOUT Rext = 2K, VOUT = 2.0V Driver output leakage current, IOL Driver current skew between VOUT = 2V, I = channels, IOL1 40mA Driver current skew between VOUT = 2V, I = chips, IOL2 40mA
1.24 -
1.28 1 6 12
Switching Characteristics, CL = 15pF, IOUT = 20mA
PARAMETER Rise time, tr Fall time, tf Propagation delay, td TEST CONDITIONS DOUT IOUT DOUT IOUT GCLK to IOUT MIN NOM 5 25 5 25 30 MAX 10 40 10 40 40 UNIT ns ns ns
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Typical Control Method
1) Command Sequence To manipulate ST2226A, we should properly control the CMD, DIN, DCLK, and GCLK as following steps: 1. Issue command "Shift-in", and then enter luminance data DIN. Note that ST2226A starts to shift-in data at the DCLK rising edge next to the edge which latched Shift-in command. After data are completely entered, send command "Capture" to save data in registers. Send command "Disable". This step is needed before the "Emitting" command to keep the chip synchronized. Issue command "Emitting" or "Disable". Note that: A. B. 5. ST2226A generates its output in one-shot fashion, i.e. the output after (1024) x TGCLK is always zero. There are 2 GCLK latencies between the latched LED Emitting/Disable
2. 3. 4.
command and PWM start/stop. This is shown in Figure 2. Repeat step 1~4. In the same frame, the luminance data doesn't have to change, just repeat step 3~4. Note that the second command "Emitting" will be omitted if (1024) x TGCLK PWM has not finished, unless the "Disable" command is sent in
advance. The process discussed above could be summarized in the following table and timing diagram. At the same time, DCLK and GCLK remain free running. Table 1. Example of Command Sequence
Frame N-1 Emitting / Disable Emitting / Disable CMD Frame N Emitting / Disable Frame N+1
Capture
Capture
Disable
Disable
Disable
Shift-In
Shift-In
Shift-In
Shift-In
3
NOP
NOP
NOP
...
...
...
... ...
Shift-in Data.
Shift-in Data
Shift-in Data
Shift-in Data
Don't care.
Don't care.
Don't care.
Don't care.
Don't care.
Don't care.
Don't care.
Don't care.
Don't care.
Don't care.
DIN
...
...
...
...
...
3
We used the NOPs (No operation) to wait for the next frame data (at 60Hz) ready. ST2226A VersionA.010 Page9
...
...
SILICON TOUCH TECHNOLOGY INC.
ST2226A
2) LED Emitting Time and Current ST2226A adjusts the LED luminance using PWM (pulse width modulation) technique. The luminance data (DV) has a resolution of 10 bits (1024steps) and can be set independently for each LED. The relationship between Iout, luminance data, and emitting time is shown in Figure 2. Current Iout DV x TGCLK
2 x GCLK
1024 x TGCLK
Time
"LED Emitting" command issued Figure 2. PWM Current Output
3) Phase Relationship of DCLK and GCLK Matching ST2226A's GCLK and DCLK is an important step in the system design. If there is a certain length of delay between the rising edge of DCLK and of GCLK, the command "LED Emitting"& "LED Disable" will not be correctly recognized, which will then cause the display data loss. It is safe to keep both of GCLK and DCLK rising at the same time, so that the frequencies of DCLK and GCLK have an integer multiple relationship. For the design which has a fixed, corresponding clock phase relationship between GCLK & DCLK, e.g. the display controller is built by FPGAs, this clock phase problem is unlikely to happen. However, if it dose happen, try to control the clock phase, e.g. invert GCLK, to solve this problem. On the contrary, for the design which can not control the clock phase, e.g. the display controller is built by microprocessors, the following sequential modification on "Emitting" & "Disable" commands is preferred to be employed in the design: 1. 2.
3.
Gate GCLK. Issue "Emitting" or "Disable" command. Let go of GCLK.
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Timing Diagrams
Figure 3. Timing Diagram
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Application Diagrams
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Detailed Description
1) Time Division Operation Since ST2226A can drive 1 LED or 2 LEDs, the user can choose either MODE1 luminance data or MODE2 luminance data. After the luminance data is given, a command should be issued so that the driver can operate in MODE1 or in MODE2. Figure 4 shows the route of data shift-in in MODE2. Later we will explain the data structure of MODE1 and MODE2 in more details.
DIN DOUT
Ch0 LED1
Ch1 LED1
Ch15 LED1
Ch0 LED2
Ch1 LED2
Ch15 LED2
Figure 4. Block Diagram for Primary Bus. Figure 5. shows how to switch between 2 LEDs. When "LED1 Emitting" command is sent, LED1 PWM output will start 2 GCLK later. At the same time, the switch of LED1 should be turned on. On the other hand, LED2 switch should be turned on when LED2 PWM output starts. Again, "Disable" command must be sent before "LED1/LED2 Emitting". By periodically switching the emitting commands and LED switches, we could drive 2 LEDs per channel.
System Turn on one of the switches
LED1 Emitting or LED2 Emitting
One of Iout ST2226A
Figure 5. System Configuration for MODE 2 Operation
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2) Serial Shift-In Luminance Data In the MODE1 operation, the data for shift registers and latches is set as {16(channel) x 10 bit (luminance) x 1(led)} whereas in MODE2 operation, the data is set as {16(channel) x 10 bit (luminance) x 2(led)} configuration. The driver IC can remember both 2 sets of luminance data. The serial shift architecture assumes a FIFO (first-in firs-out) discipline, hence in the MODE1 operation, the most significant bit (MSB, Bit 9, Channel 15) luminance data is the first data shifted in, whereas the least significant bit (LSB, Bit 0, Channel 0) is the last data bit in a data set. The data structure for the MODE1 and MODE2 is shown in the Figure 6. and Figure 7. respectively. Din Channe l 0 0 (LSB) 1 Bit Position for Lumina -nce Data 2 3 4 5 6 7 8 9 1 0 1 2 3 4 5 6 7 8 9 2 0 1 2 3 4 5 6 7 8 9 ... 0 1 2 3 4 5 6 7 8 9 15 0 1 2 3 4 5 6 7 8 9 (MSB) Dout Figure 6. Luminance Data Structure in MODE 1
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Din Channe l 0 0 (LSB) LED1 Bit Position for Lumina -nce Data 1 2 3 4 5 6 7 8 9 1 0 1 2 3 4 5 6 7 8 9 2 0 1 2 3 4 5 6 7 8 9 ... 0 1 2 3 4 5 6 7 8 9 15 0 1 2 3 4 5 6 7 8 9
Channe l
0 0
1 0 1 2 3 4 5 6 7 8 9
2 0 1 2 3 4 5 6 7 8 9
... 0 1 2 3 4 5 6 7 8 9
15 0 1 2 3 4 5 6 7 8 9 (MSB) Dout
LED2 Bit Position for Lumina -nce Data
1 2 3 4 5 6 7 8 9
Figure 7. Luminance Data Structure in MODE 2
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3) Driver Current Output The drive current is set by an external resistor, Rext, connected between the REXT pin and GND. Varying the resistor value can adjust the current scale ranging from 5mA to the maximum 60 mA. Note that the REXT pin voltage is designed to be independent of supply voltage, temperature, and process variation, and is approximately 1.26V. The output current could be calculated roughly by the following equation: Iout = (1.26 / Rext) x 51 The full-scale current IOUT vs. Rext is shown in Figure 8.
Rext - Iout 70 60 50 Iout (mA/Bit) 40 30 20 10 0 0 2 4 6 8 10 12 14 Rext (Kohm)
Figure 8. Driver current as a function of REXT
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4) Power Rating For the relationship between power dissipation and operating temperature, please refer to the following Figure 9.
4 3.5 Pd (total Power Dissipation) - W 3 2.5 2 1.5 1 0.5 0 0 50 100 150 200
Ta (F ree-A ir Tem perature) - C S D IP SOP QFN
Figure 9. Power Dissipation vs. Operating Temperature
5) Advantages for application To understand what the advantages over ON-OFF type drivers, we assume that in MODE 1 operation, the frame rate is 60Hz, DCLK & GCLK both run at 10MHz. We can shift in (1/60Hz)/(1/10MHz)=167K bits per frame. One channel takes 10 bits, thus 167K/10=16.7K channels (single color pixels). For two dimension display, we take the square root of 16.7K pixels, which equals 129. The resolution, in this case is 129*129. We can round the data a little bit, and we can construct a 128*128 image by connecting 1024 driver ICs. (1,024 EA drivers*16 channels16,384 bit).
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ST2226A
Within a frame, there are 1024*16*10=163K DCLK & GCLK cycles, and we know that the PWM takes 1024 GCLK cycles and is one-shot. So we can issue up to 163K/1024=160 PWM cycles within a frame. This can be used as an 160-level total brightness control in addition to the 1024-level pixel-dependent luminance control. These 160- "LED1 Emitting" shall be issued periodically within a frame. Each time when issuing the "LED1 Emitting" command, the shift-in process will be pended for a few cycles; however, we can resume feeding the data right after the "LED1 Emitting" command is issued. To make the total brightness at full scale, all 160 "LED1 Emitting" commands should be issued. To make the total brightness half of the full scale, we can issue 80-"LED1 Emitting" commands in companion with 80-"LED Disable" commands, so that all the 128*128 LEDs are half of their brightness. A comparison table for PWM LED driver vs. ON-OFF type is provided for reference. Table 2. Comparison between PWM and ON-OFF Free Running Frame rate No. shift-in pixels Grayscale for each pixel Grayscale for overall panel Clocks needed per frame 167k Clock rate 10 MHz PWM 60 128 x 128 1024 160 ON-OFF 60 128 x 128 1024 1 16.8Meg 1.0 GHz4
4
Surely out of spec. Can't realize in this configuration. System designs for ON-OFF type drivers thus need to reduce frame rate or the no. shift-in pixels or grayscale level for each pixel. ST2226A VersionA.010 Page18
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ST2226A
Package Outline Dimension
SDIP28
D E1 A2 A SEATING PLANE A1 L 0.018typ. 0.060typ. 0.100typ.
SYMBOLS
A A1 A2 D E1 E L
eB
DIMENSION IN MIN. NOM. 0.015 0.125 0.130 1.385 1.390 0.283 0.288 0.31 BSC 0.115 0.130 0.330 0.350 0 7
INCH MAX. 0.210 0.135 1.400 0.293 0.150 0.370 15
Note: 1. JEDEC OUTLINE : N/A
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E
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SOP28
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ST2226A
QFN32
TOP VIEW
0.25 C
BOTTOM VIEW
D2
25 24 24 25 32 1
D
32 1
e
8 0.25 C 9 16
17
17
8 16 9
L
e
0.10 C
b
0.10
M
CAB
SEATING PLANE A3 A1
A
yC
SYMBOL A A1 A3 b D D2 E E2 e L y MIN. 0.70 0 0.18 1.25 1.25 0.30
DIMENSION (mm) NOM. 0.75 0.02 0.25 REF 0.23 5.00 BSC 2.70 5.00 BSC 2.70 0.50 BSC 0.40 0.10
MAX. 0.80 0.05 0.30 3.25 3.25 0.50
MIN. 27.6 0 7.09 49.21 49.21 11.81
DIMENSION (MIL) NOM. 29.5 0.79 9.84 REF 9.06 196.85 BSC 106.30 196.85 BSC 106.30 19.69 BSC 15.75 3.94
MAX. 31.5 1.97 11.81 127.95 127.95 19.69
Note: 1.DIMENSIONING AND TOLERANCING CONFORM TO ASME Y145.5M-1994. 2. REFER TO JEDEC STD. MO-220 WHHD-2 ISSUE A
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The products listed herein are designed for ordinary electronic applications, such as electrical appliances, audio-visual equipment, communications devices and so on. Hence, it is advisable that the devices should not be used in medical instruments, surgical implants, aerospace machinery, nuclear power control systems, disaster/crime-prevention equipment and the like. Misusing those products may directly or indirectly endanger human life, or cause injury and property loss. Silicon Touch Technology, Inc. will not take any responsibilities regarding the misusage of the products mentioned above. Anyone who purchases any products described herein with the above-mentioned intention or with such misused applications should accept full responsibility and indemnify. Silicon Touch Technology, Inc. and its distributors and all their officers and employees shall defend jointly and severally against any and all claims and litigation and all damages, cost and expenses associated with such intention and manipulation.
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