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NCP1586 Low Voltage Synchronous Buck Controller
The NCP1586 is a low cost PWM controller designed to operate from a 5 V or 12 V supply. This device is capable of producing an output voltage as low as 0.8 V. This 8-pin device provides an optimal level of integration to reduce size and cost of the power supply. The NCP1586 provides a 1 A gate driver design and an internally set 275 kHz oscillator. In addition to the 1 A gate drive capability, other efficiency enhancing features of the gate driver include adaptive non-overlap circuitry. The NCP1586 also incorporates an externally compensated error amplifier and a capacitor programmable soft-start function. Protection features include programmable short circuit protection and under voltage lockout (UVLO). The NCP1586 comes in an 8-pin SOIC package.
Features http://onsemi.com MARKING DIAGRAM
8 8 1 SOIC-8 D SUFFIX CASE 751 1 1586 ALYW G
* * * * * * * * * * * * * * * * *
Input Voltage Range from 4.5 to 13.2 V 275 kHz Internal Oscillator Boost Pin Operates to 26.5 V Voltage Mode PWM Control 0.8 V 1.0 % Internal Reference Voltage Adjustable Output Voltage Capacitor Programmable Soft-start Internal 1 A Gate Drivers 80% Max Duty Cycle Input Under Voltage Lockout Programmable Current Limit This is a Pb-Free Device
1586 = Specific Device Code A = Assembly Location L = Wafer Lot Y = Year W = Work Week G = Pb-Free Device
PIN CONNECTIONS
BST 1 TG 2 GND 3 BG 4 (Top View) 8 PHASE 7 COMP/DIS 6 FB 5 VCC
Applications
ORDERING INFORMATION
Device NCP1586DR2G Package SOIC-8 (Pb-Free) Shipping 2500/Tape & Reel
Graphics Cards Desktop Computers Servers / Networking DSP & FPGA Power Supply DC-DC Regulator Modules
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.
(c) Semiconductor Components Industries, LLC, 2007
1
March, 2007 - Rev. 0
Publication Order Number: NCP1586/D
NCP1586
12 V 3.3 V
VCC FB COMP/DIS
BST
TG PHASE BG VOUT
GND
Figure 1. Typical Application Diagram
POR UVLO VOCTH FAULT FB 6 - + 0.8 V (VREF) GM LATCH SCP + -
5
VCC
+ -
FAULT R PWM OUT S + - 2V + - VCC Q
1 2 8
BST TG PHASE
Clock Ramp COMP/DIS 7 OSC
4 FAULT 3
BG Rset
OSC
GND
Figure 2. Detailed Block Diagram
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NCP1586
PIN FUNCTION DESCRIPTION
Pin No. 1 Symbol BST Description Supply rail for the floating top gate driver. To form a boost circuit, use an external diode to bring the desired input voltage to this pin (cathode connected to BST pin). Connect a capacitor (CBST) between this pin and the PHASE pin. Typical values for CBST range from 0.1 mF to 1 mF. Ensure that CBST is placed near the IC. Top gate MOSFET driver pin. Connect this pin to the gate of the top N-Channel MOSFET. IC ground reference. All control circuits are referenced to this pin. Bottom gate MOSFET driver pin. Connect this pin to the gate of the bottom N-Channel MOSFET. Supply rail for the internal circuitry. Operating supply range is 4.5 V to 13.2 V. Decouple with a 1 mF capacitor to GND. Ensure that this decoupling capacitor is placed near the IC. This pin is the inverting input to the error amplifier. Use this pin in conjunction with the COMP pin to compensate the voltage-control feedback loop. Connect this pin to the output resistor divider (if used) or directly to Vout. Compensation Pin. This is the output of the error amplifier (EA) and the non-inverting input of the PWM comparator. Use this pin in conjunction with the FB pin to compensate the voltage-control feedback loop. The compensation capacitor also acts as a soft-start capacitor. Pull this pin low for disable. Switch node pin. This is the reference for the floating top gate driver. Connect this pin to the source of the top MOSFET.
2 3 4 5 6
TG GND BG VCC FB
7
COMP/DIS
8
PHASE
ABSOLUTE MAXIMUM RATINGS
Pin Name Main Supply Voltage Input Bootstrap Supply Voltage Input Switching Node (Bootstrap Supply Return) High-Side Driver Output (Top Gate) Low-Side Driver Output (Bottom Gate) Feedback COMP/DISABLE Symbol VCC BST PHASE TG BG FB COMP/DIS VMAX 15 V 30 V wrt/GND 15 V wrt/PHASE 25 V 30 V wrt/GND 15 V wrt/PHASE 15 V 5.5 V 5.5 V VMIN -0.3 V -0.3 V -0.7 V -5.0 V for < 50 ns -0.3 V wrt/PHASE -0.3 V -2.0 V for < 200 ns -0.3 V -0.3 V
MAXIMUM RATINGS
Rating Thermal Resistance, Junction-to-Ambient Thermal Resistance, Junction-to-Case NCP1586 Operating Junction Temperature Range NCP1586 Operating Ambient Temperature Range Storage Temperature Range Lead Temperature Soldering (10 sec): Reflow (SMD styles only) Pb-Free Moisture Sensitivity Level MSL Symbol RqJA RqJC TJ TA Tstg Value 165 45 0 to 125 0 to 70 -55 to +150 260 1 Unit C/W C/W C C C C -
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.
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NCP1586
ELECTRICAL CHARACTERISTICS (0_C < TA < 70_C; 4.5 V < VCC < 13.2 V, 4.5 V < BST < 26.5 V, CTG = CBG = 1.0 nF
(REF:NTD30N02), for min/max values unless otherwise noted.) Characteristic Input Voltage Range Boost Voltage Range Supply Current Quiescent Supply Current Boost Quiescent Current Under Voltage Lockout UVLO Threshold UVLO Hysteresis Switching Regulator VFB Feedback Voltage, Control Loop in Regulation Oscillator Frequency Ramp-Amplitude Voltage Minimum Duty Cycle Maximum Duty Cycle BG Minimum On Time Error Amplifier (GM) Transconductance Open Loop DC Gain Output Source Current Output Sink Current Input Offset Voltage Input Bias Current Soft-Start SS Source Current Switch Over Threshold Gate Drivers Upper Gate Source Upper Gate Sink Lower Gate Source Lower Gate Sink TG Falling to BG Rising Delay BG Falling to TG Rising Delay Enable Threshold Over-Current Protection OCSET Current Source OC Switch-Over Threshold Fixed OC Threshold Sourced from BG pin, before SS - - - 10 700 -375 - - - mA mV mV VCC = 12 V, TG < 2.0 V, BG > 2.0 V VCC = 12 V, BG < 2.0 V, TG > 2.0 V VCC = 12 V, VTG = VBG = 2.0 V - - - - - - 0.3 1.0 1.0 1.0 1.0 40 40 0.4 - - - - 90 60 0.5 A A A A ns ns V VFB < 0.8 V VFB = 0.8 V 8.0 - - 100 14 - mA % of Vref VFB < 0.8 V VFB > 0.8 V 3.0 55 80 80 -2.0 - - 70 120 120 0 0.1 4.4 - - - 2.0 1.0 mmho DB mA mV mA TA = 0 to 70C TA = 0 to 70C 0.792 250 0.8 0 70 - 0.8 275 1.1 - 75 500 0.808 300 1.4 - 80 - V kHz V % % ns VCC Rising Edge - 3.9 365 4.0 415 4.1 465 V mV VFB = 1.0 V, No Switching VCC = 13.2 V VFB = 1.0 V, No Switching, VCC = 13.2 V 0.1 2.0 - 3.0 0.9 4.0 mA mA Conditions - - Min 4.5 4.5 Typ - - Max 13.2 26.5 Unit V V
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NCP1586
TYPICAL CHARACTERIZATION CURVES
(TA = 25C unless otherwise noted)
278 VCC = 12 V fSW, FREQUENCY (kHz) 277 276 275 274 273 272 0 25 50 75 TJ, JUNCTION TEMPERATURE (C) ICC, SUPPLY CURRENT (mA) 3.5 3.0 2.5 2.0 1.5 1.0 0 20 40 60 80 TJ, JUNCTION TEMPERATURE (C) 4.0
VCC = 5.0 V
Figure 3. Oscillator Frequency (fSW) vs. Temperature
tSS, SOFT-START SOURCING CURRENT (mA)
Figure 4. Quiescent Current (ICC) vs. Temperature
808 VREF, REFERENCE VOLTAGE (mV) 806 804 802 800 798 796 794 792 0 20 40 60 80
14 13 12 11 10 9 8 0
20
40
60
80
TJ, JUNCTION TEMPERATURE (C)
TJ, JUNCTION TEMPERATURE (C)
Figure 5. Reference Voltage (VREF) vs. Temperature
Figure 6. Soft-Start Sourcing Current (tSS) vs. Temperature
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NCP1586
DETAILED OPERATING DESCRIPTION
General
4.0V Vcc 1.1V Comp 0.8V
The NCP1586 is an 8-pin PWM controller intended for DC-DC conversion from 5.0 V & 12 V buses. The NCP1586 has a 1 A internal gate driver circuit designed to drive N-channel MOSFETs in a synchronous-rectifier buck topology. The output voltage of the converter can be precisely regulated down to 800 mV 1.0% when the VFB pin is tied to VOUT. The switching frequency, is internally set to 275 kHz. A high gain operational transconductance error amplifier (OTA) is used.
Duty Cycle and Maximum Pulse Width Limits
Vfb 550mV BG 50mV
In steady state DC operation, the duty cycle will stabilize at an operating point defined by the ratio of the input to the output voltage. The NCP1586 can achieve an 80% duty cycle. There is a built in off-time which ensures that the bootstrap supply is charged every cycle. The NCP1586 can allow a 12 V to 0.8 V conversion at 275 kHz.
Input Voltage Range (VCC and BST)
OCP Programming TG Vout
POR UVLO
SS
Normal
Figure 7. Soft-Start Implementation UVLO
The input voltage range for both VCC and BST is 4.5 V to 13.2 V with respect to GND and PHASE, respectively. Although BST is rated at 13.2 V with respect to PHASE, it can also tolerate 26.4 V with respect to GND.
External Enable/Disable
When the Comp pin voltage falls or is pulled externally below the 400 mV threshold, it disables the PWM Logic and the gate drive outputs. In this disabled mode, the operational transconductance amplifier (EOTA) output source current is reduced and limited to the Soft-Start mode of 10 mA.
Normal Shutdown Behavior
Undervoltage Lockout (UVLO) is provided to ensure that unexpected behavior does not occur when VCC is too low to support the internal rails and power the converter. For the NCP1586, the UVLO is set to ensure that the IC will start up when VCC reaches 4.0 V and shutdown when VCC drops below 3.7 V. This permits operation when converting from a 5.0 input voltage.
Overcurrent Threshold Setting
Normal shutdown occurs when the IC stops switching because the input supply reaches UVLO threshold. In this case, switching stops, the internal SS is discharged, and all GATE pins go low. The switch node enters a high impedance state and the output capacitors discharge through the load with no ringing on the output voltage.
External Soft-Start
The NCP1586 features an external soft-start function, which reduces inrush current and overshoot of the output voltage. Soft-start is achieved by using the internal current source of 10 mA (typ), which charges the external integrator capacitor of the transconductance amplifier. Figure 7 is a typical soft-start sequence. This sequence begins once VCC surpasses its UVLO threshold and OCP programming is complete. During soft-start, as the Comp Pin rises through 400 mV, the PWM Logic and gate drives are enabled. When the feedback voltage crosses 800 mV, the EOTA will be given control to switch to its higher regulation mode output current of 120 mA.
NCP1586 allows to easily program an Overcurrent Threshold ranging from 50 mV to 550 mV, simply by adding a resistor (RSET) between BG and GND. During a short period of time following VCC rising over UVLO threshold, an internal 10 mA current (IOCSET) is sourced from BG pin, determining a voltage drop across ROCSET. This voltage drop will be sampled and internally held by the device as Overcurrent Threshold. The OC setting procedure overall time length is about 6 ms. Connecting a ROCSET resistor between BG and GND, the programmed threshold will be:
I @ ROCSET IOCth + OCSET RDS(on)
(eq. 1)
RSET values range from 5 kW to 55 kW. In case ROCSET is not connected, the device switches the OCP threshold to a fixed 375 mV value: an internal safety clamp on BG is triggered as soon as BG voltage reaches 700 mV, enabling the 375 mV fixed threshold and ending OC setting phase. The current trip threshold tolerance is 25 mV. The accuracy of the set point is best at the highest set point (550 mV). The accuracy will decrease as the set point decreases.
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NCP1586
Current Limit Protection
In case of a short circuit or overload, the low-side (LS) FET will conduct large currents. The controller will shut down the regulator in this situation for protection against overcurrent. The low-side RDS(on) sense is implemented at the end of each of the LS-FET turn-on duration to sense the over current trip point. While the LS driver is on, the Phase voltage is compared to the internally generated OCP trip voltage. If the phase voltage is lower than OCP trip voltage, an overcurrent condition occurs and a counter is initiated. When the counter completes, the PWM logic and both HS-FET and LS-FET are turned off. The controller will retry to see if the short circuit or overload condition is removed through the soft start cycle. The minimum turn-on time of the LS-FET is set to be 500 nS.
Drivers
FAULT
1
BST
2
TG
8 + - 2V + -
PHASE
VCC 4 BG Rset
The NCP1586 includes 1 A gate drivers to switch external N-channel MOSFETs. This allows the NCP1586 to address high-power as well as low-power conversion requirements. The gate drivers also include adaptive non-overlap circuitry. The non-overlap circuitry increase efficiency, which minimizes power dissipation, by minimizing the body diode conduction time. A detailed block diagram of the non-overlap and gate drive circuitry used in the chip is shown in Figure 8.
FAULT
3
GND
Figure 8. Block Diagram
Careful selection and layout of external components is required, to realize the full benefit of the onboard drivers. The capacitors between VCC and GND and between BST and SWN must be placed as close as possible to the IC. The current paths for the TG and BG connections must be optimized. A ground plane should be placed on the closest layer for return currents to GND in order to reduce loop area and inductance in the gate drive circuit.
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NCP1586
PACKAGE DIMENSIONS
SOIC-8 D SUFFIX CASE 751-07 ISSUE AH
A
8 5
-X-
B
1 4
S
0.25 (0.010)
M
Y
M
-Y- G C -Z- H D 0.25 (0.010)
M SEATING PLANE
K
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. 751-01 THRU 751-06 ARE OBSOLETE. NEW STANDARD IS 751-07. MILLIMETERS MIN MAX 4.80 5.00 3.80 4.00 1.35 1.75 0.33 0.51 1.27 BSC 0.10 0.25 0.19 0.25 0.40 1.27 0_ 8_ 0.25 0.50 5.80 6.20 INCHES MIN MAX 0.189 0.197 0.150 0.157 0.053 0.069 0.013 0.020 0.050 BSC 0.004 0.010 0.007 0.010 0.016 0.050 0_ 8_ 0.010 0.020 0.228 0.244
N
X 45 _
0.10 (0.004)
M
J
ZY
S
X
S
DIM A B C D G H J K M N S
SOLDERING FOOTPRINT*
1.52 0.060
7.0 0.275
4.0 0.155
0.6 0.024
1.270 0.050
SCALE 6:1 mm inches
*For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
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NCP1586/D

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