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M54HC4514
RAD-HARD 4 TO 16 LINE DECODER/LATCH
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HIGH SPEED: tPD= 20 ns (TYP.) at VCC = 6V LOW POWER DISSIPATION: ICC = 4A(MAX.) at TA=25C HIGH NOISE IMMUNITY: VNIH = VNIL = 28% VCC (MIN.) SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 4mA (MIN) BALANCED PROPAGATION DELAYS: tPLH tPHL WIDE OPERATING VOLTAGE RANGE: VCC (OPR) = 2V to 6V PIN AND FUNCTION COMPATIBLE WITH 54 SERIES 4514 SPACE GRADE-1: ESA SCC QUALIFIED 50 krad QUALIFIED, 100 krad AVAILABLE ON REQUEST NO SEL UNDER HIGH LET HEAVY IONS IRRADIATION DEVICE FULLY COMPLIANT WITH SCC-9205-019
DILC-24
FPC-24
ORDER CODES
PACKAGE DILC FPC FM M54HC4514D M54HC4514K EM M54HC4514D1 M54HC4514K1
DESCRIPTION The M54HC4514 is an high speed CMOS 4 LINE TO 16 LINE SEGMENT DECODER WITH LATCHED INPUTS fabricated with silicon gate C2MOS technology. A binary code stored in the four input latches (A to D) provides a high level at the selected one of PIN CONNECTION
sixteen outputs excluding the other fifteen outputs, when the inhibit input (INHIBIT) is held low. When the inhibit input (INHIBIT) is held high, all outputs are kept low level, while the latch function is available. The data applied to the data inputs are transferred to the Q outputs of latches when the strobe input is held high. When the strobe input is taken low, the information data applied to the data input at a time is retained at the output of the latches. All inputs are equipped with protection circuits against static discharge and transient excess voltage.
May 2004
Rev. 1
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Figure 1: IEC Logic Symbols
Figure 2: Input And Output Equivalent Circuit
Table 1: Pin Description
PIN N 1 2, 3, 21, 22 11, 9, 10, 8, 7, 6, 5, 4, 18, 17, 20, 19, 14, 13, 16, 15 23 12 24 SYMBOL STROBE A to D S0 to S15 NAME AND FUNCTION Strobe Input Address Inputs Multiplexer Outputs (Active HIGH)
INHIBIT GND VCC
Enable Input Ground (0V) Positive Supply Voltage
Table 2: Truth Table
INPUTS STROBE INHIBIT L L L L L L L L L L L L L L L L H
X : Don't Care
SELECT OUTPUT S0 S1 S2 S3 S4 S5 S6 S7 S8 S9 S10 S11 S12 S13 S14 S15 ALL OUTPUTS "L"
A L H L H L H L H L H L H L H L H X
B L L H H L L H H L L H H L L H H X
C L L L L H H H H L L L L H H H H X
D L L L L L L L L H H H H H H H H X STROBE = "H" Refer to truth table STROBE = "L" Data at the negative going transition of strobe shall be provided on the each output while strobe is held low.
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Figure 3: Logic Diagram
This logic diagram has not be used to estimate propagation delays
Table 3: Absolute Maximum Ratings
Symbol VCC VI VO IIK IOK IO Supply Voltage DC Input Voltage DC Output Voltage DC Input Diode Current DC Output Diode Current DC Output Current Parameter Value -0.5 to +7 -0.5 to VCC + 0.5 -0.5 to VCC + 0.5 20 20 25 50 300 -65 to +150 265 Unit V V V mA mA mA mA mW C C
ICC or IGND DC VCC or Ground Current Power Dissipation PD Tstg TL Storage Temperature Lead Temperature (10 sec)
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied
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Table 4: Recommended Operating Conditions
Symbol VCC VI VO Top tr, tf Supply Voltage Input Voltage Output Voltage Operating Temperature Input Rise and Fall Time VCC = 2.0V VCC = 4.5V VCC = 6.0V Parameter Value 2 to 6 0 to VCC 0 to VCC -55 to 125 0 to 1000 0 to 500 0 to 400 Unit V V V C ns ns ns
Table 5: DC Specifications
Test Condition Symbol Parameter VCC (V) 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 4.5 6.0 VOL Low Level Output Voltage 2.0 4.5 6.0 4.5 6.0 II ICC Input Leakage Current Quiescent Supply Current 6.0 6.0 IO=-20 A IO=-20 A IO=-20 A IO=-4.0 mA IO=-5.2 mA IO=20 A IO=20 A IO=20 A IO=4.0 mA IO=5.2 mA VI = VCC or GND VI = VCC or GND TA = 25C Min. 1.5 3.15 4.2 0.5 1.35 1.8 1.9 4.4 5.9 4.18 5.68 2.0 4.5 6.0 4.31 5.8 0.0 0.0 0.0 0.17 0.18 0.1 0.1 0.1 0.26 0.26 0.1 4 1.9 4.4 5.9 4.13 5.63 0.1 0.1 0.1 0.37 0.37 1 40 Typ. Max. Value -40 to 85C Min. 1.5 3.15 4.2 0.5 1.35 1.8 1.9 4.4 5.9 4.10 5.60 0.1 0.1 0.1 0.40 0.40 1 80 A A V V Max. -55 to 125C Min. 1.5 3.15 4.2 0.5 1.35 1.8 Max. V Unit
VIH
High Level Input Voltage Low Level Input Voltage High Level Output Voltage
VIL
V
VOH
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Table 6: AC Electrical Characteristics (CL = 50 pF, Input tr = tf = 6ns)
Test Condition Symbol Parameter VCC (V) 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 TA = 25C Min. Typ. 30 8 7 65 22 19 75 24 20 60 20 17 14 6 6 10 2 1 Max. 75 15 13 175 35 30 175 35 30 175 35 30 75 15 13 50 10 9 5 5 5 Value -40 to 85C Min. Max. 95 19 16 220 44 37 220 44 37 220 44 37 95 19 16 65 13 11 5 5 5 -55 to 125C Min. Max. 110 25 23 230 56 45 260 56 45 260 56 45 110 26 23 80 20 17 5 5 5 ns Unit
tTLH tTHL Output Transition Time tPLH tPHL Propagation Delay Time (DATA - Sn) tPLH tPHL Propagation Delay Time (STROBE- Sn.) tPLH tPHL Propagation Delay Time (INHIBIT - Sn) tW(L) Minimum Pulse Width (STROBE) Minimum Set Up Time (DATA) Minimum Hold Time (DATA)
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Table 7: Capacitive Characteristics
Test Condition Symbol Parameter VCC (V) TA = 25C Min. Typ. 5 61 Max. 10 Value -40 to 85C Min. Max. 10 -55 to 125C Min. Max. 10 pF pF Unit
CIN CPD
Input Capacitance Power Dissipation Capacitance (note 1)
1) CPD is defined as the value of the IC's internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC
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Figure 4: Test Circuit
CL = 50pF or equivalent (includes jig and probe capacitance) RT = ZOUT of pulse generator (typically 50)
Figure 5: Switching Characteristics Test Waveform (f=1MHz; 50% duty cycle)
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DILC-24 (0.3") MECHANICAL DATA
mm. DIM. MIN. A a1 a2 B b b1 D E e e1 e2 F I K L 14.22 1.22 1.27 27.81 7.62 7.24 7.87 2.1 2.7 1.016 1.93 0.40 0.20 30.17 7.36 3.0 1.27 2.16 0.45 0.254 30.48 7.62 2.54 28.07 8.12 7.75 4.24 14.48 1.32 0.560 0.048 0.050 1.095 0.300 0.285 0.310 TYP MAX. 2.72 3.3 1.524 2.39 0.50 0.30 30.78 7.87 MIN. 0.083 0.106 0.40 0.076 0.016 0.008 1.188 0.290 0.118 0.50 0.085 0.018 0.010 1.200 0.300 0.100 1.105 0.320 0.305 0.167 0.570 0.052 TYP. MAX. 0.107 0.130 0.60 0.094 0.020 0.012 1.212 0.310 inch
0016179I
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FPC-24 MECHANICAL DATA
mm. DIM. MIN. A B C D E F G H L M N 10.70 15.3 1.45 0.23 13.84 1.22 0.45 7.25 25.0 0.45 0.508 7.01 0.254 13.97 1.27 0.508 TYP 11.0 15.49 MAX. 11.30 15.70 1.9 0.3 14.10 1.32 0.55 8.25 28.0 0.55 MIN. 0.421 0.602 0.057 0.009 0.545 0.048 0.018 0.285 0.984 0.018 0.020 0.276 0.010 0.550 0.050 0.020 TYP. 0.433 0.610 MAX. 0.445 0.618 0.075 0.012 0.555 0.052 0.022 0.325 1.102 0.022 inch
E F G D
H
24
13
A
N
L
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12
H
B
M C
016031E
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Table 8: Revision History
Date 14-May-2004 Revision 1 First Release Description of Changes
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Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics All other names are the property of their respective owners (c) 2004 STMicroelectronics - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States. http://www.st.com
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