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Final Electrical Specifications
LTC1598 8-Channel, Micropower Sampling 12-Bit Serial I/O A/D Converter
FEATURES
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DESCRIPTION
August 1996
12-Bit Resolution Auto Shutdown to 1nA Low Supply Current: 320A Typ Guaranteed 3/4LSB Max DNL Single Supply 5V Operation 8-Channel Multiplexer Separate MUX Output and ADC Input Pins MUX and ADC May Be Controlled Separately Sampling Rate: 16.8ksps I/O Compatible with SPI, MICROWIRETM, etc. 24-Pin SSOP Package
The LTC (R)1598 is an 8-channel, 5V micropower, 12-bit sampling A/D converter. It typically draws only 320A of supply current when converting and automatically powers down to typically 1nA between conversions. The LTC1598 is available in a 24-pin SSOP package and operates on a 5V supply. The 12-bit, switched-capacitor, successive approximation ADC includes an 8-channel MUX and a sample-and-hold. On-chip serial ports allow efficient data transfer to a wide range of microprocessors and microcontrollers over three or four wires. This, coupled with micropower consumption, makes remote location possible and facilitates transmitting data through isolation barriers. The circuit can be used in ratiometric applications or with an external reference. The high impedance analog inputs and the ability to operate with reduced spans (to 1.5V full scale) allow direct connection to sensors and transducers in many applications, eliminating the need for gain stages.
, LTC and LT are registered trademarks of Linear Technology Corporation. MICROWIRE is a trademark of National Semiconductor Corporation.
APPLICATIONS
s s s s s s
Pen Screen Digitizing Battery-Operated Systems Remote Data Acquisition Isolated Data Acquisition Battery Monitoring Temperature Measurement
TYPICAL APPLICATION
24W, 8-Channel, 12-Bit ADC Samples at 200Hz and Runs Off a 5V Supply
OPTIONAL ADC FILTER 1k 1F 18 MUXOUT 20 21 22 ANALOG INPUTS 0V TO 5V RANGE 23 24 1 2 3 8 CH0 CH1 CH2 CH3 CH4 CH5 CH6 CH7 COM GND 4, 9 8-CHANNEL MUX 12-BIT SAMPLING ADC CS ADC CS MUX 10 6 5, 14 7 11 12 13 MPU 17 ADCIN 16 15, 19 VREF VCC 5V
SUPPLY CURRENT (A)
1F SERIAL DATA LINK MICROWIRE AND SPI COMPATABLE
+
CLK DIN DOUT NC NC
LTC1598 * TA01
-
Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
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Supply Current vs Sample Rate
1000 TA = 25C VCC = 5V VREF = 5V fCLK = 320kHz 100
10
1 0.1 1 10 SAMPLE FREQUENCY (kHz) 100
1598 TA02
1
LTC1598
ABSOLUTE MAXIMUM RATINGS
(Notes 1, 2)
PACKAGE/ORDER INFORMATION
TOP VIEW CH5 CH6 CH7 GND CLK CS MUX DIN COM GND 1 2 3 4 5 6 7 8 9 24 CH4 23 CH3 22 CH2 21 CH1 20 CH0 19 VCC 18 MUX OUT 17 ADC IN 16 VREF 15 VCC 14 CLK 13 NC
Supply Voltage (VCC) to GND ................................... 12V Voltage Analog Reference .................... - 0.3V to (VCC + 0.3V) Analog Inputs .......................... - 0.3V to (VCC + 0.3V) Digital Inputs ......................................... - 0.3V to 12V Digital Output .......................... - 0.3V to (VCC + 0.3V) Power Dissipation.............................................. 500mW Operating Temperature Range LTC1598CG ............................................. 0C to 70C LTC1598IG ........................................ - 40C to 85C Storage Temperature Range ................. - 65C to 150C Lead Temperature (Soldering, 10 sec).................. 300C
ORDER PART NUMBER LTC1598CG LTC1598IG
CS ADC 10 DOUT 11 NC 12
G PACKAGE 24-LEAD PLASTIC SSOP
TJMAX = 150C, JA = 110C/ W
Consult factory for Military grade parts.
RECOM ENDED OPERATING CONDITIONS
SYMBOL VCC fCLK tCYC thDI tsuCS tsuDI tWHCLK tWLCLK tWHCS tWLCS PARAMETER Supply Voltage (Note 3) Clock Frequency Total Cycle Time Hold Time, DIN After CLK Setup Time CS Before First CLK (See Operating Sequence) Setup Time, DIN Stable Before CLK CLK High Time CLK Low Time CS High Time Between Data Transfer Cycles CS Low Time During Data Transfer CONDITIONS VCC = 5V fCLK = 320kHz VCC = 5V VCC = 5V VCC = 5V VCC = 5V VCC = 5V fCLK = 320kHz fCLK = 320kHz MIN 4.5 (Note 4) 60 150 1 400 1 1 16 44 TYP MAX 5.5 320 UNITS V kHz s ns s ns s s s s
CONVERTER AND MULTIPLEXER CHARACTERISTICS
PARAMETER Resolution (No Missing Codes) Integral Linearity Error Differential Linearity Error Offset Error Gain Error REF Input Range Analog Input Range MUX Channel Input Leakage Current MUX OUT Leakage Current ADC IN Input Leakage Current CONDITIONS
q
(Note 5)
MIN 12 LTC1598IG TYP MAX 3 1 3 8 UNITS Bits LSB LSB LSB LSB V V nA nA A
MIN 12
LTC1598CG TYP MAX
(Note 6)
q q q q
(Notes 7, 8) (Notes 7, 8) Channel On or Off (Note 9) All Channels Off
q q q
3 3/4 3 8 1.5V to VCC + 0.05V - 0.05V to VCC + 0.05V 200 200 1
200 200 1
2
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LTC1598
DYNAMIC ACCURACY
SYMBOL S/(N + D) THD SFDR
DIGITAL AND DC ELECTRICAL CHARACTERISTICS
SYMBOL VIH VIL IIH IIL VOH VOL IOZ ISOURCE ISINK RREF IREF PARAMETER High Level Input Voltage Low Level Input Voltage High Level Input Current Low Level Input Current High Level Output Voltage Low Level Output Voltage Hi-Z Output Leakage Output Source Current Output Sink Current Reference Input Resistance Reference Current CONDITIONS VCC = 5.25V VCC = 4.75V VIN = VCC VIN = 0V VCC = 4.75V, IO = 10A VCC = 4.75V, IO = 360A VCC = 4.75V, IO = 1.6mA CS = High VOUT = 0V VOUT = VCC CS = VIH CS = VIL CS = VCC tCYC 760s, fCLK 25kHz tCYC 60s, fCLK 320kHz CS = VCC, CLK = VCC, DIN = VCC tCYC 760s, fCLK 25kHz tCYC 60s, fCLK 320kHz
ICC
Supply Current
AC CHARACTERISTICS
SYMBOL tSMPL fSMPL(MAX) tCONV tdDO tdis ten thDO tf tr tON tOFF tOPEN CIN PARAMETER Analog Input Sample Time Maximum Sampling Frequency
Conversion Time Delay Time, CLK to DOUT Data Valid Delay Time, CS to DOUT Hi-Z Delay Time, CLK to DOUT Enabled Time Output Data Remains Valid After CLK DOUT Fall Time DOUT Rise Time Enable Turn-On Time Enable Turn-Off Time Break-Before-Make Interval Input Capacitance
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(Note 5) fSMPL = 16.8kHz
CONDITIONS 1kHz Input Signal 1kHz Input Signal 1kHz Input Signal 1kHz Input Signal MIN TYP 71 - 78 80 - 80 MAX UNITS dB dB dB dB
PARAMETER Signal-to-Noise Plus Distortion Ratio Total Harmonic Distortion (Up to 5th Harmonic) Spurious-Free Dynamic Range Peak Harmonic or Spurious Noise
(Note 5)
MIN 2.6 TYP MAX 0.8 2.5 - 2.5 4.0 2.4 4.64 4.62 0.4 3 - 25 45 5000 55 0.001 90 90 0.001 320 320 UNITS V V A A V V V A mA mA M k A A A A A A
q q q q q q q q
q q q q
2.5 140 5 640
(Note 5)
CONDITIONS See Operating Sequence 1 See Operating Sequence 1 See Operating Sequence 1 See Test Circuits See Test Circuits See Test Circuits CLOAD = 100pF See Test Circuits See Test Circuits See Operating Sequence 1 See Operating Sequence 2 Analog Inputs On-Channel Off-Channel Digital Input MIN
q q q q q q q q q
TYP 1.5 12 250 135 75 230 50 50 260 100 160 20 5 5
MAX
16.8 600 300 200 150 150 700 300
UNITS CLK Cycles kHz CLK Cycles ns ns ns ns ns ns ns ns ns pF pF pF
35
3
LTC1598
AC CHARACTERISTICS
The q denotes specifications which apply over the full operating temperature range. Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note 2: All voltage values are with respect to GND. Note 3: This device is specified at 5V. Consult factory for 3V specified devices. Note 4: Increased leakage currents at elevated temperatures cause the S/H to droop, therefore it is recommended that fCLK = 200kHz at 85C, fCLK 120kHz at 70C and fCLK 1kHz at 25C. Note 5: VCC = 5V, VREF = 5V and CLK = 320kHz unless otherwise specified. Note 6: Linearity error is specified between the actual end points of the A/D transfer curve. Note 7: Two on-chip diodes are tied to each reference and analog input which will conduct for reference or analog input voltages one diode drop below GND or one diode drop above VCC. This spec allows 50mV forward bias of either diode for 4.5V VCC 5.5V. This means that as long as the reference or analog input does not exceed the supply voltage by more than 50mV, the output code will be correct. To achieve an absolute 0V to 5V input voltage range, it will therefore require a minimum supply voltage of 4.950V over initial tolerance, temperature variations and loading. Note 8: Recommended operating condition. Note 9: Channel leakage current is measured after the channel selection.
PIN FUNCTIONS
CH5 (Pin 1): Analog Multiplexer Input. CH6 (Pin 2): Analog Multiplexer Input. CH7 (Pin 3): Analog Multiplexer Input. GND (Pin 4): Analog Ground. GND should be tied directly to an analog ground plane. CLK (Pin 5): Shift Clock. This clock synchronizes the serial data transfer to both MUX and ADC. It also determines the conversion speed of the ADC. CS MUX (Pin 6): MUX Chip Select Input. A logic high on this input allows the MUX to receive a channel address. A logic low enables the selected MUX channel and connects it to the MUX OUT pin for A/D conversion. For normal operation, drive this pin in parallel with CS ADC. DIN (Pin 7): Digital Data Input. The multiplexer address is shifted into this input. COM (Pin 8): Negative Analog Input. This input is the negative analog input to the ADC and must be free of noise with respect to GND. GND (Pin 9): Analog Ground. GND should be tied directly to an analog ground plane. CS ADC (Pin 10): ADC Chip Select Input. A logic high on this input deselects and powers down the ADC and threestates DOUT. A logic low on this input enables the ADC to sample the selected channel and start the conversion. For normal operation drive this pin in parallel with CS MUX. DOUT (Pin 11): Digital Data Output. The A/D conversion result is shifted out of this output. NC (Pin 12): No Connection. NC (Pin 13): No Connection. CLK (Pin 14): Shift Clock. This input should be tied to Pin 5. VCC (Pin 15): Power Supply Voltage. This pin provides power to the A/D Converter. It must be bypassed directly to the analog ground plane. VREF (Pin 16): Reference Input. The reference input defines the span of the ADC. ADC IN (Pin 17): ADC Input. This input is the positive analog input to the ADC. Connect this pin to MUX OUT for normal operation. MUX OUT (Pin 18): MUX Output. This pin is the output of the multiplexer. Tie to ADC IN for normal operation. VCC (Pin 19): Power Supply Voltage. This pin should be tied to Pin 15. CH0 (Pin 20): Analog Multiplexer Input. CH1 (Pin 21): Analog Multiplexer Input. CH2 (Pin 22): Analog Multiplexer Input. CH3 (Pin 23): Analog Multiplexer Input. CH4 (Pin 24): Analog Multiplexer Input.
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LTC1598
TEST CIRCUITS
Load Circuit for tdDO, tr and tf
1.4V
DOUT
Voltage Waveforms for DOUT Rise and Fall Times, tr, tf
VOH VOL
3k DOUT 100pF
1598 TC01
TEST POINT
tr
tf
1598 TC02
Voltage Waveforms for DOUT Delay Times, tdDO
LTC1598
CLK VIL tdDO DOUT VOH VOL
1598 TC03
Voltage Waveforms for ten
CS ADC
CLK
1
2
B11 DOUT t en VOL
1598 TC06
Load Circuit for tdis and ten
TEST POINT
CS
Voltage Waveforms for tdis
VIH
3k DOUT 100pF
VCC tdis WAVEFORM 2, ten tdis WAVEFORM 1
1598 TC04
DOUT WAVEFORM 1 (SEE NOTE 1) tdis DOUT WAVEFORM 2 (SEE NOTE 2)
90%
10%
NOTE 1: WAVEFORM 1 IS FOR AN OUTPUT WITH INTERNAL CONDITIONS SUCH THAT THE OUTPUT IS HIGH UNLESS DISABLED BY THE OUTPUT CONTROL. NOTE 2: WAVEFORM 2 IS FOR AN OUTPUT WITH INTERNAL CONDITIONS SUCH THAT THE OUTPUT IS LOW UNLESS DISABLED BY THE OUTPUT CONTROL.
1598 TC05
5
LTC1598
APPLICATIONS INFORMATION
INPUT DATA WORD The LTC1598 uses its Chip Select and DIN pins to select one of its eight channels as shown in the operating sequence figures and Table 1. For this discussion we will assume that CS MUX and CS ADC are tied together and will refer to them as simply, CS. When CS is high, the input data on the DIN pin is latched into the 4-bit shift register on the rising edge of the clock. The input data word consists of an "EN" bit and a string of three bits for channel selection. If the "EN" bit is logic high as illustrated in Operating Sequence 1, it enables the selected channel. To ensure correct operation, the CS must be pulled low before the next rising edge of the clock. More than four input bits can be sent to the ADC without problems. The channel will be determined by the last four bits clocked in before CS falls. Once the CS is pulled low, all channels are simultaneously switched off to ensure a break-before-make interval. After a delay of tON, the selected channel is switched on, allowing signal transmission. The selected channel remains on, until the next falling edge of CS. After a delay of tOFF, it terminates the analog signal transmission and switches to the next selected channel. If the "EN" bit is logic low, as illustrated in Operating Sequence 2, it disables all channels. Table 1 shows the various bit combinations for channel selection.
Table 1. Logic Table for Channel Selection
CHANNEL STATUS All Off CH0 CH1 CH2 CH3 CH4 CH5 CH6 CH7 EN 0 1 1 1 1 1 1 1 1 D2 X 0 0 0 0 1 1 1 1 D1 X 0 0 1 1 0 0 1 1 DO X 0 1 0 1 0 1 0 1
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ANALOG CONSIDERATIONS Grounding The LTC1598 should be used with an analog ground plane and single-point grounding techniques. To achieve the optimum performance use a printed circuit board. The Ground pins (Pins 4 and 9) should be tied directly to the ground plane with minimum lead length. Bypassing For good performance, the LTC1598 VCC and VREF pins must be free of noise and ripple. Any changes in the VCC and VREF voltages with respect to ground during the conversion cycle can induce errors or noise in the output code. Bypass the VCC and VREF pins directly to the analog ground plane with minimum of 0.1F capacitors and lead lengths as short as possible. Analog Inputs Because of the capacitive redistribution A/D conversion techniques used, the analog inputs of the LTC1598 have capacitive switching input current spikes. These current spikes settle quickly and do not cause a problem. But if large source resistances are used, or if slow settling op amps drive the inputs, take care to ensure the transients caused by the current spikes settle completely before the conversion begins.
LTC1598
APPLICATIONS INFORMATION
Operating Sequence 1 Example: (CH2, GND)
tCYC CS MUX = CS ADC = CS tsuCS CLK
EN DIN D2 DOUT
D1 DON'T CARE D0 HI-Z tSMPL NULL BIT B11 B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0 HI-Z
CH0 TO CH7 tON ADC IN = MUX OUT COM = GND
1598 TD01
Operating Sequence 2 Example: (ALL Channels Off)
tCYC CS MUX = CS ADC = CS tsuCS CLK
EN DIN D2 DOUT
D1 DON'T CARE D0 HI-Z NULL BIT DUMMY CONVERSION tCONV HI-Z
CH0 TO CH7 tOFF ADC IN = MUX OUT COM = GND
1598 TD02
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tCONV
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LTC1598
TYPICAL APPLICATIONS
Microprocessor Interfaces The LTC1598 can interface directly (without external hardware) to most popular microprocessors' (MPU) synchronous serial formats including MICROWIRETM, SPI and QSPI. If an MPU without a dedicated serial port is used, then three of the MPU's parallel port lines can be programmed to form the serial link to the LTC1598. Included here is one serial interface example.
MICROWIRE is a trademark of National Semiconductor Corp.
STA $50 START BSET 0,$02 LDA $50 STA $0C LOOP1 TST $0B BPL LOOP1 BCLR 0,$02 LDA $0C STA $0C LOOP2 TST $0B BPL LOOP2 LDA $0C STA $0C AND #$IF STA $00 LOOP3 TST $0B BPL LOOP3 LDA $0C AND #$FE STA $01 JMP START
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Motorola SPI (MC68HC05) The MC68HC05 has been chosen as an example of an MPU with a dedicated serial port. This MPU transfers data MSBfirst and in 8-bit increments. The DIN word sent to the data register starts the SPI process. With three 8-bit transfers the A/D result is read into the MPU. The second 8-bit transfer clocks B11 through B7 of the A/D conversion result into the processor. The third 8-bit transfer clocks the remaining bits B6 through B0 into the MPU. ANDing the second byte with 1FHEX clears the three most significant bits and ANDing the third byte with FEHEX clears the least significant bit. Shifting the data to the right by one bit results in a right justified word.
LDA #$52
STA $0A LDA #$FF STA STA STA LDA $04 $05 $06 #$08
MC68HC05 CODE Configuration data for serial peripheral control register (Interrupts disabled, output enabled, master, Norm = 0, Ph = 0, Clk/16) Load configuration data into location $0A (SPCR) Configuration data for I/O ports (all bits are set as outputs) Load configuration data into Port A DDR ($04) Load configuration data into Port B DDR ($05) Load configuration data into Port C DDR ($06) Put DIN word for LTC1598 into Accumulator (CH0 with respect to GND) Load DIN word into memory location $50 Bit 0 Port C ($02) goes high (CS goes high) Load DIN word at $50 into Accumulator Load DIN word into SPI data register ($0C) and start clocking data Test status of SPIF bit in SPI status register ($0B) Loop if not done with transfer to previous instruction Bit 0 Port C ($02) goes low (CS goes low) Load contents of SPI data register into Accumulator Start next SPI cycle Test status of SPIF Loop if not done Load contents of SPI data register into Accumulator Start next SPI cycle Clear 3 MSBs of first DOUT word Load Port A ($00) with MSBs Test status of SPIF Loop if not done Load contents of SPI data register into Accumulator Clear LSB of second DOUT word Load Port B ($01) with LSBs Go back to start and repeat program
LTC1598
TYPICAL APPLICATIONS
CS MUX = CS ADC = CS
CLK
DIN
EN
D2
DOUT
MPU TRANSMIT WORD MPU RECEIVED WORD
0
0
0
0
EN
D2
BYTE 1 ? ? ? ? ? ? ? ? ? ? 0
BYTE 1
Hardware and Software Interface to Motorola MC68HC05
DOUT FROM LTC1598 STORED IN MC68HC05 RAM MSB #00 0 0 0 B11 B10 B9 B8 B7 BYTE 1 ANALOG INPUTS 0 BYTE 2 CS MUX CS ADC LSB #01 B6 B5 B4 B3 B2 B1 B0 LTC1598 CLK DIN DOUT C0 MC68HC05 SCK MOSI MISO
1598 TA04
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Data Exchange Between LTC1598 and MC68HC05
D1
DO
DON'T CARE
B11 B10
B9
B8
B7
B6
B5
B4
B3
B2
B1
B0
B1
B2
D1
D0
X
X
X
X BYTE 2
X
X
X
X
X
X
X
X
X
X
X
X
BYTE 3 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0 B1
1598 TA03
B11 B10 BYTE 2
BYTE 3
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LTC1598
TYPICAL APPLICATIONS
MULTICHANNEL A/D USES A SINGLE ANTIALIASING FILTER This circuit demonstrates how the LTC1598's independent analog multiplexer can simplify design of a 12-bit data acquisition system. All eight channels are MUXed into a single 1kHz, fourth-order Sallen-Key antialiasing filter, which is designed for single-supply operation. Since the LTC1598's data converter accepts inputs from ground to the positive supply, rail-to-rail op amps were chosen for the filter to maximize dynamic range. The LT1368 dual railto-rail op amp is designed to operate with 0.1F load capacitors (C1 and C2). These capacitors provide frequency compensation for the amplifiers and help reduce the amplifier's output impedance and improve supply rejection at high frequencies. The filter contributes less than 1LSB of error due to offsets and bias currents. The filter's noise and distortion are less than -72dB for a 100Hz, 2VP-P offset sine input. The combined MUX and A/D errors result in an integral nonlinearity error of 3LSB (maximum) and a differential nonlinearity error of 3/4LSB (maximum). The typical signal-to-noise plus distortion ratio is 71dB, with approximately -78dB of total harmonic distortion. The LTC1598 is programmed through a 4-wire serial interface that is compatable with MICROWIRE, SPI and QSPI. Maximum serial clock speed is 320kHz, which corresponds to a 16.8kHz sampling rate. The complete circuit consumes approximately 800A from a single 5V supply.
Simple Data Acquisition System Takes Advantage of the LTC1598's MUXOUT/ADCIN Pins-to-Filter Analog Signals Prior to A/D Conversion
ANALOG INPUTS 0V TO 5V RANGE
1 2 3 4 5 6 7 8 9 10 11 12
CH5 CH6 CH7 GND
CLK LTC1598 CH0 CS MUX DIN COM GND CS ADC DOUT NC VCC MUXOUT ADCIN VREF VCC CLK NC
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5V CH4 CH3 CH2 CH1 24 23 22 21 20 19 18 17 16 15 14 13 DATA OUT DATA IN CHIP SELECT CLOCK
LTC1598 * TA05
0.015F 1F
+
1/2 LT1368 5V 1F 7.5k 7.5k 0.015F 0.03F C2 0.1F
7.5k
7.5k 0.03F
-
+
1/2 LT1368
-
C1 0.1F
LTC1598
PACKAGE DESCRIPTION
0.205 - 0.212** (5.20 - 5.38)
0.005 - 0.009 (0.13 - 0.22)
0.022 - 0.037 (0.55 - 0.95)
*DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE **DIMENSIONS DO NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
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Dimensions in inches (millimeters) unless otherwise noted.
G Package 24-Lead Plastic SSOP (0.209)
(LTC DWG # 05-08-1640)
0.318 - 0.328* (8.07 - 8.33) 24 23 22 21 20 19 18 17 16 15 14 13
0.301 - 0.311 (7.65 - 7.90)
1 2 3 4 5 6 7 8 9 10 11 12 0.068 - 0.078 (1.73 - 1.99)
0 - 8
0.0256 (0.65) BSC
0.010 - 0.015 (0.25 - 0.38)
0.002 - 0.008 (0.05 - 0.21)
G24 SSOP 0595
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LTC1598
TYPICAL APPLICATION
Digitally Linearized Platinum RTD Signal Conditioner
5VOUT +15V LT1027
+
10F 500k 400C TRIM +15V +15V
12k*
12.5k*
1k*
Rplat.
* TRW-IRC MAR-6 RESISTOR - 0.1% ** 1% FILM RESISTOR Rplat. = 1k AT 0C - ROSEMOUNT #118MF
RELATED PARTS
PART NUMBER
LTC1096/LTC1098 LTC1096L/LTC1098L LTC1196/LTC1198 LTC1282 LTC1285/LTC1288 LTC1289 LTC1594 LTC1594L
DESCRIPTION
8-Pin SO, Micropower 8-Bit ADC 8-Pin SO, 2.65V Micropower 8-Bit ADC 8-Pin SO, 1Msps 8-Bit ADC 3V High Speed Parallel 12-Bit ADC 8-Pin SO, 3V, Micropower Multiplexed 3V, 1A, 12-Bit ADC 4-Channel, 5V Micropower 12-Bit ADC 4-Channel, 3V Micropower 12-Bit ADC
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Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 q FAX: (408) 434-0507 q TELEX: 499-3977
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+ -
A1 LT1101 A=10
+
A2 LT1006
1k CH5 CH4 CH6 CH3 CH7 CH2 GND CH1 CLK LTC1598 CH0 CS MUX VCC MUX OUT DIN COM ADC IN GND VREF VCC CS ADC CLK DOUT NC NC
-
30.1k** 1F
10F TANTALUM
3.92M** 500k ZEROC TRIM
TO/FROM MC68HC05
LTC1598 TA06
COMMENTS
Low Power, Small Size, Low Cost Low Power, Small Size, Low Cost Low Power, Small Size, Low Cost 140ksps, Complete with VREF, CLK, Sample-and-Hold 1- or 2-Channel, Auto Shutdown 8-Channel 12-Bit Serial I/O Low Power, Small Size, Low Cost Low Power, Small Size, Low Cost
LT/GP 0896 5K * PRINTED IN USA
(c) LINEAR TECHNOLOGY CORPORATION 1996

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