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PD - 95449
Logic-Level Gate Drive l Advanced Process Technology l Surface Mount (IRL3803VS) l Low-profile through-hole (IRL3803VL) l 175C Operating Temperature l Fast Switching l Fully Avalanche Rated l Lead-Free Description
l
HEXFET(R) Power MOSFET
D
IRL3803VSPBF IRL3803VLPbF
VDSS = 30V RDS(on) = 5.5m
G S
ID = 140A
Advanced HEXFET(R) Power MOSFETs from International Rectifier utilize advanced processing techniques to achieve extremely low onresistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design that HEXFET power MOSFETs are well known for, provides the designer with an extremely efficient and reliable device for use in a wide variety of applications.
The D2Pak is a surface mount power package capable of accommodating die sizes up to HEX-4. It provides the highest power capability and the lowest possible on-resistance in any existing surface mount package. The D2Pak is suitable for high current applications because of its low internal connection resistance and can dissipate up to 2.0W in a typical surface mount application.
D2Pak IRL3803VS
TO-262 IRL3803VL
Absolute Maximum Ratings
Parameter
ID @ TC = 25C ID @ TC = 100C IDM PD @TA = 25C PD @TC = 25C VGS IAR EAR dv/dt TJ TSTG Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Pulsed Drain Current Power Dissipation Power Dissipation Linear Derating Factor Gate-to-Source Voltage Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds
Max.
140 110 470 3.8 200 1.4 16 71 20 5.0 -55 to + 175 300 (1.6mm from case )
Units
A W W W/C V A mJ V/ns
Thermal Resistance
Parameter
RJC RJA Junction-to-Case Junction-to-Ambient (PCB Mounted, steady state)
Typ.
--- ---
Max.
0.75 40
Units
C/W
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1
1/4/05
IRL3803VS/IRL3803VLPbF
Electrical Characteristics @ TJ = 25C (unless otherwise specified)
V(BR)DSS
V(BR)DSS/TJ
Parameter Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Forward Transconductance Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Internal Drain Inductance Internal Source Inductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Single Pulse Avalanche Energy
RDS(on) VGS(th) gfs IDSS IGSS Qg Qgs Qgd td(on) tr td(off) tf LD LS Ciss Coss Crss EAS
Min. 30 --- --- --- 1.0 82 --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- ---
Max. Units Conditions --- V VGS = 0V, ID = 250A --- V/C Reference to 25C, ID = 1mA 5.5 VGS = 10V, ID = 71A m 7.5 VGS = 4.5V, ID = 59A --- V VDS = VGS, ID = 250A --- S VDS = 25V, ID = 71A 25 VDS = 30V, VGS = 0V A 250 VDS = 24V, VGS = 0V, TJ = 150C 100 VGS = 16V nA -100 VGS = -16V 76 ID = 71A 19 nC VDS = 24V 35 VGS = 4.5V, See Fig. 6 and 13 --- VDD = 15V --- ID = 71A --- RG = 1.3 --- VGS = 4.5V, See Fig. 10 Between lead, 4.5 --- 6mm (0.25in.) nH G from package 7.5 --- and center of die contact 3720 --- VGS = 0V 1480 --- VDS = 25V 270 --- pF = 1.0MHz, See Fig. 5 1560400 mJ IAS = 71A, L = 0.16mH
Typ. --- 0.028 --- --- --- --- --- --- --- --- --- --- --- 16 180 29 37
D
S
Source-Drain Ratings and Characteristics
IS
ISM
VSD trr Qrr ton Notes:
Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Forward Turn-On Time
Min. Typ. Max. Units
Conditions D MOSFET symbol --- --- 140 showing the A G integral reverse --- --- 470 S p-n junction diode. --- --- 1.2 V TJ = 25C, IS = 71A, VGS = 0V --- 52 78 ns TJ = 25C, IF = 71A --- 91 140 nC di/dt = 100A/s Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Repetitive rating; pulse width limited by
max. junction temperature. (See fig. 11) Starting TJ = 25C, L = 160H RG = 25, IAS = 71A, VGS=10V (See Figure 12) ISD 71A, di/dt 110A/s, VDD V(BR)DSS, TJ 175C Pulse width 400s; duty cycle 2%. This is a typical value at device destruction and represents operation outside rated limits.
This is a calculated value limited to TJ = 175C . Calculated continuous current based on maximum allowable
junction temperature. Package limitation current is 75A.
Uses IRL3803 data and test conditions. This is applied to D2Pak, when mounted on 1" square PCB
(FR-4 or G-10 Material ). For recommended footprint and soldering techniques refer to application note #AN-994.
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IRL3803VS/IRL3803VLPbF
1000
VGS 15V 10V 4.5V 3.7V 3.5V 3.3V 3.0V BOTTOM 2.7V TOP
1000
I D , Drain-to-Source Current (A)
100
I D , Drain-to-Source Current (A)
VGS 15V 10V 4.5V 3.7V 3.5V 3.3V 3.0V BOTTOM 2.7V TOP
100
2.7V
2.7V
10 0.1
20s PULSE WIDTH TJ = 25 C
1 10 100
10 0.1
20s PULSE WIDTH TJ = 175 C
1 10 100
VDS , Drain-to-Source Voltage (V)
VDS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
1000
2.5
TJ = 25 C TJ = 175 C
RDS(on) , Drain-to-Source On Resistance (Normalized)
ID = 120A
I D , Drain-to-Source Current (A)
2.0
1.5
100
1.0
0.5
10 2.5
V DS = 15V 20s PULSE WIDTH 3.5 4.5 5.5 6.5
0.0 -60 -40 -20 0
VGS = 10V
20 40 60 80 100 120 140 160 180
VGS , Gate-to-Source Voltage (V)
TJ , Junction Temperature ( C)
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance Vs. Temperature
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3
IRL3803VS/IRL3803VLPbF
6000
5000
VGS , Gate-to-Source Voltage (V)
VGS = 0V, f = 1MHz Ciss = Cgs + Cgd , Cds SHORTED Crss = Cgd Coss = Cds + Cgd
15
ID = 71A VDS = 24V VDS = 15V
12
C, Capacitance (pF)
4000
Ciss
9
3000
2000
Coss
6
1000
3
Crss
0 1 10 100
0
FOR TEST CIRCUIT SEE FIGURE 13
0 20 40 60 80 100
VDS , Drain-to-Source Voltage (V)
QG , Total Gate Charge (nC)
Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage
Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage
1000
10000
ISD , Reverse Drain Current (A)
100
ID, Drain-to-Source Current (A)
TJ = 175 C
OPERATION IN THIS AREA LIMITED BY R DS(on)
1000
10
100
100sec 1msec
TJ = 25 C
1
10 Tc = 25C Tj = 175C Single Pulse 1 10 VDS , Drain-toSource Voltage (V) 10msec
0.1 0.0
V GS = 0 V
0.4 0.8 1.2 1.6 2.0 2.4
1
VSD ,Source-to-Drain Voltage (V)
100
Fig 7. Typical Source-Drain Diode Forward Voltage
Fig 8. Maximum Safe Operating Area
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IRL3803VS/IRL3803VLPbF
160
LIMITED BY PACKAGE
VDS VGS
RD
ID , Drain Current (A)
120
RG V GS
Pulse Width 1 s Duty Factor 0.1 %
D.U.T.
+
-VDD
80
40
Fig 10a. Switching Time Test Circuit
VDS 90%
0
25
50
TC , Case Temperature ( C)
75
100
125
150
175
Fig 9. Maximum Drain Current Vs. Case Temperature
10% VGS
td(on) tr t d(off) tf
Fig 10b. Switching Time Waveforms
1
Thermal Response (Z thJC )
D = 0.50
0.20 0.1 0.10 0.05 0.02 0.01 SINGLE PULSE (THERMAL RESPONSE) PDM t1 t2 Notes: 1. Duty factor D = t 1 / t 2 2. Peak T J = P DM x Z thJC + TC 0.0001 0.001 0.01 0.1
0.01 0.00001
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
IRL3803VS/IRL3803VLPbF
15V
EAS , Single Pulse Avalanche Energy (mJ)
1000
TOP
800
VDS
L
DRIVER
BOTTOM
ID 29A 50A 71A
RG
20V
D.U.T
IAS tp
+ V - DD
600
A
0.01
400
Fig 12a. Unclamped Inductive Test Circuit
V(BR)DSS tp
200
0
25
50
75
100
125
150
175
Starting TJ , Junction Temperature ( C)
Fig 12c. Maximum Avalanche Energy Vs. Drain Current
I AS
Fig 12b. Unclamped Inductive Waveforms
Current Regulator Same Type as D.U.T.
50K
QG
12V
.2F .3F
VGS
QGS VG QGD
VGS
3mA
D.U.T.
+ V - DS
Charge
IG
ID
Current Sampling Resistors
Fig 13a. Basic Gate Charge Waveform
Fig 13b. Gate Charge Test Circuit
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IRL3803VS/IRL3803VLPbF
Peak Diode Recovery dv/dt Test Circuit
D.U.T*
+
+
Circuit Layout Considerations * Low Stray Inductance * Ground Plane * Low Leakage Inductance Current Transformer
-
+
RG VGS * dv/dt controlled by RG * ISD controlled by Duty Factor "D" * D.U.T. - Device Under Test
+ VDD
*
Reverse Polarity of D.U.T for P-Channel
Driver Gate Drive P.W. Period D=
P.W. Period
[VGS=10V ] ***
D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt
[VDD]
Re-Applied Voltage Inductor Curent
Body Diode
Forward Drop
Ripple 5%
[ISD ]
*** VGS = 5.0V for Logic Level and 3V Drive Devices Fig 14. For N-channel HEXFET(R) power MOSFETs
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7
IRL3803VS/IRL3803VLPbF
Dimensions are shown in millimeters (inches)
D2Pak Package Outline
D2Pak Part Marking Information (Lead-Free)
T H IS IS AN IR F 5 3 0 S W IT H L OT CODE 80 2 4 AS S E M B L E D ON W W 0 2, 20 00 IN T H E AS S E M B L Y L IN E "L " N ote: "P " in as s em bly lin e po s itio n in dicates "L ead-F r ee" IN T E R N AT IO N AL R E C T IF IE R L OGO AS S E M B L Y L O T CO D E P AR T N U M B E R F 5 30 S D AT E C O D E Y E AR 0 = 2 0 0 0 W E E K 02 L IN E L
OR
IN T E R N AT IO N AL R E C T IF IE R L O GO AS S E M B L Y L OT COD E P AR T N U M B E R F 530S D AT E CO D E P = D E S IG N AT E S L E AD -F R E E P R O D U C T (O P T IO N AL ) Y E AR 0 = 2 0 0 0 W E E K 02 A = AS S E M B L Y S IT E CO D E
8
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IRL3803VS/IRL3803VLPbF
TO-262 Package Outline
IGBT 1- GATE 2- COLLECTOR 3- EMITTER
TO-262 Part Marking Information
EXAMPLE: T HIS IS AN IRL3103L LOT CODE 1789 AS SEMBLED ON WW 19, 1997 IN T HE ASS EMBLY LINE "C" Note: "P" in as s embly line pos ition indicates "Lead-Free" INTERNAT IONAL RECT IFIER LOGO AS S EMBLY LOT CODE PART NUMBER
DATE CODE YEAR 7 = 1997 WEEK 19 LINE C
OR
INT ERNAT IONAL RECT IFIER LOGO ASS EMBLY LOT CODE PART NUMBER DAT E CODE P = DES IGNAT ES LEAD-FREE PRODUCT (OPTIONAL) YEAR 7 = 1997 WEEK 19 A = AS SEMBLY S ITE CODE
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9
IRL3803VS/IRL3803VLPbF
D2Pak Tape & Reel Infomation
Dimensions are shown in millimeters (inches)
TRR
1.60 (.063) 1.50 (.059) 4.10 (.161) 3.90 (.153)
1.60 (.063) 1.50 (.059) 0.368 (.0145) 0.342 (.0135)
FEED DIRECTION 1.85 (.073)
1.65 (.065)
11.60 (.457) 11.40 (.449)
15.42 (.609) 15.22 (.601)
24.30 (.957) 23.90 (.941)
TRL
10.90 (.429) 10.70 (.421) 1.75 (.069) 1.25 (.049) 16.10 (.634) 15.90 (.626) 4.72 (.136) 4.52 (.178)
FEED DIRECTION
13.50 (.532) 12.80 (.504)
27.40 (1.079) 23.90 (.941)
4
330.00 (14.173) MAX.
60.00 (2.362) MIN.
NOTES : 1. COMFORMS TO EIA-418. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION MEASURED @ HUB. 4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.
26.40 (1.039) 24.40 (.961) 3
30.40 (1.197) MAX. 4
Data and specifications subject to change without notice. This product has been designed and qualified for the industrial market. Qualification Standards can be found on IR's Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information. 01/05
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