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PD-95210
IRF7807VPBF
* * * * N Channel Application Specific MOSFET Ideal for Mobile DC-DC Converters Low Conduction Losses Low Switching Losses 100% RG Tested Lead-Free
HEXFET(R) Power MOSFET
S S S
1 2 3 4 8 7

A D D D D
6 5
Description This new device employs advanced HEXFET Power MOSFET technology to achieve an unprecedented balance of on-resistance and gate charge. The reduction of conduction and switching losses makes it ideal for high efficiency DC-DC Converters that power the latest generation of mobile microprocessors. A pair of IRF7807V devices provides the best cost/ performance solution for system voltages, such as 3.3V and 5V.
G
SO-8
T o p V ie w
DEVICE CHARACTERISTICS
RDS(on) QG QSW QOSS IRF7807V 17 m 9.5 nC 3.4 nC 12 nC
Absolute Maximum Ratings
Parameter
Drain-Source Voltage Gate-Source Voltage Continuous Drain or Source TA = 25C TA = 70C TA = 25C TA = 70C (VGS 4.5V)
Symbol
VDS VGS ID IDM PD TJ , TSTG IS ISM
IRF7807V
30 20 8.3 6.6 66 2.5 1.6 -55 to 150 2.5 66
Units
V
Power Dissipation eAAAAAAA
Pulsed Drain Current Pulsed Source Current
A
W C A
Junction & Storage Temperature Range Continuous Source Current (Body Diode)
Thermal Resistance
Parameter
Maximum Junction-to-Ambient Maximum Junction-to-Lead
h
eh
Symbol
RJA RJL
Typ
--- ---
Max
50 20
Units
C/W
11/3/04
IRF7807VPBF
Electrical Characteristics
Parameter
Drain-Source Breakdown Voltage Static Drain-Source On-Resistance Gate Threshold Voltage Drain-Source Leakage Current Gate-Source Leakage Current* Total Gate Charge* Pre-Vth Gate-Source Charge Post-Vth Gate-Source Charge Gate-to-Drain Charge Switch Charge (Qgs2 + Qgd) Output Charge* Gate Resistance Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Symbol BVDSS RDS(on) VGS(th) IDSS IGSS QG QGS1 QGS2 QGD QSW QOSS RG td(on) tr td(off) tf
Min Typ Max Units
30 --- 1.0 --- --- --- --- --- --- --- --- --- --- 0.9 --- --- --- --- --- 17 --- --- --- --- 9.5 2.3 1.0 2.4 3.4 12 --- 6.3 1.2 11 2.2 --- 25 3.0 100 20 100 nA 14 --- --- --- 5.2 16.8 2.8 --- --- --- --- ns VDD = 16V ID = 7A nC A V m V
Conditions
VGS = 0V, ID = 250A VGS = 4.5V, ID = 7.0A VDS = 30V, VGS = 0 VDS = 24V, VGS = 0 VDS = 24V, VGS = 0, TJ = 100C VGS = 20V VGS = 5V, ID = 7.0A VDS = 16V
d
VDS = VGS, ID = 250A
--- 100
VDS = 16V, VGS = 0
VGS = 5V, RG = 2 Resistive Load
Source-Drain Ratings and Characteristics
Parameter
Diode Forward Voltage* Reverse Recovery Charge Reverse Recovery Charge (with Parallel Schottsky) Symbol VSD Qrr Qrr(s)
Min Typ Max Units
--- --- --- --- 64 41 1.2 --- nC --- V IS = 7.0A
d ,V
Conditions
GS
= 0V
f
di/dt = 700A/s VDS = 16V, VGS = 0V, IS = 7.0A di/dt = 700A/s , (with 10BQ040) VDS = 16V, VGS = 0V, IS = 7.0A
f
Notes:
*
Repetitive rating; pulse width limited by max. junction temperature. Pulse width 400 s; duty cycle 2%. When mounted on 1 inch square copper board Typ = measured - Q oss Typical values of RDS(on) measured at VGS = 4.5V, QG, QSW and QOSS measured at V GS = 5.0V, IF = 7.0A. R is measured at TJ approximately 90C Device are 100% tested to these parameters.
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IRF7807VPBF
Power MOSFET Selection for DC/DC Converters
Control FET Special attention has been given to the power losses in the switching elements of the circuit - Q1 and Q2. Power losses in the high side switch Q1, also called the Control FET, are impacted by the Rds(on) of the MOSFET, but these conduction losses are only about one half of the total losses. Power losses in the control switch Q1 are given by;
Drain Current
4
1
Gate Voltage t2 VGTH t0 t1 t3
QGS1
QGS2
2
Ploss = Pconduction+ Pswitching+ Pdrive+ Poutput
This can be expanded and approximated by;
Ploss = (Irms 2 x Rds(on ) ) Qgs 2 Qgd +I x x Vin x f + I x x Vin x f ig ig + (Qg x Vg x f ) + Qoss x Vin x f 2
Figure 1: Typical MOSFET switching waveform
Synchronous FET The power loss equation for Q2 is approximated by;
* Ploss = Pconduction + P + Poutput drive
Ploss = Irms x Rds(on)
This simplified loss equation includes the terms Qgs2 and Qoss which are new to Power MOSFET data sheets. Qgs2 is a sub element of traditional gate-source charge that is included in all MOSFET data sheets. The importance of splitting this gate-source charge into two sub elements, Qgs1 and Qgs2, can be seen from Fig 1. Qgs2 indicates the charge that must be supplied by the gate driver between the time that the threshold voltage has been reached (t1) and the time the drain current rises to Idmax (t2) at which time the drain voltage begins to change. Minimizing Qgs2 is a critical factor in reducing switching losses in Q1. Qoss is the charge that must be supplied to the output capacitance of the MOSFET during every switching cycle. Figure 2 shows how Qoss is formed by the parallel combination of the voltage dependant (nonlinear) capacitance's Cds and Cdg when multiplied by the power supply input buss voltage.
+ ( g x Vg x f ) Q
(
QGD
Drain Voltage
2
)
Q + oss x Vin x f + (Qrr x Vin x f ) 2
*dissipated primarily in Q1.
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IRF7807VPBF
For the synchronous MOSFET Q2, Rds(on) is an important characteristic; however, once again the importance of gate charge must not be overlooked since it impacts three critical areas. Under light load the MOSFET must still be turned on and off by the control IC so the gate drive losses become much more significant. Secondly, the output charge Qoss and reverse recovery charge Qrr both generate losses that are transfered to Q1 and increase the dissipation in that device. Thirdly, gate charge will impact the MOSFETs' susceptibility to Cdv/dt turn on. The drain of Q2 is connected to the switching node of the converter and therefore sees transitions between ground and Vin. As Q1 turns on and off there is a rate of change of drain voltage dV/dt which is capacitively coupled to the gate of Q2 and can induce a voltage spike on the gate that is sufficient to turn Typical Mobile PC Application The performance of these new devices has been tested in circuit and correlates well with performance predictions generated by the system models. An advantage of this new technology platform is that the MOSFETs it produces are suitable for both control FET and synchronous FET applications. This has been demonstrated with the 3.3V and 5V converters. (Fig 3 and Fig 4). In these applications the same MOSFET IRF7807V was used for both the control FET (Q1) and the synchronous FET (Q2). This provides a highly effective cost/performance solution. the MOSFET on, resulting in shoot-through current . The ratio of Qgd/Qgs1 must be minimized to reduce the potential for Cdv/dt turn on. Spice model for IRF7807V can be downloaded in machine readable format at www.irf.com.
Figure 2: Qoss Characteristic
3.3V Supply : Q1=Q2= IRF7807V
93 92 91 Efficiency (%) 89 88 87 86 85 84 83 1 2 3 Load current (A) 4 5
Vin=24V Vin=14V Vin=10V
5.0V Supply : Q1=Q2= IRF7807V
95 94 93 Efficiency (%) 92 91 90 89 88 87 86 1 2 3 Load current (A) 4 5 Vin=24V Vin=14V Vin=10V
90
4
Figure 3
Figure 4
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IRF7807VPBF
2.0
RDS(on) , Drain-to-Source On Resistance (Normalized)
ID = 7.0A
5
ID = 7.0A VDS = 16V
VGS , Gate-to-Source Voltage (V)
VGS = 4.5V
0 20 40 60 80 100 120 140 160
1.5
4
3
1.0
2
0.5
1
0.0 -60 -40 -20
0
TJ , Junction Temperature ( C)
0
2
4
6
8
10
12
QG , Total Gate Charge (nC)
Fig 5. Normalized On-Resistance Vs. Temperature
Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage
RDS(on) , Drain-to -Source On Resistance ()
0.030
100
ISD , Reverse Drain Current (A)
0.025
TJ = 150 C
10
0.020
ID = 7.0A
0.015
TJ = 25 C
1
0.010 2.0 4.0 6.0 8.0 10.0 12.0 14.0 16.0
0.1 0.2
V GS = 0 V
0.4 0.6 0.8 1.0 1.2
VGS, Gate -to -Source Voltage (V)
VSD ,Source-to-Drain Voltage (V)
Fig 7. On-Resistance Vs. Gate Voltage
Fig 8. Typical Source-Drain Diode Forward Voltage
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IRF7807VPBF
100
Thermal Response (Z thJA )
D = 0.50 0.20 0.10 0.05 0.02 0.01 SINGLE PULSE (THERMAL RESPONSE) 0.1 0.00001 PDM t1 t2 Notes: 1. Duty factor D = t 1 / t 2 2. Peak T J = P DM x Z thJA + TA 0.001 0.01 0.1 1 10
10
1
0.0001
t1 , Rectangular Pulse Duration (sec)
Figure 9. Maximum Effective Transient Thermal Impedance, Junction-to-Ambient
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IRF7807VPBF
SO-8 Package Outline
Dimensions are shown in milimeters (inches)
D A 5 B
DIM A b INCHES MIN .0532 .013 .0075 .189 .1497 MAX .0688 .0098 .020 .0098 .1968 .1574 MILLIMET ERS MIN 1.35 0.10 0.33 0.19 4.80 3.80 MAX 1.75 0.25 0.51 0.25 5.00 4.00
A1 .0040
6 E
8
7
6
5 H 0.25 [.010] A
c D E e e1 H
1
2
3
4
.050 BASIC .025 BASIC .2284 .0099 .016 0 .2440 .0196 .050 8
1.27 BASIC 0.635 BAS IC 5.80 0.25 0.40 0 6.20 0.50 1.27 8
6X
e
K L y
e1
A
K x 45 C 0.10 [.004] y 8X c
8X b 0.25 [.010]
A1 CAB
8X L 7
NOT ES : 1. DIMENS IONING & T OLERANCING PER AS ME Y14.5M-1994. 2. CONT ROLLING DIMENS ION: MILLIMETER 3. DIMENS IONS ARE SHOWN IN MILLIMET ERS [INCHES ]. 4. OUT LINE CONFORMS T O JEDEC OUT LINE MS-012AA. 5 DIMENS ION DOES NOT INCLUDE MOLD PROT RUSIONS . MOLD PROT RUSIONS NOT T O EXCEED 0.15 [.006]. 6 DIMENS ION DOES NOT INCLUDE MOLD PROT RUSIONS . MOLD PROT RUSIONS NOT T O EXCEED 0.25 [.010]. 7 DIMENS ION IS T HE LENGT H OF LEAD FOR SOLDERING T O A S UBS T RAT E. 3X 1.27 [.050] 6.46 [.255]
FOOT PRINT 8X 0.72 [.028]
8X 1.78 [.070]
SO-8 Part Marking Information (Lead-Free)
EXAMPLE: T HIS IS AN IRF7101 (MOSFET ) DAT E CODE (YWW) P = DES IGNAT ES LEAD-FREE PRODUCT (OPTIONAL) Y = LAST DIGIT OF T HE YEAR WW = WEEK A = AS SEMBLY S IT E CODE LOT CODE PART NUMBER
INT ERNAT IONAL RECT IFIER LOGO
XXXX F 7101
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IRF7807VPBF
SO-8 Tape and Reel
Dimensions are shown in milimeters (inches)
TERMINAL NUMBER 1
12.3 ( .484 ) 11.7 ( .461 )
8.1 ( .318 ) 7.9 ( .312 )
FEED DIRECTION
NOTES: 1. CONTROLLING DIMENSION : MILLIMETER. 2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS(INCHES). 3. OUTLINE CONFORMS TO EIA-481 & EIA-541.
330.00 (12.992) MAX.
14.40 ( .566 ) 12.40 ( .488 ) NOTES : 1. CONTROLLING DIMENSION : MILLIMETER. 2. OUTLINE CONFORMS TO EIA-481 & EIA-541.
Data and specifications subject to change without notice. This product has been designed and qualified for the Consumer market. Qualification Standards can be found on IR's Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information. 11/04
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