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 October 2005 rev 1.0 Low Power Peak EMI Reducing Solution
Features
Generates an EMI optimized clock signal at the output. Integrated loop filter components. Operates with a 3.3V Supply. Operating current less than 6mA. Low power CMOS design. Input frequency range : 13MHz to 30MHz Generates a 1X and 2X low EMI spread spectrum clock of the input frequency. Output Frequency Selection through FSEL pin Frequency deviation : -1.5% (Typ) @25MHz : -1.5% (Typ) @50MHz Available in 6-pin TSOT-23, 8-pin SOIC and 8-pin TSSOP packages.
ASM3P2474A
The ASM3P2474A uses the most efficient and optimized modulation profile approved by the FCC and is implemented by using a proprietary all digital method. The ASM3P2474A modulates the output of a single PLL in order to "spread" the bandwidth of a synthesized clock, and more importantly, decreases the peak amplitudes of its harmonics. This results in significantly lower system EMI compared to the typical narrow band signal produced by oscillators and most frequency generators. Lowering EMI by increasing a signal's bandwidth is called `spread spectrum clock generation'.
Applications
The ASM3P2474A is targeted towards all portable devices with very low power requirements like MP3 players and digital still cameras.
Product Description
The ASM3P2474A is a versatile spread spectrum frequency modulator designed specifically for a wide range of clock frequencies. The ASM3P2474A reduces electromagnetic interference (EMI) at the clock source, allowing system wide reduction of EMI of all clock dependent signals. The ASM3P2474A allows significant system cost savings by reducing the number of circuit board layers, ferrite beads and shielding that are traditionally required to pass EMI regulations.
Key Specifications Description
Supply voltages Cycle-to-Cycle Jitter Output Duty Cycle Modulation Rate Equation Frequency Deviation FSEL=0 FSEL=1
Specification
VDD = 3.3V 0.3V 200pS (Typ) 45/55% (worst case) FIN/640 -1.5% (Typ) @ 50MHz -1.5% (Typ) @ 25MHz
FSEL
Block Diagram
VDD
Modulation XIN/CLKIN XOUT Crystal Oscillator Frequency Divider Feedback Divider Phase Detector Loop Filter
PLL
VCO
Output Divider ModOUT
VSS
Alliance Semiconductor 2575 Augustine Drive * Santa Clara, CA * Tel: 408.855.4900 * Fax: 408.855.4999 * www.alsc.com
Notice: The information in this document is subject to change without notice.
October 2005 rev 1.0
Pin Configuration (6-pin TSOT- 23 Package)
ASM3P2474A
FSEL XOUT
1 2
6 VSS
ASM3P2474A
5 4
ModOUT VDD
XIN / CLKIN 3
Pin Description Pin#
1 2 3 4 5 6
Pin Name
FSEL XOUT XIN / CLKIN VDD ModOUT VSS
Type
I O I P O P
Description
Selection Pin for 1X and 2X Output Frequency Options. Please refer the table "Frequency Selection Options" for further details Crystal connection. If using an external reference, this pin must be left unconnected. Crystal connection or external reference frequency input. This pin has dual functions. It can be connected either to an external crystal or an external reference clock. Power supply for the entire chip. Spread spectrum clock output. Ground connection.
Pin Configuration (8-pin SOIC and TSSOP Packages)
XIN / CLKIN XOUT
1 2 8 7 6 5
VDD NC ModOUT VSS
ASM3P2474A
FSEL 3 NC
4
Pin Description Pin#
1 2 3 4 5 6 7 8
Pin Name
XIN/CLKIN XOUT FSEL NC VSS ModOUT NC VDD
Type
I O I P O P
Description
Crystal connection or external reference frequency input. This pin has dual functions. It can be connected either to an external crystal or an external reference clock. Crystal connection. If using an external reference, this pin must be left unconnected. Selection Pin for 1X and 2X Output Frequency Options. Please refer the table "Frequency Selection Options" for further details No connect. Ground connection. Spread spectrum clock output. No connect. Power supply for the entire chip.
Low Power Peak EMI Reducing Solution
Notice: The information in this document is subject to change without notice.
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October 2005 rev 1.0
Modulation Profile
ASM3P2474A
Specifications Description
Frequency Range Modulation Equation Frequency Deviation FSEL=0 FSEL=1
Specification
13MHz < CLKIN < 30MHz FIN/640 -1.5% (Typ) @ 50MHz -1.5% (Typ) @ 25MHz
Frequency Selection Options FSEL Pin
0 1
Input Frequency (MHz)
13-30 13-30
Output Frequency (MHz)
26-60 13-30
Absolute Maximum Ratings Symbol
VDD, VIN TSTG TA Ts TJ TDV Storage temperature Operating temperature Max. Soldering Temperature (10 sec) Junction Temperature Static Discharge Voltage (As per JEDEC STD22- A114-B)
Parameter
Voltage on any pin with respect to Ground
Rating
-0.5 to +7.0 -65 to +125 0 to 70 260 150 2
Unit
V C C C C KV
Note: These are stress ratings only and are not implied for functional use. Exposure to absolute maximum ratings for prolonged periods of time may affect device reliability.
Low Power Peak EMI Reducing Solution
Notice: The information in this document is subject to change without notice.
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October 2005 rev 1.0
DC Electrical Characteristics
(Test condition: All parameters are measured at room temperature (+25C) unless otherwise stated)
ASM3P2474A
Symbol
VIL VIH IIL IIH IXOL IXOH VOL VOH IDD ICC VDD tON ZOUT Input low voltage Input high voltage Input low current Input high current
Parameter
Min
VSS - 0.3 2.0 2.5 3.0 -
Typ
3 3 1.6 4.0 3.3 45
Max
0.8 VDD + 0.3 -35 35 0.4 3.6 5 -
Unit
V V A A mA mA V V mA mA V mS
XOUT output low current (@0.4V, VDD=3.3V) XOUT output high current (@2.5V, VDD=3.3V) Output low voltage (VDD = 3.3V, IOL = 8mA) Output high voltage (VDD = 3.3V, IOH = 8mA) Static supply current* Dynamic supply current (3.3V, 25MHz and no load and FSEL=1) Operating voltage Power-up time (first locked cycle after power-up) Output impedance
* XIN /CLKIN pin is pulled low
AC Electrical Characteristics Symbol
CLKIN ModOUT fd fd tLH* tHL * tJC tD Input frequency Output frequency Frequency Deviation Frequency Deviation FSEL=0 FSEL=1 Output Frequency = Output Frequency = Output Frequency = Output Frequency =
Parameter
Min
13 26 13 0.4 0.3 45
Typ
-1.8 -0.9 -1.8 -0.9 0.85 0.7 200 50
Max
30 60 30 1.1 0.9 55
Unit
MHz MHz % % nS nS pS %
13MHz 30MHz 26MHz 60MHz
Output rise time (measured from 0.8 to 2.0V) Output fall time (measured at 2.0V to 0.8V) Jitter (cycle to cycle) Output duty cycle
*tLH and tHL are measured into a capacitive load of 15pF
Low Power Peak EMI Reducing Solution
Notice: The information in this document is subject to change without notice.
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October 2005 rev 1.0
Typical Crystal Oscillator Circuit
ASM3P2474A
Crystal
R1 = 510
C1 = 27 pF
C2 = 27 pF
Typical Crystal Specifications
Fundamental AT cut parallel resonant crystal Nominal frequency Frequency tolerance Operating temperature range Storage temperature Load capacitance Shunt capacitance ESR 25MHz 50 ppm or better at 25C -25C to +85C -40C to +85C 18pF 7pF maximum 25
Low Power Peak EMI Reducing Solution
Notice: The information in this document is subject to change without notice.
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October 2005 rev 1.0
Package Information 6-pin TSOT-23 Package
ASM3P2474A
Dimensions Symbol Min
A A1 A2 b H D B e C L 0.00 0.033 0.012
Inches Max
0.04 0.004 0.036 0.02
Millimeters Min Max
1.00 0.00 0.84 0.30 0.127 BSC 2.90 BSC 1.60 BSC 0.950 BSC 2.80 BSC 0.30 0 0.50 4 0.10 0.90 0.50
0.005 BSC 0.114 BSC 0.06 BSC 0.0374 BSC 0.11 BSC 0.0118 0 0.02 4
Low Power Peak EMI Reducing Solution
Notice: The information in this document is subject to change without notice.
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October 2005 rev 1.0
8-Pin SOIC Package
ASM3P2474A
E
H
D
A2
A
e B A 1
C L
D
Dimensions
Symbol Min
A1 A A2 B C D E e H L
Inches Max
0.010 0.069 0.059 0.020 0.010 0.004 0.053 0.049 0.012 0.007
Millimeters Min Max
0.10 1.35 1.25 0.31 0.18 4.90 BSC 3.91 BSC 1.27 BSC 6.00 BSC 0.41 0 1.27 8 0.25 1.75 1.50 0.51 0.25
0.193 BSC 0.154 BSC 0.050 BSC 0.236 BSC 0.016 0 0.050 8
Low Power Peak EMI Reducing Solution
Notice: The information in this document is subject to change without notice.
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October 2005 rev 1.0
8-Pin TSSOP Package
ASM3P2474A
H
E D A2 A e B A1 L C
Dimensions Symbol Min
A A1 A2 B c D E e H L 0.020 0 0.002 0.033 0.008 0.004 0.114 0.169 0.026 BSC 0.252 BSC 0.028 8 0.50 0
Inches Max
0.043 0.006 0.037 0.012 0.008 0.122 0.177 0.05 0.85 0.19 0.09 2.90 4.30
Millimeters Min Max
1.10 0.15 0.95 0.30 0.20 3.10 4.50 0.65 BSC 6.40 BSC 0.70 8
Low Power Peak EMI Reducing Solution
Notice: The information in this document is subject to change without notice.
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October 2005 rev 1.0
Ordering Information Part Number
ASM3P2474AF-06OR ASM3P2474AF-08TT ASM3P2474AF-08TR ASM3P2474AF-08ST ASM3P2474AF-08SR ASM3P2474AG-06OR ASM3P2474AG-08TT ASM3P2474AG-08TR ASM3P2474AG-08ST ASM3P2474AG-08SR
ASM3P2474A
Marking
W4LL 3P2474AF 3P2474AF 3P2474AF 3P2474AF W3LL 3P2474AG 3P2474AG 3P2474AG 3P2474AG
Package Type
6-Pin TSOT-23, TAPE & REEL, Pb Free 8-Pin TSSOP, TUBE, Pb Free 8-Pin TSSOP, TAPE & REEL, Pb Free 8-Pin SOIC, TUBE, Pb Free 8-Pin SOIC, TAPE & REEL, Pb Free 6-Pin TSOT-23, TAPE & REEL, Green 8-Pin TSSOP, TUBE, Green 8-Pin TSSOP, TAPE & REEL, Green 8-Pin SOIC, TUBE, Green 8-Pin SOIC, TAPE & REEL, Green
Temperature
Commercial Commercial Commercial Commercial Commercial Commercial Commercial Commercial Commercial Commercial
Device Ordering Information
ASM3P2474AF-08TR
R = Tape & reel, T = Tube or Tray O = SOT S = SOIC T = TSSOP A = SSOP V = TVSOP B = BGA Q = QFN DEVICE PIN COUNT F = LEAD FREE AND RoHS COMPLIANT PART G = GREEN PACKAGE PART NUMBER X= Automotive I= Industrial P or n/c = Commercial (-40C to +125C) (-40C to +85C) (0C to +70C) 1 = Reserved 2 = Non PLL based 3 = EMI Reduction 4 = DDR support products 5 = STD Zero Delay Buffer 6 = Power Management 7 = Power Management 8 = Power Management 9 = Hi Performance 0 = Reserved U = MSOP E = TQFP L = LQFP U = MSOP P = PDIP D = QSOP X = SC-70
ALLIANCE SEMICONDUCTOR MIXED SIGNAL PRODUCT
Licensed under U.S Patent Nos 5,488,627 and 5,631,921
Low Power Peak EMI Reducing Solution
Notice: The information in this document is subject to change without notice.
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October 2005 rev 1.0
ASM3P2474A
Alliance Semiconductor Corporation 2575 Augustine Drive, Santa Clara, CA 95054 Tel# 408-855-4900 Fax: 408-855-4999 www.alsc.com
Copyright (c) Alliance Semiconductor All Rights Reserved Preliminary Information Part Number: ASM3P2474A Document Version: v1.0
Note: This product utilizes US Patent # 6,646,463 Impedance Emulator Patent issued to Alliance Semiconductor, dated 11-11-2003
(c) Copyright 2003 Alliance Semiconductor Corporation. All rights reserved. Our three-point logo, our name and Intelliwatt are trademarks or registered trademarks of Alliance. All other brand and product names may be the trademarks of their respective companies. Alliance reserves the right to make changes to this document and its products at any time without notice. Alliance assumes no responsibility for any errors that may appear in this document. The data contained herein represents Alliance's best data and/or estimates at the time of issuance. Alliance reserves the right to change or correct this data at any time, without notice. If the product described herein is under development, significant changes to these specifications are possible. The information in this product data sheet is intended to be general descriptive information for potential customers and users, and is not intended to operate as, or provide, any guarantee or warrantee to any user or customer. Alliance does not assume any responsibility or liability arising out of the application or use of any product described herein, and disclaims any express or implied warranties related to the sale and/or use of Alliance products including liability or warranties related to fitness for a particular purpose, merchantability, or infringement of any intellectual property rights, except as express agreed to in Alliance's Terms and Conditions of Sale (which are available from Alliance). All sales of Alliance products are made exclusively according to Alliance's Terms and Conditions of Sale. The purchase of products from Alliance does not convey a license under any patent rights, copyrights; mask works rights, trademarks, or any other intellectual property rights of Alliance or third parties. Alliance does not authorize its products for use as critical components in life-supporting systems where a malfunction or failure may reasonably be expected to result in significant injury to the user, and the inclusion of Alliance products in such life-supporting systems implies that the manufacturer assumes all risk of such use and agrees to indemnify Alliance against all claims arising from such use.
Low Power Peak EMI Reducing Solution
Notice: The information in this document is subject to change without notice.
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