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APU4003
4-Bit Micro-Controller With LCD Driver, 1K Word
Features
Very low current dissipation Wide operating voltage range Supports both Ag and Li batteries Powerful instruction set 4-level subroutine nesting (including interrupt) 4 event driven interrupts, 2 external and 2 internal ROM size: 1024x15 bits RAM size: 64x4 bits Input ports: 2 ports/8 pins (S and M) Output port: 1 port/4 pins (P) Pseudo serial output port (P) Input/output ports: 2 ports/8 pins (I/OA and I/OB) Control outputs: ALARM, LIGHT LCD driver outputs (can drive up to 75 LCD segments) Mask option to select 4 LCD drive modes: static, duplex (1/2 duty 1/2 bias, 1/3 duty 1/2 bias or 1/3 duty 1/3 bias) Mask option permits LCD driver output pins to be used for DC output ports; up to 25 pins are available Segment PLA circuit permits any layout on LCD panel Built-in clock generator (crystal or RC) Built-in voltage doubler, halver, tripler
General Description
The APU4003 is a single chip 4-bit micro-controller with LCD drivers. It can drive up to 3 common times or 25 segments, i.e. a 75-segment LCD driver. This 4-bit micro-controller contains a 4-bit parallel processing ALU, 1024x15-bit program ROM, 64x4-bit data RAM, input/output ports, alarm driver, timer, clock generator, crystal and RC oscillator circuit, LCD driver and 79 powerful instructions in a single chip. The HALT instruction can be used to stop all internal operations other than timer, clock generator, crystal/RC oscillator and LCD driver. Very low current dissipation can be easily achieved by combining 4 kinds of interrupt functions and HALT instruction to minimize the operation cycle.
Block Diagram
Preliminary
1
Ver. 0.0
APU4003
Pad Assignment
Pad open: 90 m X 90 m Pad pitch: 160 m (Min.)
APU4003
Pad Coordinates
Pad No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 Pad Name VDD GND VSS1 VSSO VSS2 ALARM LIGHT S4 S3 IOA1 IOA2 IOA3 IOA4 IOB1 IOB2 IOB3 IOB4 RESET INT P1 P2 P3 P4 M1 M2 M3 M3 TESTA CUP1 CUP2 S2 S1 X ( m) 3118 3087 3113 3118 3118 3118 3118 3118 2935 2775 2615 2455 2295 2135 1975 1815 1655 1495 1335 1175 1015 855 695 535 375 215 50 50 50 50 50 50 Y ( m) 1010 1170 1330 1490 1650 1810 1970 2196 2196 2196 2196 2196 2196 2196 2196 2196 2196 2196 2196 2196 2196 2196 2196 2196 2196 2196 2196 1970 1810 1650 1490 1330 Pad No. 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 Pad Name OSCIN CAP OSCOUT COM1 SEG1 SEG2 SEG3 SEG4 SEG5 SEG6 SEG7 SEG8 SEG9 SEG10 SEG11 SEG12 SEG13 SEG14 SEG15 SEG16 SEG17 SEG18 SEG19 SEG20 SEG21 SEG22 SEG23 SEG24 SEG25 COM3 COM2 VSS3 X ( m) 50 50 50 50 50 50 50 50 210 370 530 690 850 1010 1170 1330 1490 1650 1810 1970 2130 2290 2450 2610 2770 2930 3118 3118 3118 3118 3118 3118 Y ( m) 1170 1010 850 690 530 370 210 50 50 50 50 50 50 50 50 50 50 50 50 50 50 50 50 50 50 50 50 210 370 530 690 850
* Note: The substrate must connect to VDD.
Preliminary
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Ver. 0.0
APU4003
Pin Description
Pin Name OSCIN OSCOUT CAP S1~4 M1~4 P1~4 IOA1~4 IOB1~4 INT RESET LIGHT ALARM VDD GND VSS0 VSS1 VSS2 VSS3 CUP1~2 Type I O I I I O I/O I/O I I O O Description Typical 32.768kHz crystal is connected across OSCIN/OSCOUT for Oscillation; R/C oscillation mode also available. Connected to OSCOUT for compensation capacitor. Port for input only with chattering eliminator for CK10 (32ms), CK8 (8ms) & CK6 (2ms). (PLA mask option). Input ports. Output ports. Input/Output ports. After power-on reset, sets as input mode. Input/Output ports. After power-on reset, sets as input mode. External interrupt request control input pin. System reset pin. Output only for outputting signal to drive transistor for light. Output only for outputting 4kHz/2kHz/1kHz modulation signal. Also can be used to output a non-modulation signal. (+)Power supply pin. Power supply pin for logic unit inside LSI. When using Li version, a capacitor must be connected across GND and VDD to prevent the logic unit from malfunctioning. (--) Power supply pin. * For Ag version, apply (--) side to both VSS0 & VSS1. For other than Ag version, apply (--) side to both VSS0 & VSS2. LCD power supply pin. Pins for connecting the voltage step-up (step-down) capacitor. Output pins for LCD panel common plate. The following pin is used in each case. Statuc 1/2 duty 1/3 duty COM1 0 0 0 COM2 0 0 COM3 0 Alternating Frequency 32Hz* 43Hz* 32Hz* * Frequency can be doubled, quadrupled with PLA. Output pins for LCD panel segments. * Also used as output ports with mask option. Test pin (for internal testing only). Ta = 0 to 70 Symbol VSS1 VSS2 VSS3 VIN1 VIN2 VOUT1 VOUT2 VOUT3 tOPG tSTG 3 , VDD=0V Unit V V V V V V V V
O
COM1~3
O
SEG1~25 TESTA
O *
Absolute Maximum Rating
Name Maximum Supply Voltage Maximum Input Voltage
Maximum Output Voltage Maximum Operating Temperature Maximum Storage Temperature
Rating -5.5 ~ +0.3 -5.5 ~ +0.3 -8.5 ~ +0.3 VSS1-0.3 to +0.3 VSS2-0.3 to +0.3 VSS1-0.3 to +0.3 VSS2-0.3 to +0.3 VSS3-0.3 to +0.3 0 to +70 -25 to +125
Preliminary
Ver. 0.0
APU4003
Allowable Operating Conditions
Symbol Condition VSS1 Supply Voltage VSS2 External RC Mode VSS3 VSS1 Supply Voltage VSS2 Crystal Mode VSS3 VSS1 Oscillator Start-up Supply Voltage Crystal Mode VSS2 VIH1 Input H Voltage Ag Battery Mode VIL1 Input L Voltage Input H Voltage Input L Voltage Input H Voltage Input L Voltage Input H Voltage Input L Voltage Operating Freq. VIH2 VIL2 VIH3 VIL3 VIH4 VIL4 fOPG1 fOPG2 fOPG3 Li Battery Mode OSCIN at Ext. RC & Ag Battery Mode Name Ta = 0 to 70 Min. -5.25 -5.25 -8.0 -5.25 -5.25 -8.0 Max. -1.7 -3.5 -3.5 -1.2 -2.4 -2.4 -1.35 -2.4 0 0.7VSS1 0 0.7VSS2 0 0.8VSS1 0 0.8VSS2 32 100 1000 Ta=0 to 70 , VDD=0V Unit V V V V V V V V V V V V V V V V kHz kHz kHz , VDD=0V
0.3VSS1 VSS1 0.3VSS2 VSS2 0.3VSS1 VSS1
OSCIN at Ext. RC & Li Battery 0.2VSS2 Mode VSS2 Ag Battery Mode Li Battery Mode External RC Mode 32 32 32
Electrical Characteristics
Input resistance Name L -Level Hold tR Symbol RIIH1 RIIH2 RIIH3 RMSD1 M/S Pull-Down tR RMSD2 RMSD3 RINTU1 INT Pull-Up tR RINTU2 RINTU3 RINTD1 INT Pull-Down tR RINTD2 RINTD3 RMSD1 RES Pull-Down tR RMSD2 RMSD3 Condition VI=0.8VSS1, #1 VI=0.8VSS2, #2 VI=0.8VSS2, #3 VI=VDD, #1 VI=VDD, #2 VI=VDD, #3 VI=VSS1, #1 VI=VSS2, #2 VI=VSS2, #3 VI=VDD, #1 VI=VDD, #2 VI=VDD, #3 VI=VDD or VSS1, #1 VI=VDD or VSS2, #2 VI=VDD or VSS2, #3 Min. 10 10 5 200 200 100 200 200 100 200 200 100 5 5 5 Typ. 40 40 20 500 500 250 500 500 250 500 500 250 20 20 20
Max. 100 100 50 1000 1000 500 1000 1000 500 1000 1000 500 50 50 50
Unit k k k k k k k k k k k k k k k
Note: #1: VSS1= -1.2V ( Ag ), #2: VSS2= -2.4V ( Li ), #3: VSS2= -4V (ExtV).
Preliminary
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Ver. 0.0
APU4003
DC output characteristics Name Output H Voltage Symbol VOH1a VOH2 a VOH3 a VOL1 a VOL2 a VOL3 a VOH1b VOH2b VOH3b VOL1b Output L Voltage VOL2b VOL3b Condition IOH=-200 A, #1 IOH=-1mA, #2 IOH=-3mA, #3 IOL=400 A, #1 IOL=2mA, #2 IOL=6mA, #3 IOH=-100 A, #1 IOH=-500 A, #2 IOH=-1.5mA, #3 IOL=200 A, #1 IOL=1mA, #2 IOL=3mA, #3 For Alarm Light Min. -0.5 -1 -1.5 -1.1 -2.1 -3.5 -0.5 -1 -1.5 -1.1 -2.1 -3.5 Typ. -0.3 -0.6 -1.0 -0.9 -1.8 -3.0 -0.3 -0.6 -1.0 -0.9 -1.8 -3.0 Max. -0.1 -0.3 -0.5 -0.7 -1.4 -2.5 -0.1 -0.3 -0.5 -0.7 -1.4 -2.5 Unit V V V V V V V V V V V V
Output L Voltage
Output H Voltage
P port IOA-n IOB-n
Note: #1: VSS1= -1.2V ( Ag ), #2: VSS2= -2.4V ( Li ), #3: VSS2= -4V (ExtV). Segment driver output characteristics Name CMOS output mode Output H Voltage Symbol VOH1c VOH2c VOH3c VOL1c Output L Voltage Static display mode VOH1d Output H Voltage VOH2d VOH3d VOL1d Output L Voltage VOL2d VOL3d VOH1e Output H Voltage VOH2e VOH3e VOL1e Output L Voltage VOL2e VOL3e IOH=-1 A, #1 IOH=-1 A, #2 IOH=-1 A, #3 IOL=1 A, #1 IOL=1 A, #2 IOL=1 A, #3 IOH=-10 A, #1 IOH=-10 A, #2 IOH=-10 A, #3 IOL=10 A, #1 IOL=10 A, #2 COM-n -0.2 -0.2 -0.2 -1.0 -2.2 -3.8 -0.2 SEG-n -0.2 -2.2 -3.8 SEG-n -0.2 -0.2 -0.2 -1.0 -2.2 -3.8 V V V V V V V V V V V V V V V V VOL2c VOL3c Condition IOH=-10 A, #1 IOH=-50 A, #2 IOH=-200 A, #3 IOL=20 A, #1 IOL=100 A, #2 IOL=400 A, #3 SEG-n For Min. -0.5 -1 -1.5 -1.1 -2.1 -3.5 Typ. -0.3 -0.6 -1.0 -0.9 -1.8 -3.0 Max. -0.1 -0.3 -0.5 -0.7 -1.4 -2.5 Unit V V V V V V
IOL=10 A, #3 Duplex (1/2 bias, 1/2 duty) display mode VOH12f IOH=-1 A, #1, #2 Output H Voltage VOH3f IOH=-1 A, #3 VOL12f IOL=1 A, #1, #2 Output L Voltage VOL3f IOL=1 A, #3
Preliminary
5
Ver. 0.0
APU4003
Name Output H Voltage Output M Voltage Output L Voltage Symbol VOH12g VOH3g VOM12g VOM3g VOL12g VOL3g Condition IOH=-10 A, #1, #2 IOH=-10 A, #3 IOI/H= 10 A, #1, #2 IOI/H= 10 A, #3 IOL=10 A, #1, #2 IOL=10 A, #3 IOH=-1 A, #1, #2 IOH=-1 A, #3 IOL=1 A, #1, #2 IOL=1 A, #3 IOH=-10 A, #1, #2 IOH=-10 A, #3 IOI/H= 10 A, #1, #2 IOI/H= 10 A, #3 IOL=10 A, #1, #2 IOL=10 A, #3 IOH=-1 A, #1, #2 IOH=-1 A, #3 IOI/H= 10 A, #1, #2 IOI/H= 10 A, #1, #2 IOI/H= 10 A, #1, #2 IOI/H= 10 A, #1, #2 IOL=1 A, #2 IOL=1 A, #3 IOH=-10 A, #2 IOH=-10 A, #3 IOI/H= 10 A, #1, #2 IOI/H= 10 A, #3 IOI/H= 10 A, #1, #2 IOI/H= 10 A, #3 IOL=1 A, #2 IOL=1 A, #3 COM-n -0.2 -0.2 -1.4 -2.2 -2.6 -4.2 -1.0 -1.8 -2.2 -3.8 -3.4 -5.8 SEG-n -0.2 -0.2 -1.4 -2.2 -2.6 -4.2 -1.0 -1.8 -2.2 -3.8 -3.4 -5.8 COM-n -0.2 -0.2 -1.4 -2.2 -1.0 -1.8 -2.2 -3.8 SEG-n -0.2 -0.2 -2.2 -3.8 COM-n For Min. -0.2 -0.2 -1.4 -2.2 -1.0 -1.8 -2.2 -3.8 Typ. Max. Unit V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V
1/2 bias, 1/3 duty display mode VOH12h Output H Voltage VOH3h VOL3h VOH12i VOH3i VOM12i VOM3i VOL12i VOL3i Output L Voltage Output H Voltage Output M Voltage Output L Voltage VOL12h
1/3bias, 1/3duty display mode VOH12j Output H Voltage VOH3j Output M1 Voltage Output M2 Voltage Output L Voltage Output H Voltage Output M1 Voltage Output M2 Voltage Output L Voltage VOM12j VOM13j VOM22j VOM23j VOL2j VOL3j VOH2k VOH3k VOM12k VOM13k VOM22k VOM23k VOL2k VOL3k
Note: #1: VSS1= -1.2V ( Ag ), #2: VSS2= -2.4V ( Li ), #3: VSS2= -4V (ExtV).
Instruction Table
Instruction NOP LCT Y,X OPPS X,D MRA X Machine Code Function 000 0000 0000 0000 No Operation 000 00YY YYXX XXXX (Ly) (Rx) 000 1110 1DXX XXXX P1,2,3,4 (Rx0,1),D,Pulse 000 1101 01XX XXXX CF (Rx3) 6 Ver. 0.0 Remark Y=000- No Use Flag
Preliminary
APU4003
Instruction OPP X OPA X OPB X LCB Y,X LCP Y,X ADC X ADC* X SBC X SBC* X ADD X ADD* X SUB X SUB* X ADN X ADN* X AND X AND* X EOR X EOR* X OR X OR* X ADCI Y,D ADCI* Y,D SBCI Y,D SBCI* Y,D ADDI Y,D ADDI* Y,D SUBI Y,D SUBI* Y,D ADNI Y,D ADNI* Y,D ANDI Y,D ANDI* Y,D EORI Y,D EORI* Y,D ORI Y,D ORI* Y,D MRW Y,X MWR X,Y LDS X,D IPS X IPM X Machine Code 000 1110 00XX XXXX 000 0100 01XX XXXX 000 1000 01XX XXXX Function Port(P) Port(A) Port(B) (Rx) (Rx) (Rx) Y=000- No Use Y=000- No Use CF CF CF CF CF CF CF CF Remark Flag
000 01YY YYXX XXXX (Ly) (Rx) 001 10YY YYXX XXXX abcd,efgh (Rx),(AC) 001 0000 00XX XXXX (AC) (Rx)+(AC)+(CF) 001 0000 10XX XXXX 001 0001 00XX XXXX 001 0001 10XX XXXX 001 0010 00XX XXXX 001 0010 10XX XXXX 001 0011 00XX XXXX 001 0011 10XX XXXX 001 0100 00XX XXXX 001 0100 10XX XXXX 001 0101 00XX XXXX 001 0101 10XX XXXX 001 0110 00XX XXXX 001 0110 10XX XXXX 001 0111 00XX XXXX 001 0111 10XX XXXX 001 1000 0DDD DYYY 001 1000 1DDD DYYY 001 1001 0DDD DYYY 001 1001 1DDD DYYY 001 1010 0DDD DYYY 001 1010 1DDD DYYY 001 1011 0DDD DYYY 001 1011 1DDD DYYY 001 1100 0DDD DYYY 001 1100 1DDD DYYY 001 1101 0DDD DYYY 001 1101 1DDD DYYY 001 1110 0DDD DYYY 001 1110 1DDD DYYY 001 1111 0DDD DYYY 001 1111 1DDD DYYY 011 100Y YYXX XXXX 011 110Y YYXX XXXX (AC),(Rx) (AC) (AC) (AC) (AC) (AC) (AC) (AC) (AC) (AC) (AC) (AC) (AC) (AC) (AC) (AC) (AC),(Rx) (AC),(Rx) (AC),(Rx) (AC),(Rx) (AC),(Rx) (AC),(Rx) (AC),(Rx) (AC),(Ry) (AC),(Ry) (AC),(Ry) (AC),(Ry) (AC),(Ry) (AC),(Ry) (AC),(Ry) (AC),(Ry) (AC),(Ry) (AC),(Rx) (Rx)+(AC)+(CF) (Rx)+(AC)B+(CF) (Rx)+(AC) (Rx)+(AC) B+1 (Rx)+(AC) (Rx) AND (AC) (Rx) EOR (AC) (Rx) OR (AC) (Rx)+(AC)B+(CF) (Rx)+(AC) (Rx)+(AC) B+1 (Rx)+(AC) (Rx) AND (AC) (Rx) EOR (AC) (Rx) OR (AC) (Ry)+(D)+(CF) (Ry)+(D)+(CF) (Ry)+(D)B+(CF) (Ry)+(D) (Ry)+(D)B+1 (Ry)+(D) (Ry) AND (D) (Ry) EOR (D) (Ry) OR (D) (Rx) (Ry) (D) Port(S) Port(M) 7 (Ry)+(D)B+(CF) (Ry)+(D) (Ry)+(D)B+1 (Ry)+(D) (Ry) AND (D) (Ry) EOR (D) (Ry) OR (D)
CF CF CF CF CF CF CF CF
010 01DD DDXX XXXX (AC),(Rx) 010 0000 00XX XXXX (AC),(Rx) 010 0000 10XX XXXX (AC),(Rx)
Preliminary
Ver. 0.0
APU4003
Instruction IPA X IPA* X IPB X IPB* X MAF X MSB X Machine Code 010 0001 00XX XXXX 010 0001 01XX XXXX 010 0001 10XX XXXX 010 0001 11XX XXXX 011 0001 00XX XXXX 010 0010 00XX XXXX Function (AC),(Rx) (AC),(Rx) (AC),(Rx) (AC),(Rx) (AC),(Rx) (AC),(Rx) Port(A) Port(A) Port(B) Port(B) STS1 STS2 I/OB I/P TF2: AC=0 TF3: CF B0: BCF B1: SCF1(MPT) B2: SCF2(HRF) B3: SCF3(SPT) B0: SCF4(INT) B1: SCF5(TMR) B2: PH15 B3: SCF7(PDV) I/OA I/P Remark Flag
MSC X STA X SR0 X SR1 X SL0 X SL 1 X LDA X JB0 X JB1 X JB2 X JB3 X JNZ X JNC X JZ X JC X JMP X CALL X RTS SMS X TMS X
011 0000 00XX XXXX 010 0010 10XX XXXX 010 0011 00XX XXXX 010 0011 01XX XXXX 010 0011 10XX XXXX 010 0011 11XX XXXX 011 0111 10XX XXXX
(AC),(Rx) (Rx) (AC)
STS3
(ACn),(Rxn) (AC3),(Rx3) (ACn),(Rxn) (AC3),(Rx3) (ACn),(Rxn) (AC0),(Rx0) (ACn),(Rxn) (AC0),(Rx0) (AC) (Rx) X X X X X X X X X
(Rxn+1) 0 (Rxn+1) 1 (Rxn-1) 0 (Rxn-1) 1 if (AC0)=1 if (AC1)=1 if (AC2)=1 if (AC3)=1 if (AC) 0 if (CF)=0 if (AC)=0 if (CF)=1 (PC)+1
100 00XX XXXX XXXX (PC) 100 01XX XXXX XXXX (PC) 100 10XX XXXX XXXX (PC) 100 11XX XXXX XXXX (PC) 101 00XX XXXX XXXX (PC) 101 01XX XXXX XXXX (PC) 101 10XX XXXX XXXX (PC) 101 11XX XXXX XXXX (PC) 110 00XX XXXX XXXX (PC) 110 01XX XXXX XXXX 110 1000 0000 0000 111 0000 000X XXXX 111 0010 00XX XXXX
(STACK) (PC) X (PC)
(STACK) S1~4 is Enabled M1~4 Enable SCF3 SCF1 HRF0 HRF1
SEF0~3 X0~3 SEF4 X4 TIMER X X6: M-PORT Pull-Low X5: S-PORT Pull-Low X3: HALT After Light X2: LIGHT ON X1: BCF Set X0: CF Set
SF X
111 0100 0XXX XXXX
BCF CF
Preliminary
8
Ver. 0.0
APU4003
Instruction RF X Machine Code 111 0110 0XXX XXXX Function X6: M-PORT Low-L-H X5: S-PORT Low-L-H X2: LIGHT OFF X1: BCF Reset X0: CF Reset X7,X6 0,1 1,0 Signal DC 1K/2K Xn=1 X5 X4 Signal 1Hz 2Hz Xn=1 X2 X1 Signal 8Hz 16Hz X5~7: HEF1~3 is Enabled X0~3: IEF0~3 is Enabled X0~3: IEF0~3 is Enabled X0~3: Reset HRF0~3 X8: Reset PH11~15 Remark Flag
ALM X
111 0111 XXXX XXXX
1,1 4kHz X3 4Hz X0 32Hz
SIE X SIE* X PLC X HALT
111 1000 XXXX XXXX 111 1010 0000 XXXX 111 110X XXXX XXXX 111 1111 1111 1111
Symbol description AC: ACn: Rx: Rxn: Ry: D: PC: : Accumulator Accumulator Bit N Memory of Address X Memory Bit N of Address X Memory of Working Register Y Immediate Data Program Counter LCD Latch CF: BCF: IEFn: HEFn: HRFn: SEFn: SCFn: Carry Flag Backup Flag Interrupt Enable Flag HALT Release Enable Flag HALT Release Flag Switch Enable Flag Start Condition Flag
Preliminary
9
Ver. 0.0

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