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| Dual-Line ESD Protection Array Working voltage 5V DESCRIPTION STE0512 The STE0512 are designed by TVS device that is to protect sensitive electronics from damage or latch-up due to ESD. They are designed for use in applications where board space ia at a premium. STE0512 will protect up to two lines, and may be used on lines where the signal polarities swing above and below ground. STE0512 offer desirable characteristics for board level protection including fast response time, low operating and clamping voltage without device degradation. STE0512 may be used to meet the immunity requirements of IEC 61000-4-2, level 4. The small SOT-523 package makes them ideal for use in portable electronics such as cell phone, PDA's, notebook computers, digital cameras and MP3. PIN CONFIGURATION SOT-523 FEATURE l Transient protection for data lines to IEC 61000-4-2 (ESD) +/- 15kV (air), +/-8KV (contect) IEC 61000-4-4 (EFT) 40A (5/50ns) l Protects two I/O lines l Working voltage : 5V l Low leakage current l Low operating and clamping voltages PART MARKING STANSON TECHNOLOGY 120 Bentley Square, Mountain View, Ca 94040 USA TEL: (650) 9389294 FAX: (650) 9389295 Page 1 Dual-Line ESD Protection Array STE0512 Working voltage 5V OREDRING INFORMATION Part Number STE0512D52RG STE0512D52RG: Tape Reel; Pb-Free ABSOULTE MAXIMUM RATINGS (Ta = 25J Unless otherwise noted ) Parameter Peak Pulse Power (tp=8/20 us) Maximum Peak Pulse Currint (tp=8/20us) ESD per ICE 61000-4-2 (Air) ESD per ICE 61000-4-2 (Contact) Operating Junction Tempreature Storgae Temperature Range Lead Soldering Temperature Symbol Ppk Ipp Vpp Vpp Tj TSTG TL Typical 250 7 +/-15 +/-8 -55~150 -55~150 260(10sec) Unit W A KV KV J J J Package SOT-523 ELECTRICAL CHARACTERISTICS (Ta = 25J Unless otherwise noted ) Parameter Symbol Conditions Min Typ Max Reverse Stand-Off Voltage VRWM 5 Reverse Breakdown Voltage VBR It=1mA 6 8.5 Reverse Leakage Current IR 0.01 1 VRWM=5V, T=25J Reverse Leakage Current IR 0.01 0.5 VRWM=3V, T=25J Clamping Voltage VC Ipp=1A, tp=8/20us 11.5 Clamping Voltage VC Ipp=7A, tp=8/20us 15 Junction Capacitance Cj Between I/O Pin and GND 20 30 VR=0V, f 1MHz Unit V V uA uA V V pF STANSON TECHNOLOGY 120 Bentley Square, Mountain View, Ca 94040 USA TEL: (650) 9389294 FAX: (650) 9389295 Page 2 Dual-Line ESD Protection Array Working voltage 5V TYPICAL CHARACTERISTICS STE0512 STANSON TECHNOLOGY 120 Bentley Square, Mountain View, Ca 94040 USA TEL: (650) 9389294 FAX: (650) 9389295 Page 3 Dual-Line ESD Protection Array STE0512 Working voltage 5V APPLICATION NOTE Device Connection for Protection of Two Data Lines STE0512 is designed to protect up to two data lines. The device is connected as follows: 1. The TVS protection of two I/O lines is achieved by connecting pins 1,2 to the data lines. Pin 3 is connected to ground. The ground connection should be made directly to the ground plane for best results. The path length is kept as short as possible to reduce the effects of parasitic inductance. Circuit Board Layout Recommendations for Suppression of ESD Good circuit board layout is critical for the suppression of ESD induced transients. The following guidelines are recommended: 1. Place the TVS near the input terminals or connectors to restrict transient coupling. 2. Minimize the path length between the TVS and the protected line. 3. Minimize all conductive loops including power and ground loops. 4. The ESD transient return path to ground should be kept as short as possible. 5. Never run critical signals near board edges 6. Use ground planes whenever possible. STANSON TECHNOLOGY 120 Bentley Square, Mountain View, Ca 94040 USA TEL: (650) 9389294 FAX: (650) 9389295 Psgr 4 Dual-Line ESD Protection Array Working voltage 5V SOT-523 PACKAGE OUTLINE STE0512 STANSON TECHNOLOGY 120 Bentley Square, Mountain View, Ca 94040 USA TEL: (650) 9389294 FAX: (650) 9389295 Page 5 |
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