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 MOSA
MS6714
4 Stereo Inputs / 2 Channels Output Audio Processor
4 Stereo Inputs and 2 Channels Output Volume, Tone, Balance, Loudness and Selectable Input Gain
FEATURES
Operation range : 2.7V~5V 4 stereo inputs with selectable input gain 2 independent speaker controls for balance Tone controls (treble and bass) Loudness and independent mute function Volume control in 1.25 dB/step I2C interface Components less and good PSRR Housed in SOP28, SSOP28 package
APPLICATIONS
Portable audio device Car stereo audio Hi-Fi audio system Cross-reference: PT2314
DESCRIPTION
The MS6714 is a 4 stereo inputs/2-channel outputs digital control audio processor for the low voltage operation. Volume, tone (bass and treble), and balance (left/right) processor are incorporated into a single chip. The MS6714 also has the loudness function and selectable input gain. These functions can be built a Hi-Fi audio system easily. All functions are programmable via the serial I2C bus. The default states of the chip as the power is on are: the volume is -78.75dB, the stereo 4 is selected, all the speakers are mute and the gains of the input stage, the bass and the treble are 0dB.
BLOCK DIAGRAM
LOUT 18 LIN LOUD_L BOUT_L BIN_L 17 12 20 19 TREB_L 3
RB
Mute
LIN1 LIN2 LIN3 LIN4
16 15 14 13
Volume & Londness Input Selector & Gain Control Volume & Londness
24 OUT_L
Bass
Treble
Speaker ATT
27
Serial Bus Decoder and Latches
RIN4 RIN3 RIN2 RIN1
8 9 10 11
SCL 26 SDA 25 DGND
Speaker ATT
Bass
Treble
23
OUT_R
Mute RB
Supply
1 2 28 6 5 7 22
21
4 TREB_R
AVDD AGND REF ROUT
RIN LOUD_R BOUT_R BIN_R
REV1.0
1
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MOSA
PIN CONFIGURATION
Symbol VDD AGND TREB_L TREB_R RIN ROUT LOUD_R RIN4 RIN3 RIN2 RIN1 LOUD_L LIN4 LIN3 LIN2 LIN1 LIN LOUT BIN_L BOUT_L BIN_R BOUT_R OUT_R OUT_L DGND SDA SCL REF Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28
MS6714
4 Stereo Inputs / 2 Channels Output Audio Processor
Description Supply Input Voltage Analog Ground Left Channel Input for Treble Controller Right Channel Input for Treble Controller Audio Processor Right Channel Input Gain Output and Input Selector for Right Channel Right Channel Loudness Input Right Channel Input 4 Right Channel Input 3 Right Channel Input 2 Right Channel Input 1 Left Channel Loudness Input Left Channel Input 4 Left Channel Input 3 Left Channel Input 2 Left Channel Input 1 Audio Processor Left Channel Input Gain Output and Input Selector for Left Channel Left Bass Controller Input Channel Left Bass Controller Output Channel Right Bass Controller Input Channel Right Bass Controller Output Channel Right Speaker Output Left Speaker Output Digital Ground I2C Data Input I2C Clock Input Analog Reference Voltage1/2VDD
VDD 1 AGND 2 TREB_L 3 TREB_R 4 RIN 5 ROUT 6 LOUD_R 7 RIN4 8 RIN3 9 RIN2 10 RIN1 11 LOUD_L 12 LIN4 13 LIN3 14
28 REF 27 SCL 26 SDA 25 DGND 24 OUT_L 23 OUT_R
MS6714
22 BOUT_R 21 BIN_R 20 BOUT_L 19 BIN_L 18 LOUT 17 LIN 16 LIN1 15 LIN2
SOP28 / SSOP28
REV1.0
2
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MOSA
ORDERING INFORMATION
Package 28-Pin SOP (lead free) 28-Pin SOP (lead free) 28-Pin SSOP (lead free) 28-Pin SSOP (lead free) Part number MS6714GTR MS6714GU MS6714SSGTR MS6714SSGU
MS6714
4 Stereo Inputs / 2 Channels Output Audio Processor
Packaging Marking MS6714G MS6714G MS6714G MS6714G
Transport Media 1k Units Tape and Reel 25 Units Tube 2.5k Units Tape and Reel 50 Units Tube
ABSOLUTE MAXIMUM RATINGS
Symbol VDD VESD TSTG TA TJ TS RTHJA Supply Voltage Electrostatic Handling Storage Temperature Range Operating Ambient Temperature Range Maximum Junction Temperature Soldering Temperature, 10 seconds Thermal Resistance from Junction to Ambient in Free Air SOP28 SSOP28 Parameter Rating 6 -3000 to 3000 -65 to 150 -40 to 85 150 260 210 210 Unit V V /W
OPERATING RATINGS
Symbol VDD Supply Voltage Parameter Min 2.7 Typ Max 5.5 Unit V
REV1.0
3
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MOSA
5V ELECTRICAL CHARACTERISTICS
Symbol Supply IQ PSRR RIN GIN GSTEP ERRG LOUD Quiescent Current Power Supply Rejection Ratio Input Resistance Input Gain Range Step Resolution Gain Setting error Loudness VIN=0V Parameter
MS6714
4 Stereo Inputs / 2 Channels Output Audio Processor
(Ta=25, All stages 0dB, f=1kHz, CREF =22uF, refer to the application circuit; unless otherwise specified) Conditions Min 55 35 0 -0.2 CLoud=100nF, f =20Hz Volume=-40dB Attenuation Av = 0 to -40dB Av = -40 to -60dB Attenuation 19 Typ 12.2 60 50 3.75 0 20 Max 12.5 70 11.25 0.2 Unit mA dB k dB dB dB dB
CREF = 22uF, f = 100Hz Input 1,2,3,4 Gain
Input Selectors
Volume control CRVOL RESVOL Volume Control Range Volume Step Resolution -78.75 -1 -5 -37.5 -0.2 Boost/Cut f =100Hz -14 -0.3 34 Boost/Cut f =20kHz (THD+N)/S <0.3% VOUT=2Vpp VOUT=4Vpp -14 -0.3 93 2 1.25 0 0 1.25 0 -65 2 0 44 2 0 4.5 -75 0.0177 97 97 0 0.5 1 0 0.1 -60 14 0.1 58 14 0.1 0.8 dB dB dB dB dB dB dB dB dB dB dB k dB dB dB Vpp dB % dB dB V V
ERRVOL Volume Setting Error Speaker Attenuators CRSPK RESSPK ERRSPK MUTE CRBAS RESBAS ERRBAS RB
B
Speaker Control Range Speaker Step Resolution Speaker Setting Error Output Mute Attenuation Bass Control Range Bass Step Resolution Speaker Setting Error Internal Feedback Resistance Treble Control Range Treble Step Resolution Treble Setting Error Maximum Output Voltage Swing Total Harmonic Distortion Plus Noise Signal-to-Noise Ratio Channel Separation Left/Right Bus High Input Level Bus Low Input Level
Bass Control
Treble Control CRBAS RESBAS ERRBAS General VOMAX THD+N S/N CS VIH VIL
Bus Input
Notes: Bass and Treble response see to curve. The center frequency and quality of the response behavior can be chosen by the external.
REV1.0
4
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MOSA
2.7V ELECTRICAL CHARACTERISTICS
Symbol Supply IQ PSRR General VOMAX THD+N S/N CS Maximum Output Voltage Swing Total Harmonic Distortion Plus Noise Signal-to-Noise Ratio Channel Separation Left/Right Quiescent Current Power Supply Rejection Ratio VIN=0V Parameter
MS6714
4 Stereo Inputs / 2 Channels Output Audio Processor
(Ta=25, All stages 0dB, f=1kHz, CREF =22uF, refer to the application circuit; unless otherwise specified) Conditions Min 53 90 90 Typ 8.7 58 2.5 -50 0.3 94 94 Max 9 Unit mA dB Vpp dB % dB dB
CREF = 22uF, f = 100Hz (THD+N)/S <0.3% VOUT=2Vpp VOUT=2.5Vpp
TYPICAL PERFORMANCE CHARACTERISTICS
(Ta=25, All stages 0dB, f=1kHz, CREF =22uF, refer to the application circuit; unless otherwise specified)
VDD=5V
VDD=5V Volume=-40dB
100nF
33nF
OPEN
Loud (dB)
Loud (dB)
Loud (dB)
10nF
220nF
Loudness OFF VDD=5V CLOUD = 100nF
56nF
FREQUENCY (Hz)
FREQUENCY (Hz)
FREQUENCY (Hz)
Loudness vs. Volume
Loudness vs. Frequency vs. Volume
Loudness vs. External Capacitors
CHANNEL SEPARATION (dB)
VDD=2.7V VIN=-3dBV
VDD=5V VIN=0dBV
VDD=5V Treble=Bass= -14~14dB
FREQUENCY (Hz)
FREQUENCY (Hz)
QUIESCENT CURRENT (mA)
Tone (dB)
SUPPLY VOLTAGE (V)
Typical Tone Response
Channel Separation vs. Frequency
Quiescent Current vs. Supply Voltage
REV1.0
5
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MOSA
VDD=2.7V VO=2Vpp
MS6714
4 Stereo Inputs / 2 Channels Output Audio Processor
f=1kHz
THD+N (%)
THD+N (%)
f=20kHz
THD+N (%)
f=20Hz
f=20kHz
f=20Hz
VDD=5V VO=2Vpp VDD=5V
f=1kHz VDD=2.7V
FREQUENCY (Hz)
OUTPUT VOLTAGE (dBV)
OUTPUT VOLTAGE (dBV)
THD+N vs. Frequency
THD+N vs. Output Voltage
THD+N vs. Output Voltage
CAP=22uF
CAP=22uF
PSRR (dB)
CAP=10uF
PSRR (dB)
CAP=10uF
VDD=5V VRR=-20dBV
VDD=2.7V VRR=-20dBV
FREQUENCY (Hz)
FREQUENCY (Hz)
PSRR vs. Frequency
PSRR vs. Frequency
REV1.0
6
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MOSA
I2C BUS DESCRIPTION
Start and Stop Conditions
MS6714
4 Stereo Inputs / 2 Channels Output Audio Processor
A start condition is activated when the SCL is set to HIGH and SDA shifts from HIGH to LOW state. The stop condition is activated when SCL is set to HIGH and SDA shifts from LOW to HIGH state. Please refer to the timing diagram below.
SCL
SDA
Start
Stop
SCL : Serial Clock Line, SDA : Serial Data Line
Data Validity A data on the SDA line is considered valid and stable only when the SCL signal is in HIGH state. The HIGH and LOW states of the SDA line can only change when the SCL signal is LOW. Please refer to the figure below.
SDA
SCL Data line stable, Data valid Data change allowed
Byte Format Every byte transmitted to the SDA line consists of 8 bits. Each byte must be followed by an acknowledge bit. The MSB is transmitted first.
Acknowledge During the Acknowledge clock pulse, the master (up) put a resistive HIGH level on the SDA line. The peripheral (audio processor) that acknowledges has to pull-down (LOW) the SDA line during the Acknowledge clock pulse so that the SDA line is in a stable LOW state during this clock pulse. Please refer to the diagram below.
SCL 1 2 3 7 8 9
SDA MSB Start Acknowledge
The audio processor that has been addressed has to generate an Acknowledge after receiving each byte, otherwise, the SDA line will remain at the HIGH level during the ninth (9th) clock pulse. In this case, the master transmitter can generate the STOP information in order to abort the transfer.
REV1.0
7
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MOSA
Timing of SDA and SCL Bus Lines
SDA tf SCL
MS6714
4 Stereo Inputs / 2 Channels Output Audio Processor
tLOW
tr
tSU;DAT
tf
tHD;STA
tSP
tr
tBUF
S
tHD;STA
tHD;DAT
tHIGH
tSU;STA
Sr
tSU;STO
P
S
Standard Mode Symbol fSCL tHD:STA tLOW tHIGH tSU:STA tHD:DAT tSU:DAT tr tf tSU:STO tBUF Cb VnL VnH
Parameter
Min 0 4.0 4.7 4.0 4.7 0 250 4.0 4.7 -
Max 100 3.45 1000 300 400 -
Unit kHz us us us us us ns ns ns us us pF V V
SCL clock frequency Hold time (repeated) START condition. After this period, the first clock pulse is generated LOW period of the SCL clock HIGH period of the SCL clock Set-up time for a repeated START condition Data hold time: For I2C-bus devices Data-set-up time Rise time of both SDA and SCL signals Fall time of both SDA and SCL signals Set-up time for STOP condition Bus free time between a STOP and START condition Capacitive load for each bus line
Noise margin at the LOW level for each connected device (including 0.1VDD hysteresis) Noise margin at the HIGH level for each connected device (including 0.2VDD hysteresis)
BUS INTERFACE
Data are transmitted to and from the MCU to the MS6714 via the SDA and SCL. The SDA and SCL make up the BUS interface. It should be noted that pull-up resistors must be connected to the positive supply voltage.
VDD
Rp Rp
Pull up resistors
SDA (Serial Data Line)
SCL (Serial Clock Line)
MCU
MS6714
REV1.0
8
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MOSA
Interface Protocol
MS6714
4 Stereo Inputs / 2 Channels Output Audio Processor
The format consists of the following A START condition A chip address byte including the MS6714 address. (7bits) The 8th bit of the byte must be "0".(write=0, read=1) MS6714 must always acknowledge the end of each transmitted byte. A data sequence (N-bytes + Acknowledge) A STOP condition
SDA
SCL
1-7
8
9
1-7
8
9
1-7
8
9
S START CONDITION ADDRESS
W R / --
P ACK DATA ACK DATA ACK STOP CONDITION
Address Code The chip address of the MS6714 is 88H.
1 0 0 0 1 0 0 0 W
7 bits address MS6714 address
Data Bytes Description The default states of the chip as the power is on are: the volume is -78.75dB, the stereo 4 is selected, all the speakers are mute and the gains of the input stage, the bass and the treble are 0dB. MSB 0 1 1 0 0 0 0 1 1 1 1 1 B2 0 1 0 1 1 B1 B1 B1 G1 0 1 B0 B0 B0 G0 C3 C3 A2 A2 A2 S2 C2 C2 A1 A1 A1 S1 C1 C1 LSB A0 A0 A0 S0 C0 C0 Function Volume Control Speaker ATT L Speaker ATT R Audio Switch Bass Control Treble Control
Where Ax = 1.25dB steps; Bx = 10dB steps; Cx = 2dB steps; Gx = 3.75dB steps
REV1.0
9
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MOSA
Volume MSB 0 0 B2 B1 B0 A2 0 0 0 0 1 1 1 1 0 0 B2 0 0 0 0 1 1 1 1 The default volume is -78.75dB. B1 0 0 1 1 0 0 1 1 B0 0 1 0 1 0 1 0 1 A2
MS6714
4 Stereo Inputs / 2 Channels Output Audio Processor
LSB A1 0 0 1 1 0 0 1 1 A1 A0 0 1 0 1 0 1 0 1 A0
Function Volume 1.25 dB steps 0 -1.25 -2.5 -3.75 -5 -6.25 -7.5 -8.75 Volume 10dB steps 0 -10 -20 -30 -40 -50 -60 -70
Speaker Attenuator MSB 1 1 1 1 0 1 B1 B1 B0 B0 A2 A2 0 0 0 0 1 1 1 1 0 0 1 1 1 0 1 0 1 1 1 1 1 A1 A1 0 0 1 1 0 0 1 1 LSB A0 A0 0 1 0 1 0 1 0 1 FunctiondB Speaker ATT L Speaker ATT R 0 -1.25 -2.5 -3.75 -5 -6.25 -7.5 -8.75 0 -10 -20 -30 Mute
LF: Left Front, RF: Right Front, LR: Left Rear, RR: Right Rear The default state is mute.
REV1.0
10
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MOSA
Audio Switch MSB 0 1 0 G1 G0 S2
MS6714
4 Stereo Inputs / 2 Channels Output Audio Processor
LSB S1 0 0 1 1 0 1 0 0 1 1 0 1 0 1 S0 0 1 0 1
Function Audio Switch Stereo 1 Stereo 2 Stereo 3 Stereo 4 Loudness ON Loudness OFF +11.25dB +7.5dB +3.75dB 0dB
The default state is stereo 4, loudness off and gain 0dB.
Bass and Treble MSB 0 0 1 1 1 1 0 1 C3 C3 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 The default state is bass 0dB and treble 0dB. C2 C2 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 C1 C1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 LSB C0 C0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 FunctiondB Bass Treble -14 -12 -10 -8 -6 -4 -2 0 0 2 4 6 8 10 12 14
REV1.0
11
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MOSA
Examples Set Volume at -37.5dB.
MSB Start LSB ACK 0 0 0 Data byte 1 -30dB 1 1
MS6714
4 Stereo Inputs / 2 Channels Output Audio Processor
MS6714 Address
1
0
ACK
Stop
-7.5dB
Set Speaker Right at -30dB.
MSB Start LSB ACK 1 1 1 Data byte 1 1 0 0 0dB 0 ACK Stop
MS6714 Address
Speaker R
-30dB
Set Speaker Left in mute-on.
MSB Start LSB ACK 1 1 0 Data byte 1 1 1 Mute 1 1 ACK Stop
MS6714 Address
Speaker L
Set Stereo 2 Input with gain of +7.5 dB and Loudness on.
MSB Start LSB ACK 0 1 0 Data byte 0 1 0 0 1 ACK Stop
MS6714 Address
+7.5dB Stereo 2 Loudness ON
Set treble at -10dB.
MSB Start LSB ACK 0 1 1 Data byte 1 0 0 1 0 ACK Stop
MS6714 Address
Treble
-10dB
REV1.0
12
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MOSA
APPLICATION INFORMATION
Basic Application Example
MS6714
4 Stereo Inputs / 2 Channels Output Audio Processor
5.6K
MCU
25 26 27
2.2u 100n
18 17 12
100n
20
100n
19
2.7n
3
LOUT
LIN
LOUD_L
BIN_L
TREB_L
SDA
DGND
SCL
BOUT_L
2.2u
16 11 15 10
LIN1 RIN1 LIN2 RIN2 LIN3 RIN3 LIN4 RIN4
LOUD_R BOUT_R TREB_R BIN_R AGND ROUT AVDD
10u OUT_L
INPUT
14 9 13 8
MS6714
OUT_R
24
10u
23
OUTPUT
2.2u
REF
28
RIN
1
2
6
5
7
22
21
4
22u AVDD 2.2u
100n
100n 5.6K
100n
2.7n
REV1.0
13
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MOSA
EXTERNAL DIMENSIONS
SOP28 (300mil)
D
MS6714
4 Stereo Inputs / 2 Channels Output Audio Processor
Detail A
FH
h x45 C
A
e
B A1 0.25 mm Detail A L
Dimension in mm Symbol Min A A1 B C e E H L D h 2.35 0.10 0.33 0.23 7.40 10.00 0.40 17.70 0.25 0
o
Dimension in inch Min 0.0926 0.0040 0.013 0.0091 0.2914 0.394 0.016 0.6969 0.010 0
o
Max 2.65 0.30 0.51 0.32 7.60 10.65 1.27 18.10 0.75 8
o
Max 0.1043 0.0118 0.020 0.0125 0.2992 0.419 0.050 0.7125 0.029 8
o
1.27 BASIC
0.050 BASIC
REV1.0
14
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MOSA
SSOP28
D
MS6714
4 Stereo Inputs / 2 Channels Output Audio Processor
Detail A
E1
E
H x45 c ZD A2 A 2 1 R1 e b L1 A1 Detail A R L
Dimension in mm Symbol Min A A1 A2 b c e D E E1 L h ZD R1 R
1 2
Dimension in inch Min 0.053 0.004 0.008 0.007 0.337 0.228 0.150 0.016 0.010 0.008 0.008 0
o o
NOM 1.63 0.15 0.635 BASIC 9.91 5.99 3.91 0.635 0.838REF 10
o
Max 1.75 0.25 1.50 0.30 0.25 8.74 6.20 3.99 1.27 0.50 0.33 8
o
NOM 0.064 0.006 0.025 BASIC 0.390 0.236 0.154 0.025 0.033REF 10
o
Max 0.069 0.010 0.059 0.012 0.010 0.344 0.244 0.157 0.050 0.020 0.013 8
o
1.35 0.10 0.20 0.18 8.56 5.79 3.81 0.41 0.25 0.20 0.20 0 0 5
o o o
-0 15
o
15
o
5
o
REV1.0
15
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