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BTS 612 N1
Smart Two Channel Highside Power Switch
Features
* Overload protection * Current limitation * Short circuit protection * Thermal shutdown * Overvoltage protection (including load dump) * Fast demagnetization of inductive loads * Reverse battery protection1) * Undervoltage and overvoltage shutdown with auto-restart and hysteresis * Open drain diagnostic output * Open load detection in OFF-state * CMOS compatible input * Loss of ground and loss of Vbb protection * Electrostatic discharge (ESD) protection
Product Summary Overvoltage protection Operating voltage
Vbb(AZ) Vbb(on)
43 5.0 ... 34
both
V V
channels: On-state resistance RON Load current (ISO) IL(ISO) Current limitation IL(SCr)
each parallel 200 100 m 2.3 4.4 A 4 4 A
TO-220AB/7
Application
7 1
1
7
7
* C compatible power switch with diagnostic Standard feedback for 12 V and 24 V DC grounded loads * All types of resistive, inductive and capacitve loads * Replaces electromechanical relays, fuses and discrete circuits
Straight leads
SMD
1
General Description
N channel vertical power FET with charge pump, ground referenced CMOS compatible input and diagnostic feedback, monolithically integrated in Smart SIPMOS(R) technology. Fully protected by embedded protection functions.
Voltage source
Overvoltage protection
Current limit 1
Gate 1 protection
+ V bb
4
V
Logic
Voltage sensor
Level shifter Rectifier 1 Charge pump 1 Charge pump 2
Limit for unclamped ind. loads 1 Open load Short to Vbb detection 1 Current limit 2 Gate 2 protection
OUT1
3 6 5
Temperature sensor 1
1
IN1 IN2
ESD
ST
Logic
Level shifter Rectifier 2
Limit for unclamped ind. loads 2 Open load Short to Vbb detection 2
OUT2
Temperature sensor 2
7
Load
(R) PROFET 2
GND Signal GND
Load GND
1)
With external current limit (e.g. resistor RGND=150 ) in GND connection, resistor in series with ST connection, reverse load current limited by connected load.
Semiconductor Group
1
BTS 612 N1
Parameter and Conditions, each channel
at Tj = 25 C, Vbb = 12 V unless otherwise specified
Symbol
Values min typ max
Unit
Pin 1 2 3 4 5 6 7
Symbol OUT1 (Load, L) GND IN1 Vbb ST IN2 OUT2 (Load, L)
Function Output 1, protected high-side power output of channel 1 Logic ground Input 1, activates channel 1 in case of logical high signal Positive power supply voltage, the tab is shorted to this pin Diagnostic feedback: open drain, low on failure Input 2, activates channel 2 in case of logical high signal Output 2, protected high-side power output of channel 2
Maximum Ratings at Tj = 25 C unless otherwise specified Parameter Supply voltage (overvoltage protection see page 4) Supply voltage for full short circuit protection Tj Start=-40 ...+150C Load dump protection2) VLoadDump = UA + Vs, UA = 13.5 V RI3)= 2 , RL= 5.3 , td= 200 ms, IN= low or high Load current (Short circuit current, see page 5) Operating temperature range Storage temperature range Power dissipation (DC), TC 25 C Inductive load switch-off energy dissipation, single pulse Vbb = 12V, Tj,start = 150C, TC = 150C const. one channel, IL = 2.3 A, ZL = 89 mH, 0 : both channels parallel, IL = 4.4 A, ZL = 47 mH, 0 :
see diagrams on page 9
Symbol Vbb Vbb
Values 43 34 60 self-limited -40 ...+150 -55 ...+150 36 290 580 1.0 2.0 -10 ... +16 2.0 5.0
Unit V V V A C W mJ
VLoad dump4) IL Tj Tstg Ptot EAS
Electrostatic discharge capability (ESD) (Human Body Model) Input voltage (DC) Current through input pin (DC) Current through status pin (DC)
see internal circuit diagrams page 8
IN: VESD all other pins:
kV V mA
acc. MIL-STD883D, method 3015.7 and ESD assn. std. S5.1-1993
VIN IIN IST
2)
3) 4)
Supply voltages higher than Vbb(AZ) require an external current limit for the GND and status pins, e.g. with a 150 resistor in the GND connection and a 15 k resistor in series with the status pin. A resistor for the protection of the input is integrated. RI = internal resistance of the load dump test pulse generator VLoad dump is setup without the DUT connected to the generator per ISO 7637-1 and DIN 40839
Semiconductor Group
2
BTS 612 N1
Parameter and Conditions, each channel
at Tj = 25 C, Vbb = 12 V unless otherwise specified
Symbol
Values min typ max
Unit
Thermal Characteristics
Parameter and Conditions Thermal resistance Symbol min ---chip - case, both channels: RthJC each channel: junction - ambient (free air): RthJA SMD version, device on PCB5): Values typ max -3.5 -7.0 -75 37 Unit K/W
Electrical Characteristics
Parameter and Conditions, each channel
at Tj = 25 C, Vbb = 12 V unless otherwise specified
Symbol
Values min typ max
Unit
Load Switching Capabilities and Characteristics On-state resistance (pin 4 to 1 or 7) IL = 1.8 A
Tj=25 C: RON each channel Tj=150 C: Nominal load current, ISO Norm (pin 4 to 1 or 7) VON = 0.5 V, TC = 85 C each channel: IL(ISO) both channels parallel:
Output current (pin 1 or 7) while GND disconnected or GND pulled up, Vbb=30 V, VIN= 0, see diagram page 9 Turn-on time IN to 90% VOUT: Turn-off time IN to 10% VOUT: RL = 12 , Tj =-40...+150C Slew rate on 10 to 30% VOUT, RL = 12 , Tj =-40...+150C Slew rate off 70 to 40% VOUT, RL = 12 , Tj =-40...+150C
-1.8 3.5 --
160 320 2.3 4.4 --
200 400 --10
m
A mA s
IL(GNDhigh)
ton toff
dV /dton -dV/dtoff
80 80 0.1 0.1
200 200 ---
400 400 1 1
V/s V/s
5)
Device on 50mm*50mm*1.5mm epoxy PCB FR4 with 6cm2 (one layer, 70m thick) copper area for Vbb connection. PCB is vertical without blown air.
Semiconductor Group
3
BTS 612 N1
Parameter and Conditions, each channel
at Tj = 25 C, Vbb = 12 V unless otherwise specified
Symbol
Values min typ max
Unit
Operating Parameters Operating voltage6) Undervoltage shutdown Undervoltage restart
Tj =-40...+150C: Tj =-40...+150C: Tj =-40...+25C: Tj =+150C: Undervoltage restart of charge pump see diagram page 12 Undervoltage hysteresis Vbb(under) = Vbb(u rst) - Vbb(under) Overvoltage shutdown Tj =-40...+150C: Overvoltage restart Tj =-40...+150C: Overvoltage hysteresis Tj =-40...+150C: 7) Overvoltage protection Tj =-40...+150C: Ibb=40 mA Standby current (pin 4), VIN=0 Tj=-40...+150C: Operating current (Pin 2)8), VIN=5 V both channels on, Tj =-40...+150C, Operating current (Pin 2)8) one channel on, Tj =-40...+150C:,
Vbb(on) Vbb(under) Vbb(u rst) Vbb(ucp)
Vbb(under)
5.0 3.5 ---34 33 -42
---5.6 0.2 --0.5 47
34 5.0 5.0 7.0 7.0 -43 ----
V V V V V V V V V A
Vbb(over) Vbb(o rst) Vbb(over) Vbb(AZ) Ibb(off) IGND IGND
----
90 0.6 0.4
150 1.2 0.7
mA mA
6) 7) 8)
At supply voltage increase up to Vbb= 5.6 V typ without charge pump, VOUT Vbb - 2 V See also VON(CL) in table of protection functions and circuit diagram page 8. Add IST, if IST > 0, add IIN, if VIN>5.5 V
Semiconductor Group
4
BTS 612 N1
Parameter and Conditions, each channel
at Tj = 25 C, Vbb = 12 V unless otherwise specified
Symbol
Values min typ max
Unit
Protection Functions Initial peak short circuit current limit (pin 4 to 1 or 7) Tj =-40C: Tj =25C: Tj =+150C: Repetitive short circuit shutdown current limit Tj = Tjt (see timing diagrams, page 11) Output clamp (inductive load switch off) at VOUT = Vbb - VON(CL) IL= 40 mA: Thermal overload trip temperature Thermal hysteresis Reverse battery (pin 4 to 2) 9) Reverse battery voltage drop (Vout > Vbb) IL = -1.9 A, each channel Tj=150 C: Diagnostic Characteristics Open load detection current
(included in standby current Ibb(off))
IL(SCp)
5.5 4.5 2.5 9.5 7.5 4.5 4 47 -10 -610 13 11 7 -53 --32 -A
IL(SCr)
-A V C K V mV
VON(CL) Tjt Tjt -Vbb -VON(rev)
41 150 ----
IL(off) Tj=-40..150C: VOUT(OL)
-2
30 3
-4
A V
Open load detection voltage
9)
Requires 150 resistor in GND connection. The reverse load current through the intrinsic drain-source diode has to be limited by the connected load. Note that the power dissipation is higher compared to normal operating conditions due to the voltage drop across the intrinsic drain-source diode. The temperature protection is not active during reverse current operation! Input and Status currents have to be limited (see max. ratings page 2 and circuit page 8).
Semiconductor Group
5
BTS 612 N1
Parameter and Conditions, each channel
at Tj = 25 C, Vbb = 12 V unless otherwise specified
Symbol
Values min typ max
Unit
Input and Status Feedback10) Input resistance Tj=-40..150C, see circuit page 8 Input turn-on threshold voltage Tj =-40..+150C: Tj =-40..+150C: Input turn-off threshold voltage Input threshold hysteresis Off state input current (pin 3 or 6), VIN = 0.4 V, Tj =-40..+150C On state input current (pin 3 or 6), VIN = 3.5 V, Tj =-40..+150C Delay time for status with open load
after Input neg. slope (see diagram page 12)
RI VIN(T+) VIN(T-) VIN(T) IIN(off) IIN(on)
td(ST OL3)
2.5 1.7 1.5 -1 20 --
3.5 --0.5 -50 220
6 3.5 --50 90 --
k V V V A A s
Status output (open drain) Zener limit voltage Tj =-40...+150C, IST = +1.6 mA: VST(high) Tj =-40...+25C, IST = +1.6 mA: VST(low) ST low voltage Tj = +150C, IST = +1.6 mA:
5.4 ---
6.1 ---
-0.4 0.6
V
10)
If a ground resistor RGND is used, add the voltage drop across this resistor.
Semiconductor Group
6
BTS 612 N1 Truth Table
IN1 Normal operation L L H H L L H L H X L L H L H X L X H L H X X X IN2 L H L H L H X L L H L H X L L H L H X X X L H X OUT1 L L H H Z Z H L H X H H H L H X L L L L L X X L OUT2 L H L H L H X Z Z H L H X H H H L L L X X L L L ST BTS611L1 H H H H H(L11)) H L H(L11)) H L L12) H H(L13)) L12) H H(L13)) H L L H L H L H ST BTS612N1 H H H H L H H L H H L H H L H H H L L H L H L H
Open load
Channel 1
Channel 2
Short circuit to Vbb
Channel 1
Channel 2
Overtemperature
both channel
Channel 1 Channel 2 Undervoltage/ Overvoltage
L = "Low" Level H = "High" Level
X = don't care Z = high impedance, potential depends on external circuit Status signal after the time delay shown in the diagrams (see fig 5. page 12)
11) 12)
With additional external pull up resistor An external short of output to Vbb, in the off state, causes an internal current from output to ground. If R GND is used, an offset voltage at the GND and ST pins will occur and the VST low signal may be errorious. 13) Low resistance to V may be detected in the ON-state by the no-load-detection bb
Semiconductor Group
7
BTS 612 N1
Terms
Ibb V ON1 V ON2 OUT1 6 I ST ST V V IN1 IN2 V 5 ST R GND 2 GND I GND IN2 PROFET OUT2 7 V OUT1 VOUT2
GND
Inductive and overvoltage output clamp
+ V bb V Z
V
bb
4 I IN1 3 I IN2 IN1
Vbb 1
I L1 I L2
VON
OUT
PROFET
VON clamped to 47 V typ.
Overvolt. and reverse batt. protection Input circuit (ESD protection)
R IN I
IN1 IN2 + V bb V
RI Logic
Z2
ESD-ZD I GND
I
I
R ST
ST
V
Z1 GND
ESD zener diodes are not to be used as voltage clamp at DC conditions. Operation in this mode may result in a drift of the zener voltage (increase of up to 1 V).
R GND
Signal GND
VZ1 = 6.1 V typ., VZ2 = 47 V typ., RI= 3.5 k typ, RGND= 150
Status output
+5V
Open-load detection
OFF-state diagnostic condition: VOUT > 3 V typ.; IN low
R ST(ON)
ST
GND
ESDZD
OFF
ESD-Zener diode: 6.1 V typ., max 5 mA; RST(ON) < 380 at 1.6 mA, ESD zener diodes are not to be used as voltage clamp at DC conditions. Operation in this mode may result in a drift of the zener voltage (increase of up to 1 V).
I
L(OL)
Logic unit
Open load detection
V
OUT
Signal GND
Semiconductor Group
8
BTS 612 N1
GND disconnect
V 4 3 IN1 IN2 ST Ibb 4 1 high OUT2 5 V V V IN1 IN2 ST GND 2 V GND V 5 6 7 ST GND 2 IN2 PROFET OUT2 D 7 3 IN1 Vbb OUT1 1
Vbb disconnect with charged external inductive load
Vbb OUT1 PROFET
bb
6
Any kind of load. In case of Input=high is VOUT VIN - VIN(T+) . Due to VGND >0, no VST = low signal available.
bb
GND disconnect with GND pull up
4 3 V IN1 V 6 IN2 5 IN2 ST PROFET OUT2 GND 2 7 IN1 Vbb OUT1 1
If other external inductive loads L are connected to the PROFET, additional elements like D are necessary.
Inductive Load switch-off energy dissipation
E bb E AS V bb PROFET OUT EL GND ZL ELoad
IN
V
V bb
ST
V
=
GND
ST
Any kind of load. If VGND > VIN - VIN(T+) device stays off Due to VGND >0, no VST = low signal available.
{
L RL ER
Vbb disconnect with energized inductive load
4 3 high 6 5 IN2 ST PROFET OUT2 GND 2 7 IN1 Vbb OUT1 1
Energy stored in load inductance:
EL = 1/2*L*I L
While demagnetizing load inductance, the energy dissipated in PROFET is
2
EAS= Ebb + EL - ER= VON(CL)*iL(t) dt,
with an approximate solution for RL > 0 : IL* L IL*RL *(V + |VOUT(CL)|)* ln (1+ ) |VOUT(CL)| 2*RL bb
EAS=
V
bb
Normal load current can be handled by the PROFET itself.
Semiconductor Group
9
BTS 612 N1
Maximum allowable load inductance for a single switch off (both channels parallel)
L = f (IL ); Tj,start = 150C,TC = 150C const., Vbb = 12 V, RL = 0 Typ. transient thermal impedance chip case ZthJC = f(tp), one Channel active ZthJC [K/W] 10
L [mH]
1000
1 100 D= 0.5 0.2 0.1 0.05 0.02 0.01 0
0.1
10
0.01 1E-5 1 2 3 4 5 6 7 8
1E-4
1E-3
1E-2
1E-1
1E0
1E1
tp [s] IL [A]
Transient thermal impedance chip case ZthJC = f(tp), both Channel active ZthJC [K/W] 10
1
0.1
D= 0.5 0.2 0.1 0.05 0.02 0.01 0
0.01 1E-5
1E-4
1E-3
1E-2
1E-1
1E0
1E1
tp [s]
Semiconductor Group
10
BTS 612 N1
Timing diagrams
Figure 1a: Vbb turn on:
IN1 IN2
Both channels are symmetric and consequently the diagrams are valid for each channel as well as for permuted channels
Figure 2b: Switching an inductive load
IN
V bb ST V
OUT1
V V
OUT2
OUT
I ST open drain t t
L
Figure 2a: Switching a lamp: Figure 3a: Short circuit shut down by overtempertature, reset by cooling
IN IN ST other channel: normal operation
V
IL I L(SCp)
OUT
IL(SCr)
I
L
t
ST t
Heating up may require several milliseconds, depending on external conditions
Semiconductor Group
11
BTS 612 N1
Figure 4a: Overtemperature: Reset if Tj IN IN V ST bb V
bb(under)
Vbb(u cp) Vbb(u rst)
V
OUT
V OUT
T
J
ST open drain t
t
Figure 6b: Undervoltage restart of charge pump Figure 5a: Open load: detection in OFF-state, turn on/off to open load
IN1 VON(CL)
V on
IN2
channel 2: normal operation
off-state
on-state
V
VOUT1
bb(over)
V IL1 channel 1: open load
V V
bb(u rst)
bb(o rst)
bb(u cp)
V bb(under) V bb t d(ST OL3)
charge pump starts at Vbb(ucp) =5.6 V typ.
t ST
d(ST OL3)
t
td(ST,OL3) depends on external circuitry because of high impedance *) IL = 30 A typ
Semiconductor Group
12
off-state
BTS 612 N1
Figure 7a: Overvoltage:
IN
Vbb
V ON(CL)
Vbb(over)
V bb(o rst)
V
OUT
ST
t
Semiconductor Group
13
BTS 612 N1
Package and Ordering Code
All dimensions in mm
SMD TO 220AB/7, Opt. E3128 Ordering code
BTS612N1 E3128A T&R: Q67060-S6303-A4
Standard TO-220AB/7
BTS612N1
Ordering code Q67060-S6303-A2
TO 220AB/7, Opt. E3230
BTS612N1 E3230
Ordering code Q67060-S6303-A3
Changed since 04.96 Date Change td(ST OL4) max reduced from 1500 Dec 1996 to 800s, typical from 400 to 320s, min limit unchanged EAS maximum rating and diagram and ZthJC diagram added ESD capability increased Typ. reverse battery voltage drop VON(rev) added
Components used in life-support devices or systems must be expressly authorised for such purpose! Critical components14) of the Semiconductor Group of Siemens AG, may only be used in life supporting devices or systems15) with the express written approval of the Semiconductor Group of Siemens AG.
14) A critical component is a component used in a life-support device or system whose failure can reasonably be expected to cause the failure of that life-support device or system, or to affect its safety or effectiveness of that device or system. 15) Life support devices or systems are intended (a) to be implanted in the human body or (b) support and/or maintain and sustain and/or protect human life. If they fail, it is reasonably to assume that the health of the user or other persons may be endangered.
Semiconductor Group
14

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